US 8,792,256 B2Grant
Controller for a switch and method of operating the same
Issue Date:2014-07-29
•20 Claims
•9 Drawing Sheets
Abstract
A controller for a switch and a method of operating the same. In one embodiment, the controller is configured to measure a voltage of a control terminal of the switch and select a first mode of operation if the voltage of the control terminal is greater than a threshold voltage, and a second mode of operation if the voltage of the control terminal is less than the threshold voltage.
Metadata
Assignee
- Power Systems Technologies Ltd.
Inventors
- Ralf Schroeder genannt Berghegger
- Michael Frey
Application Information
Application Number:US 13/360,516
Filing Date:2012-01-27
Priority Date:2012-01-27
Art Unit:2838
Classifications
IPC:
H02M1/08
Field of Search:
H02M 1/08H03K 17/12
Patent Drawings (9 sheets)
Description
Technical Field
[0001] The present invention is directed, in general, to power electronics and, more specifically, to a controller for a switch and method of operating the same.
Background
[0002] A switched-mode power converter (also referred to as a “power converter”) is a power supply or power processing circuit that converts an input voltage waveform into a specified output voltage waveform. DC-DC power converters convert a direct current (“DC”) input voltage into a DC output voltage. Controllers associated with the power converters manage an operation thereof by controlling conduction periods of power switches employed therein. Generally, the controllers are coupled between an input and output of the power converter in a feedback loop configuration (also referred to as a “control loop” or “closed control loop”).
[0003] Typically, the controller measures an output characteristic (e.g., an output voltage, an output current, or a combination of an output voltage and an output current) of the power converter, and based thereon modifies a duty cycle of a power switch of the power converter. The duty cycle “D” is a ratio represented by a conduction period of a power switch to a switching period thereof. In other words, the switching period includes the conduction period of the power switch (represented by the duty cycle “D”) and a non-conduction period of the power switch (represented by the complementary duty cycle (“1-D”). Thus, if a power switch conducts for half of the switching period, the duty cycle for the power switch would be 0.5 (or 50 percent).
[0004] The switched-mode power converters can be constructed with different types of power switches such as bipolar transistors, metal-oxide semiconductor field-effect transistors (“MOSFETs”) or insulated gate bipolar transistors (“IGBTs”). At low power levels, for example, an output power less than 100 watts (“W”), the MOSFETs and bipolar transistors are most commonly used for power switches. While MOSFETs can work at higher switching frequency, which enables smaller designs, bipolar transistors are available at lower cost. Additionally, the different switches employ different drivers for their respective control terminals. As a result, separate driver integrated circuits are inventoried to accommodate the use of different switches in a design of a circuit (e.g., a power converter) employing the same.
[0005] Accordingly, what is needed in the art is a circuit and related method for a switch that enables a driver to be used for different types of switches such as MOSFETs and bipolar transistors that can be adapted to high-volume manufacturing techniques for a power converter or the like employing the same.
Summary of the Invention
[0006] These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by advantageous embodiments of the present invention, including a controller for a switch and a method of operating the same. In one embodiment, the controller is configured to measure a voltage of a control terminal of the switch and select a first mode of operation if the voltage of the control terminal is greater than a threshold voltage, and a second mode of operation if the voltage of the control terminal is less than the threshold voltage.
[0007] The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter, which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.
Brief Description of the Drawings
[0008] For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
[0009] FIGS. 1 and 2 illustrate schematic diagrams of embodiments of power converters constructed according to the principles of the present invention;
[0010] FIG. 3 illustrates a schematic diagram of different switches demonstrating the principles of the present invention;
[0011] FIGS. 4 and 5 illustrate graphical representations representing the differences between switches according to the principles of the present invention;
[0012] FIG. 6 illustrates a block diagram of an embodiment of a controller constructed according to the principles of the present invention; and
[0013] FIGS. 7 to 12 illustrated diagrams of embodiments of portions of a controller constructed according to the principles of the present invention.
[0014] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated, and may not be redescribed in the interest of brevity after the first instance. The FIGUREs are drawn to illustrate the relevant aspects of exemplary embodiments.
Detailed Description of Illustrative Embodiments
[0015] The making and using of the present exemplary embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
[0016] The present invention will be described with respect to exemplary embodiments in a specific context, namely, a controller operable with different types of switches such as a MOSFET or bipolar transistor. While the principles of the present invention will be described in the environment of a power converter, any application that may benefit from the controller as described herein including a power amplifier or a motor controller is well within the broad scope of the present invention.
[0017] Turning now to FIG. 1 , illustrated is a schematic diagram of an embodiment of a power converter constructed according to the principles of the present invention. The power converter is configured to convert AC mains voltage (designated “Vac in”) to a regulated DC output voltage Vout. A power train (e.g., a flyback power train) of the power converter (also referred to as a “flyback power converter”) includes a power switch Q1 coupled to a source of electrical power (e.g., the AC mains) via an input filter (including capacitors C1, C2 and an inductor L2) to provide a filtered DC input voltage Vin to a magnetic device (e.g., an isolating transformer or transformer TX1). A resistor R1 represents an impedance of the AC mains. Although not illustrated, the power converter may also include an electromagnetic interference filter between the AC mains voltage Vac and a bridge rectifier 110. The transformer TX1 has a primary winding P1 and a secondary winding S1 with a turns ratio that is selected to provide the output voltage Vout with consideration of a resulting duty cycle and stress on power train components.
[0018] The power switch Q1 (e.g., a MOSFET) is controlled by a controller (e.g., an application specific integrated circuit (“ASIC”)) 120 that controls the power switch Q1 to be conducting for a duty cycle. The power switch Q1 conducts in response to drive signal such as a gate drive voltage dry produced by the controller 120 with a switching frequency (often designated as “fs”). The duty cycle is controlled (e.g., adjusted) by the controller 120 to regulate an output characteristic of the power converter such as an output voltage Vout, an output current lout, or a combination thereof. A feedback signal FB traverses a feedback path (a portion of which is identified as 130) emanating from a bias winding P2 of the transformer TX1 to enable the controller 120 to control the duty cycle to regulate the output characteristic of the power converter proportional to a bias voltage VP from the bias winding P2. A series circuit arrangement of resistors R14, R23 provides a voltage divider function to scale the voltage produced for the feedback signal FB by the bias winding P2 of the transformer TX1. The bias voltage VP is substantially proportional to a voltage across the secondary winding S1 depending on a turns ratio between the primary winding P1 and the secondary winding S1.
[0019] The voltage produced across the winding P2 is rectified by a diode D6 and charges a capacitor C4 to provide an bias voltage VP for the controller 120. A resistor R25 provides a current-limit function to limit a charging current into the capacitor C4. A resistor R8 provides a start-up charge for the capacitor C4. The AC voltage or alternating voltage appearing on the secondary winding S1 of the transformer TX1 is rectified by an auxiliary power switch (e.g., diode D7 or, alternatively, by a synchronous rectifier, not shown), and the DC component of the resulting waveform is coupled to the output through the low-pass output filter including an output filter capacitor C9 to produce the output voltage Vout. A resistor R18 is included in the circuit to ensure that there is still power consumption when a load is disconnected from the output terminals out+, out− of the power converter. This ensures that the switching frequency at no load is high enough to react sufficiently to a change in the load. A current sensor R15 is coupled to the power switch Q1 and provides a voltage that is proportional to a current in the primary switch (Ip≅Ipri, wherein Ipri is a primary current flowing through the primary winding P1 of the transformer TX1) for the controller 120. This voltage is used to determine the duration of the conduction period of the power switch Q1.
[0020] During a first portion of the duty cycle, a primary current Ipri (e.g., an inductor current) flowing through the primary winding P1 of the transformer TX1 increases as current flows from the input through the power switch Q1. During a complementary portion of the duty cycle (generally co-existent with a complementary duty cycle 1-D of the power switch Q1), the power switch Q1 is transitioned to a non-conducting state. Residual magnetic energy stored in the transformer TX1 causes conduction of a secondary current Isec through the diode D7 when the power switch Q1 is off. The diode D7, which is coupled to the output filter capacitor C9, provides a path to maintain continuity of a magnetizing current of the transformer TX1. During the complementary portion of the duty cycle, the magnetizing current flowing through the secondary winding S1 of the transformer TX1 decreases. In general, the duty cycle of the power switch Q1 may be controlled (e.g., adjusted) to maintain a regulation of or regulate the output voltage Vout of the power converter.
[0021] In order to regulate the output voltage Vout, a value or a scaled value of the feedback signal FB is compared with a reference voltage within the controller 120 to control the duty cycle D. A larger duty cycle implies that the power switch Q1 is closed for a longer fraction of the switching period of the power converter. Thus, the power converter is operable with a switching cycle wherein an input voltage Vin is coupled to the transformer TX1 for a fraction of a switching period by the power switch Q1 controlled by controller 120.
[0022] In a switch-mode power converter constructed with a flyback power train, a voltage produced by the bias winding P2 during a flyback portion of a switching cycle can be related to the output voltage Vout by accounting for a turns ratio of the transformer TX1 and voltage drops in diodes and other circuit elements. The voltage produced across the bias winding P2 is employed to produce an estimate of the output voltage Vout, which in turn is used to regulate the same without crossing the isolation boundary of the transformer TX1.
[0023] Turning now to FIG. 2 , illustrated is a schematic diagram of another embodiment of a power converter constructed according to the principles of the present invention. The power switch Q2 of FIG. 2 is a bipolar transistor in lieu of the MOSFET power switch Q1 illustrated in FIG. 1 . The controller 120 of FIGS. 1 and 2 is configured to operate with different types of switches as set forth below. As a result, the controller 120 can select first and second modes of operation depending on the type of power switch employed in the power converter. For instance, the controller can select the first mode of operation if the power switch is a MOSFET (see, MOSFET power switch Q1 in FIG. 1 ) and a second mode of operation if the power switch is a bipolar transistor (see, bipolar transistor power switch Q2 in FIG. 2 ). It should be understood that the principles of the present invention are not limited to only MOSFETs and bipolar transistors. The power converters of FIGS. 1 and 2 otherwise include like components that operate in similar ways and, as such, will not hereinafter be described again.
[0024] Turning now to FIG. 3 , illustrated is a schematic diagram of different switches demonstrating the principles of the present invention. The first switch is an npn bipolar transistor Q1 with a base terminal Q1-base driven by a drive signal such as a positive drive voltage V1 through a resistor R1. The second switch is an n-channel MOSFET Q2 with a gate terminal Q2-G driven by the positive drive voltage V1 through resistor R2. The resistors R1, R2 are each one kilohm (“kΩ”) resistors. Since the bipolar transistor Q1 presents a forward-biased junction at its base terminal Q1-base, the voltage of the base terminal does not rise more than about 0.7 volts (“V”). The gate terminal Q2-G of the MOSFET Q2 presents a substantially open circuit to a driver, the voltage thereof rises substantially to the voltage of the drive voltage V1, which can be about 10 volts. Accordingly, the voltage at the respective control terminal of each switch can be employed to detect whether the switch is a bipolar transistor or a MOSFET.
[0025] Turning now to FIGS. 4 and 5 , illustrated are graphical representations illustrating the differences between switches according to the principles of the present invention. FIG. 4 illustrates a drive signal such as a drive voltage dry vs. time produced by a pulse-width modulator controller with a drive voltage of 10 volts, and the respective voltages VQ2-G, VQ1-base at the control terminals of a MOSFET and a bipolar transistor, respectively. As demonstrated, the voltage VQ2-G at the control terminal of the MOSFET rises to about 10 volts, and the voltage VQ1-base at the control terminal of the bipolar transistor rises only to about 0.7 volts.
[0026] In addition to the drive voltage dry vs. time, FIG. 5 illustrates current flowing IQ2-G into the gate terminal of the MOSFET and current IQ1-base flowing into the base terminal of the bipolar transistor. As demonstrated, a brief pulse of current flows into the gate terminal of the MOSFET as its gate-to-source capacitance is charged. Also, a continuous current of about 10 milliamperes (“mA”) flows into the base terminal of the bipolar transistor. Accordingly, the current flowing into the control terminal of a switch can also be employed to detect the type of switch being used in a circuit.
[0027] Turning now to FIG. 6 , illustrated is a block diagram of an embodiment of a controller (e.g., an application specific integrated circuit (“ASIC”)) constructed according to the principles of the present invention. The controller provides an adaptable drive function dependent on a detected switch embodied in a circuit employing the same (see, e.g., the power converter of FIGS. 1 and 2 ). Other types of controllers that provide an adaptable drive function for a switch dependent on the detected switch are well within the broad scope of the present invention.
[0028] The controller includes a sample and hold circuit SundH that estimates the output voltage by sampling a voltage of a bias winding of a transformer (e.g., the bias winding P2 of the transformer TX1 in FIGS. 1 and 2 ). A comparator circuit Comp includes several comparators to compare a voltage VSuH produced by the sample and hold circuit SundH with a ramp voltage Ref_exp to determine the off time of the drive voltage drv. An output of the comparator circuit is a signal designated Freig. When the signal Freig is high, demagnetization of the transformer has been detected and the drive voltage dry of the controller can be switched on. A timer (designated “Timer”) of the controller produces a pulse-width modulated signal Gin, which determines various conditions under which the drive voltage dry is switched on. Thus, the comparator circuit Comp and timer “Timer” determine when the drive voltage dry can be switched on for a switch. A reference circuit (designated “Reference”) generates various reference voltages used internally by the controller.
[0029] A timing circuit SuHclk provides timing when sampling is being performed. The timing circuit SuHclk uses the output of the timer “Timer” to control the timing when a feedback signal FB (e.g., the feedback signal FB produced by the bias winding P2 of the transformer Tx1 of FIGS. 1 and 2 ) is sampled. Various circuit configurations to control timing of a feedback signal FB may be employed to advantage. A current control circuit CC_control calculates when the controller can be switched on to provide a constant output current because the controller can be employed to control a combination of constant voltage/constant current characteristic of a circuit such as a power converter. Thus, the off time of the drive voltage dry for a switch is controlled by a combination of the timing circuit SuHclk and the current control circuit CC_control.
[0030] In the controller, the longer of the off times calculated by the timing circuit SuHclk and the current control circuit CC_control is taken as controlling for the off time of the drive voltage dry for a switch. In a voltage-control mode, the calculation of the off time is longer in the timing circuit SuHclk. In a constant-current mode, the timing of the current control circuit CC_control is longer. Thus, the comparator circuit Comp, timing circuit SuHclk and the current control circuit CC_control operate to determine the timing of the drive voltage dry for the switch. An overvoltage protection circuit OVP of the controller provides overvoltage protection for the power converter, and transitions the controller to a safe mode (i.e., the drive voltage dry is switched off), when an abnormal condition of the bias voltage VP is detected. The controller also includes a startup circuit (designated “startup”), a switch detector (designated “switch_detector”) and driver (designated “driver”) that will be described in more detail below.
[0031] Turning now to FIGS. 7 to 11 , illustrated are diagrams of embodiments of portions of a controller constructed according to the principles of the present invention. Beginning with FIG. 7 , illustrated is a startup circuit employable as the startup circuit (designated “startup”) of FIG. 6 . The startup circuit measures the bias voltage VP and when the bias voltage VP is higher than a startup level, a start signal “start” is set high to enable operation of the controller. When the bias voltage VP is lower than an under-voltage lockout level, the start signal “start” is set low to disable operation of the controller. The under-voltage lockout level is dependent on a switch detect signal FET that represents whether a MOSFET or a bipolar transistor was detected in the circuit such as a power converter. Again, the detection of a MOSFET causes the controller to select a first mode of operation, whereas the detection of a bipolar transistor causes the controller to select a second mode of operation. The under-voltage lockout level is set to a higher level when the controller operates in the first mode of operation than when the controller operates in the second mode of operation. In the environment illustrated in FIGS. 1 and 2 , the startup level is higher than the under voltage lockout level to ensure that enough energy is stored in the capacitor C4 to maintain operation of the controller 120 after startup until the voltage at the output has risen high enough to power the controller 120 via the bias winding P2 of the transformer TX1.
[0032] The circuitry 710 provides a level shifting function to set the under-voltage lockout level lower when a bipolar transistor is detected. The circuitry 710 includes comparator U2, inverter U3, 5-volt voltage-reference V1 and resistors R2, R3, R4, R5, R6, R7. A MOSFET frequently requires a higher drive voltage at its gate terminal then the base terminal of a bipolar transistor to completely turn the MOSFET on. Accordingly, the under-voltage lockout level at which the controller is enabled to operate is set higher when a MOSFET is detected. The circuit illustrated in FIG. 7 is configured to produce a lower switch-off voltage than a switch-on voltage. The circuitry 720 produces a logical output coupled to the non-inverting input of a comparator E1. The output of the comparator E1 is coupled to both inputs of an OR gate U1, the output of which is coupled to the non-inverting input of a comparator E2. The output of the comparator E2 produces the start signal “start”. The comparator E2 and OR gate U1 increase the slope of the start signal during transition between high and low state. The circuitry 720 represents a simulated current consumed by the controller to improve accuracy of its operation.
[0033] Turning now to FIG. 8 , illustrated is a switch detector employable as the switch detector (designated “switch_detector”) of FIG. 6 . In the illustrated embodiment, the switch detector detects whether a switch coupled to a drive signal such as the drive voltage dry is, for instance, a MOSFET or a bipolar transistor. When the start signal “start” goes high, which is coupled to a “set” input terminal of latch 2 through the high-pass network formed with a capacitor C1 and a resistor R1, the output Q of latch 2 is set high to initially signal operation in a MOSFET mode (a first mode of operation). The logic indicated in FIG. 8 is operative so that for each pulse, as determined by a pulse-width modulated signal Gin (also referred to as “GIN”), the output Q of latch 2 can be reset low to indicate a bipolar transistor (for a bipolar mode or second mode of operation) if the drive voltage dry of the driver becomes less than a threshold level (e.g., three volts), when the pulse-width modulated signal GIN is high.
[0034] Inversely, the output Q of latch 2 is left or can be set high to indicate a MOSFET if the drive voltage dry of the driver becomes greater than the threshold level when the pulse-width modulated signal GIN is high. Timing for these operations is controlled by a comparator U1 with 3-volt reference Vref coupled to its inverting input. The output of the comparator U1 is coupled to the “set” input of latch 1, the output of which is coupled to an OR gate U2 to signal when the drive voltage dry is greater than three volts. The output of the OR gate U2 is coupled to a D flip-flop U5. The output of the D flip-flop U5 is coupled to the “reset” input of latch 2. Further timing for these operations is controlled by the pulse-width modulated signal GIN that is coupled through the high-pass network formed with the capacitor C2 and the resistor R2, the output of which is coupled to the “reset” input of latch 1. The pulse-width modulated signal GIN is also coupled to the reset input of the D flip-flop U5.
[0035] Turning now to FIG. 9 , illustrated is a driver employable as the driver (designated “driver”) of FIG. 6 . The driver produces a series of pulses for the drive signal such as the drive voltage dry to control a switch. The switch detect signal FET indicates whether the switch is a MOSFET (for a first mode of operation) or a bipolar transistor (for a second mode of operation). If the switch detect signal FET is high, the switch has been detected as a MOSFET; otherwise, the switch has been detected as a bipolar transistor. The pulse-width modulated signal Gin is the signal that determines when the drive voltage dry is high or low. When the pulse-width modulated signal Gin is high, the drive voltage dry is high, and vice versa. The complement pulse-width modulated signal GinN is the complement of the pulse-width modulated signal Gin. The start signal “start” is a signal that is set high when the controller is in an active mode. The signal GND represents local circuit ground.
[0036] In operation, when the switch detect signal FET is high, a switch S6 is off and a switch S5 is on. An inverter U2 provides signal inversion to control the switches S5, S6. Accordingly, a current limiter “current_limiter” or the voltage limiter “voltage_limiter” is selected by the switch detect signal FET to control a characteristic of the drive voltage drv. When the controller initiates operation at startup, the switch detect signal FET is set high, thereby representing the first mode of operation (i.e., the driven switch is assumed to be a MOSFET). A switch S4 is switched on when the start signal “start” is high to enable operation of the driver. The switch S4 is configured to connect or disconnect the bias voltage VP from the current limiter current_limiter or the voltage limiter voltage_limiter. A switch S3 is to ensure the drive voltage dry is low when the start signal “start” is low, and a switch S1 pulls the drive voltage dry low when the complement pulse-width modulated signal GinN is high. Thus, the driver produces the drive voltage dry for the switch based on the pulse-width modulated signal Gin.
[0037] Turning now to FIG. 10 , illustrated is a schematic drawing of the current limiter “current_limiter” illustrated in FIG. 9 that limits a current of the drive voltage dry when a bipolar transistor has been detected by the controller (during the second mode of operation), as indicated by the switch detect signal FET set low. The pulse-width modulated signal Gin is coupled through a resistor R2 to the base of a bipolar transistor Q1. The signal Vdd is coupled to the bias voltage VP by switches S4, S6 when the switch detect signal FET is set low, as indicated in FIG. 9 . An output of the current limiter is the drive voltage drv. The bipolar transistor Q1 is an active device to limit a current produced at the output of the current limiter. A pair of diodes D1, D2 limit a base voltage of the bipolar transistor Q1 with respect to the drive voltage dry to about one diode drop (i.e., to about 0.7 volts). Accordingly, a constant voltage is produced across a resistor R1 when the pulse-width modulated signal Gin is high, thereby limiting a current that can flow from the output of the current limiter. Thus, the current limiter is configured to limit a current for the control terminal of the switch (via the drive voltage drv) to a current limit when the controller operates in the second mode of operation.
[0038] Turning now to FIG. 11 , illustrated is a schematic drawing of the voltage limiter “voltage_limiter” illustrated in FIG. 9 that limits a voltage of the drive voltage dry when a MOSFET has been detected by the controller (during the first mode of operation), as indicated by the switch detect signal FET set high. As described previously with reference to FIG. 10 , an input to the voltage limiter is the pulse-width modulated signal Gin and an output signal is the drive voltage drv. The signal Vdd is coupled to the bias voltage VP by switches S4, S5 when the switch detect signal FET is set high, as indicated in FIG. 9 . The level shifter E1 shifts the voltage level of the pulse-width modulated signal Gin, which is about five volts, by a factor of three to produce a 15-volt signal on the left terminal of a resistor R1. The resistor R1 in conjunction with Zener diode D1 (e.g., a 10 volt Zener diode) produces a 10 volt signal at the base of bipolar transistor Q1, the collector of which is coupled through a resistor R2 to the signal Vdd. Accordingly the signal Vdd, which is the same as the drive voltage drv, is clamped at the emitter of bipolar transistor Q1 to about 10 volts minus a diode drop produced between the base and emitter of transistor Q1. Thus, the circuit illustrated in FIG. 11 is operative as a voltage limiter when the switch detect signal FET is set high indicating detection of a MOSFET. Thus, the voltage limiter is configured to limit a voltage for the control terminal of the switch (via the via the drive voltage drv) to a voltage limit when the controller operates in the first mode of operation.
[0039] Turning now to FIG. 12 , illustrated is another embodiment of a switch detector. While the switch detector of FIG. 12 may be embodied in a controller according to the principles of the present invention, the initial state of a switch detect signal QM-B is opposite to that of the switch detect signal FET described previously above. In either case, however, the switch detector detects whether a switch coupled to a drive signal such as the drive voltage dry is, for instance, a MOSFET or a bipolar transistor. Upon initial application of bias voltage Vp to the controller, the bias voltage Vp rises, eventually exceeding a threshold voltage of, for instance, two volts. This condition is detected by a comparator C04, which produces an output signal coupled to high pass filter F05. The output of high-pass filter F05 is coupled to the reset input of a flip-flop FF03. The flip-flop FF03 accordingly resets the switch detect signal QM-B to a low state, indicating that the switch is initially assumed to be a bipolar transistor. The switch detect signal QM-B remains in a low state until the drive voltage drv, which is connected to low-pass filter F01, exhibits a voltage greater than two volts, which is detected by comparator C02. The low-pass filter F01 is included in the circuit to remove possible extraneous noise from the drive voltage drv. If comparator C02 detects the filtered drive voltage dry greater than two volts, its output goes high, which is coupled to the set input of the flip-flop FF03. In this case, the flip-flop FF03 sets the switch detect signal QM-B high, indicating the switch is a MOSFET.
[0040] Thus, a controller for a switch and a method of operating the same has been introduced herein. In one embodiment, the controller is configured to measure a voltage of a control terminal of the switch and select a first mode of operation (e.g., indicating that the switch is a MOSFET) if the voltage of the control terminal is greater than a threshold voltage, and a second mode of operation (e.g., indicating that the switch is a bipolar transistor) if the voltage of the control terminal is less than the threshold voltage. The controller may include a voltage limiter configured to limit a voltage for the control terminal of the switch to a voltage limit during the first mode of operation. The controller may include a current limiter configured to limit a current for the control terminal of the switch to a current limit during the second mode of operation. An under-voltage lockout level of the controller may be set to a higher level during the first mode of operation than during the second mode of operation. The controller may include a timer configured to produce a pulse-width modulated signal. The controller is configured to control a duty cycle of the switch to regulate an output voltage of a power converter. The controller may initiate operation in the first mode of operation at startup.
[0041] Those skilled in the art should understand that the previously described embodiments of a switched-capacitor power converter and related methods of operating the same are submitted for illustrative purposes only. While the principles of the present invention have been described in the environment of a power converter, these principles may also be applied to other systems such as, without limitation, a power amplifier or a motor controller. For a better understanding of power converters, see “Modern DC-to-DC Power Switch-mode Power Converter Circuits,” by Rudolph P. Severns and Gordon Bloom, Van Nostrand Reinhold Company, New York, N.Y. (1985) and “Principles of Power Electronics,” by J. G. Kassakian, M. F. Schlecht and G. C. Verghese, Addison-Wesley (1991).
[0042] Also, although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. For example, many of the processes discussed above can be implemented in different methodologies and replaced by other processes, or a combination thereof.
[0043] Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods, and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
Claims
What is claimed is:
1. A controller for a switch configured to measure a voltage of a control terminal of said switch and select a first mode of operation if said voltage of said control terminal is greater than a threshold voltage, and a second mode of operation if said voltage of said control terminal is less than said threshold voltage, wherein said first mode of operation signifies that said switch is a field-effect transistor and said second mode of operation signifies that said switch is a bipolar transistor.
2. The controller as recited in claim 1 further comprising a voltage limiter configured to limit a voltage for said control terminal of said switch to a voltage limit during said first mode of operation.
3. The controller as recited in claim 1 further comprising a current limiter configured to limit a current for said control terminal of said switch to a current limit during said second mode of operation.
4. The controller as recited in claim 1 wherein an under-voltage lockout level is configured to be set to a higher level during said first mode of operation than during said second mode of operation.
5. The controller as recited in claim 1 further comprising a timer configured to produce a pulse-width modulated signal.
6. The controller as recited in claim 1 wherein said controller is configured to control a duty cycle of said switch to regulate an output voltage of a power converter.
7. The controller as recited in claim 1 wherein said controller is configured to initiate operation in said first mode of operation at startup.
8. A method, comprising:
measuring a voltage of a control terminal of a switch; and
selecting a first mode of operation if said voltage of said control terminal is greater than a threshold voltage, and a second mode of operation if said voltage of said control terminal is less than said threshold voltage, wherein said first mode of operation signifies that said switch is a field-effect transistor and said second mode of operation signifies that said switch is a bipolar transistor.
9. The method as recited in claim 8 further comprising limiting a voltage for said control terminal of said switch to a voltage limit during said first mode of operation.
10. The method as recited in claim 8 further comprising limiting a current for said control terminal of said switch to a current limit during said second mode of operation.
11. The method as recited in claim 8 further comprising setting an under-voltage lockout level to a higher level during said first mode of operation than during said second mode of operation.
12. The method as recited in claim 8 further comprising producing a pulse-width modulated signal.
13. The method as recited in claim 8 further comprising controlling a duty cycle of said switch to regulate an output voltage of a power converter.
14. The method as recited in claim 8 further comprising initiating operation in said first mode of operation at startup.
15. A power converter, comprising:
a power switch coupled to an input of said power converter;
a transformer interposed between said power switch and an output of said power converter; and
controller for said power switch configured to measure a voltage of a control terminal of said power switch and select a first mode of operation if said voltage of said control terminal is greater than a threshold voltage, and a second mode of operation if said voltage of said control terminal is less than said threshold voltage, wherein said first mode of operation signifies that said power switch is a field-effect transistor and said second mode of operation signifies that said power switch is a bipolar transistor.
16. The power converter as recited in claim 15 wherein said controller comprises a voltage limiter configured to limit a voltage for said control terminal of said switch to a voltage limit during said first mode of operation.
17. The power converter as recited in claim 15 wherein said controller comprises a current limiter configured to limit a current for said control terminal of said switch to a current limit during said second mode of operation.
18. The power converter as recited in claim 15 wherein an under-voltage lockout level is configured to be set to a higher level during said first mode of operation than during said second mode of operation.
19. The power converter as recited in claim 15 wherein said controller comprises a timer configured to produce a pulse-width modulated signal.
20. The power converter as recited in claim 15 wherein said controller is configured to initiate operation in said first mode of operation at startup.
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