Transistor driver circuit

[0002] 1. Field of the Invention

[0003] The invention generally relates to circuits and in particular, to drive circuits for transistors.

[0004] 2. Description of the Related Art

[0005] Power transistors are often used in switching applications, i.e., alternating between an “on” state and an “off” state. For example, power transistors can be found in switching power supplies. These switching power supplies can be found in many different types of electronic equipment, such as power supplies for computers and telecommunications equipment. Other applications for switching power transistors include switching regulators, servos, motor controls, amplifiers, transmitters, and the like.

[0006] There are many types of power transistors. Examples include bipolar junction transistors (BJTs), metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and the like. A control input of a power transistor is coupled to a driver circuit, which drives the control input of the power transistor to achieve the desired “on” or “off” state. Desirably, a driver circuit for a device is matched to the input characteristics of the device.

[0007] A relatively new power transistor is a power junction field effect transistor (power JFET). However, power JFET devices pose certain challenges to driver circuits.

[0008] Embodiments of the invention include a driver circuit for a transistor, such as a power transistor. The driver circuit can turn the driven transistor on and off in response to a control signal. In an “on” state, the driver circuit provides the input of the driven transistor with a positive bias. In an “off” state, the driver circuit provides the input of the driven transistor with a negative bias. The negative bias can be applied to transistors, such as to junction field effect transistors (JFETs), which use the negative bias to turn off. Advantageously, this negative bias can be optionally generated within the driver circuit without the need for a negative voltage supply or negative bias supplied to the driver circuit.

[0009] These and other features of the invention will now be described with reference to the drawings summarized below. These drawings and the associated description are provided to illustrate preferred embodiments of the invention and are not intended to limit the scope of the invention.

[0010] FIG. 1 illustrates a driver circuit according to one embodiment of the invention.

[0011] FIG. 2 illustrates a model of the driver circuit in a first state.

[0012] FIG. 3 illustrates a model of the driver circuit in a second state.

[0013] FIG. 4 illustrates an alternative embodiment of the driver circuit.

[0014] Although this invention will be described in terms of certain preferred embodiments, other embodiments that are apparent to those of ordinary skill in the art, including embodiments that do not provide all of the benefits and features set forth herein, are also within the scope of this invention. Accordingly, the scope of the invention is defined only by reference to the appended claims.

[0015] One embodiment of the invention includes a driver circuit that can drive power transistors at relatively high switching speeds, with relatively high efficiency, and at relatively low cost. One embodiment of the driver circuit can advantageously operate from only a single positive voltage supply or bias and yet provide a negative voltage to an input of a driven device, such as to the gate of a junction field effect transistor (JFET). Advantageously, this permits the use of power transistors that use a negative control bias in an application such as a power supply regardless of the presence or absence of a corresponding negative power supply bias, thereby advantageously permitting power transistors used in a variety of applications and facilitating reuse of existing designs.

[0016] Driver circuits should be configured to generate appropriate output waveforms for the control inputs of corresponding power transistors. In addition, driver circuits are preferably relatively small and compact, can preferably operate from relatively few biases, are preferably compatible with standard control signal levels, such as logic levels, and can preferably support relatively high switching rates. Devices with relatively high switching rates can be desirable in many applications.

[0017] For example, increasing the switching speed of a switch mode power supply can permit the size, the weight, and the cost of the power supply to be reduced. An increase in the switching speed of an electronic device can typically permit less costly smaller capacitors, inductors, and transformers to be used. Moreover, an increase in the operating frequency can also permit increases in performance through higher closed loop bandwidths and the like. In one embodiment, where the power transistors are used in a Class-D switch-mode audio amplifier, the increasing in switching frequency advantageously provides a reduction in the distortion of the amplifier.

[0018] One relatively new power switching device that can switch at relatively high frequencies with relatively high efficiency is a power JFET. One example of a power JFET is an N-Channel vertical power JFET available from Lovoltech, Inc. of Santa Clara, Calif. A power JFET is described in U.S. Pat. No. 6,251,716 to Ho-Yuan Yu. However, a characteristic of a depletion mode or “normally on” JFET is that a negative voltage bias is applied from gate to source of the JFET in order to turn the JFET off. With many other transistor configurations, such a negative voltage bias is not required at a control input. As a result, existing drivers are typically not compatible with transistors, such as depletion mode JFETs, which use negative voltage biases at a control input to turn off.

[0019] Embodiments of the invention advantageously provide a positive bias to the control input of a transistor, such as a JFET, to turn the transistor on and also provides a negative bias to the control input of the transistor to turn the transistor off. Advantageously, one embodiment of a driver circuit can provide the negative bias even in the absence of a negative voltage supply or bias for the driver circuit. This advantageously permits the driver circuit to be used in many systems that do not provide an appropriate negative voltage supply or bias.

[0020] FIG. 1 illustrates a driver circuit 100 according to one embodiment of the invention. The illustrated driver circuit 100 receives a control signal 102 as an input and provides an output 104 in response to the control signal 102. The output 104 provides a drive signal that can be applied to an input of a transistor, e.g., a gate drive to a JFET. The driver circuit 100 is configured to switch on a positive bias, such as positive flowing current, to the output 104 in response to a first state of the control signal 102 and is configured to provide a negative bias, such as a negative voltage, on the output 104 in response to a second state of the control signal 102. The illustrated driver circuit 100 can be fabricated in a variety of ways, such as from discrete devices, in a hybrid, in an integrated circuit, and the like.

[0021] For relatively high switching speeds, the control signal 102 should be provided from a circuit with relatively low output resistance, such as from a buffer circuit 150, which will be described later. In one embodiment, the buffer circuit 150 can be part of the driver circuit 100. In another embodiment, a control circuit with a suitable output characteristic provides the control signal 102 for the driver circuit 100. Examples of control circuits that can use the driver circuit 100 include control circuits for switch mode power supplies, control circuits for switching regulators, control circuits for pulse width modulating class D audio amplifiers, and the like.

[0022] The driver circuit 100 includes a first switching device, a second switching device, and a rectifying device. In the embodiment illustrated in FIG. 1, the first switching device, the second switching device, and the rectifying device correspond to a P-Channel metal oxide semiconductor field effect transistor (P-Channel MOSFET) Q₁106, to an N-Channel metal oxide semiconductor field effect transistor (N-Channel MOSFET) Q₂108, and to a diode D 110.

[0023] In one embodiment, the P-Channel MOSFET Q₁106 corresponds to a P-Channel MOSFET NDS352AP available from Fairchild Semiconductor International Inc., of South Portland, Me.; the N-Channel MOSFET Q₂108 corresponds to an N-Channel MOSFET FDV303N available from Fairchild Semiconductor International Inc.; and the diode D 110 corresponds to a PMBD7000 high-speed diode available from Phillips Semiconductors of The Netherlands. While illustrated in the context of MOSFETs and a diode, one of ordinary skill in the art will appreciate that the principles and advantages described herein are applicable to other types of devices, such as bipolar junction transistors (BJTs). For example, in another embodiment, a PNP BJT and an NPN BJT can be substituted for a P-Channel MOSFET and for an N-Channel MOSFET, respectively, with appropriate biasing resistors in series with the bases of the BJTs. In another embodiment, an active device can be used for the rectifying device as described later in connection with FIG. 4. Selection of other devices will be readily determined by one of ordinary skill in the art. The driver circuit 100 illustrated in FIG. 1 also includes a resistorR 112 and a capacitor C_A114.

[0024] In the driver circuit 100, the control signal 102 is coupled to the gate of the P-Channel MOSFET Q₁106 and to the gate of the N-Channel MOSFET Q₂108. The source of the P-Channel MOSFET Q₁106 is coupled to a positive supply voltage V_DD116. It will be understood by one of ordinary skill in the art that a bypass capacitor C_B118 can be included on the positive supply voltage V_DD116. The drain of the P-Channel MOSFET Q₁106 is coupled to a first terminal of the resistor R 112 and to the anode of the diode D 110. The cathode of the diode D 110 is coupled to a first terminal of the capacitor C_A114 and to the drain of the N-Channel MOSFET Q₂108. The source of the N-Channel MOSFET Q₂108 is advantageously coupled to ground in the illustrated embodiment. A second terminal of the resistor R 112 is coupled to a second terminal of the capacitor C_A114 and to the output 104, which can provide a transistor that is driven by the driver circuit, such as the JFET Q_L160 illustrated in FIG. 1, with a drive signal.

[0025] The control signal 102 transitions between a first state and a second state. These states can correspond to standard logic levels or to levels that are tailored to a particular application. In one embodiment, the circuit that provides the control signal 102, e.g., the buffer circuit 150, provides voltage levels for the first state and for the second state that approximately correspond to the positive supply voltage V_DD116 and to ground, respectively. In the illustrated driver circuit 100, no negative supply voltage is used such that the driver circuit 100 can advantageously operate from only a single power supply voltage. It. will be understood, however, that in another embodiment, the driver circuit can be configured to use more than one power supply voltage. For example, the driver circuit 100 can be configured to operate with the positive supply voltage V_DD116 set to +5 Volts and with ground.

[0026] The operation of the driver circuit 100 will now be described with the first state of the control signal 102 corresponding to a low level, i.e., to approximately ground, and with the second state of the control signal 102 corresponding to a high level, i.e., to approximately the voltage level of the positive supply voltage V_DD116.

[0027] The first state of the control signal 102 provides a relatively high negative voltage from gate to source across the P-Channel MOSFET Q₁106, e.g., about +V_DDfrom source to gate. This turns on the P-Channel MOSFET Q₁106 such that there is relatively low resistance between the drain and the source of the P-Channel MOSFET Q₁106. In addition, the first state of the control signal 102 provides a relatively low voltage from gate to source across the N-Channel MOSFET Q₂108, e.g., about 0V. This turns off the N-Channel MOSFET Q₂108 such that there is relatively little conductance between the drain and the source of the N-Channel MOSFET Q₂108.

[0028] A model simplified for clarity of the driver circuit 100 in a state corresponding to the first state of the control signal 102 is provided in FIG. 2. In FIG. 2, the input of the driven transistor or the JFET Q_L160 is modeled as a diode 202. With relatively high conductivity between the drain and the source of the P-Channel MOSFET Q₁106, the “on” state of the P-Channel MOSFET Q₁106 couples the anode of the diode D 110 and the first terminal of the resistor R 112 to the positive supply voltage V_DD116. The current I_DQ1that flows from the source to the drain of the P-Channel MOSFET Q₁106 divides into a resistor current I_Rand a diode current I_D. The resistor current I_Rand the diode current I_Drecombine to the load current I_QL, which is provided to the driven transistor. These relationships are expressed in Equation 1.

[0029] I_DQ1=I_R+I_D=I_QL  (Eq. 1)

[0030] The diode current I_Dcharges the capacitor C_A114. It will be understood by one of ordinary skill in the art that the capacitor C_A114 can be formed from one or more capacitors. The amount of capacitance for the capacitor C_A114 can vary in a very broad range and can depend on the size and the number of transistors driven by the driver circuit 100. The amount of capacitance should be sufficient to reverse bias the input of the driven transistor, e.g., to reverse bias the gate to source of the JFET Q_L160, as will be described in greater detail later in connection with FIG. 3. In one embodiment, where the driven transistor has an input characteristic of a diode, such as the JFET Q_L160, the amount of capacitance should also be sufficient to compensate for discharge through the reverse recovery current of the of the input diode of the JFET Q_L160. In one embodiment, the

[0031] capacitance of the capacitor C_A114 is about 2200 picofarads (pf). Other values for capacitance will be readily determined by one of ordinary skill in the art.

[0032] In the illustrated driver circuit 100, the capacitor charges to a voltage of V_CA, which is expressed in Equation 2, which has been simplified for clarity. In Equation 2, V_BEindicates a diode drop as encountered in the voltage loop at the diode D 110 and at the input of the driven transistor, which is modeled as a diode 202. It will be understood by the skilled practitioner that the diode drops may not be equal.

[0033] V_CA=V_DD−2V_BE  (Eq. 2)

[0034] When the capacitor C_A114 is charged, the diode current I_Ddiminishes such that the resistor current I_Ris approximately the same as the current I_QLflowing through the input of the driven transistor. This relationship is expressed in Equation 3.

[0035] I_QL=I_R+I_D≈I_R  (Eq. 3)

[0036] The resistor current IR component of the load current I_QLcan provide the driven transistor with a forward bias such that the load transistor turns on. One of ordinary skill in the art will appreciate that even though a JFET may be “normally on” with relatively little bias applied at the gate, a positive bias can be applied to the input of the JFET to enhance the conductivity of the JFET from drain to source, i.e., to turn the JFET on harder. When the capacitor C_A114 is charged and the driven transistor has an input characteristic of a forward-biased diode as shown in FIG. 2, the voltage across the resistor R 112 is approximately the positive supply voltage V_DD116 minus the diode drop at the input of the driven transistor. The resistor current I_R, and using Equation 3, the current I_QLflowing through the input of the driven transistor, can be approximately expressed by Equation 4. $\begin{array}{cc}{I}_{\mathrm{QL}}\approx I_R=\frac{V_{\mathrm{DD}}-V_{\mathrm{BE}}}{R}& \left(\mathrm{Eq}.4\right)\end{array}$

[0037] In Equation 4, V_BErepresents the voltage drop of the diode drop at the input of the driven transistor, which is modeled as the diode 202. As illustrated by Equation 4, the resistor current I_Rvaries approximately inversely with the value of the resistor R 112. Accordingly, the value of the resistor R 112 can be selected to provide the transistor to be driven, e.g., the JFET Q_L160, with the desired amount of input drive current. It will be understood that parasitic resistances, such as circuit board trace resistances and the “on” resistance of the P-Channel MOSFET Q₁106 can also be included in the denominator of Equation 4. In one embodiment, where the positive supply voltage V_DD116 is about +5 Volts, the resistance of the resistor R 112 is about 50 ohms. It will be understood, however, that the amount of resistance for the resistor R 112 can vary in a very broad range depending on the amount of voltage of the positive supply voltage V_DD116, the size and characteristics of the driven transistor, e.g., the JFET Q_L160, the number of transistor driven where paralleled, etc. In addition, it will be understood by one of ordinary skill in the art that the resistor R 112 can be distributed among one or more resistors.

[0038] Operation of the driver circuit 100 will now be described with respect to the second state of the control signal 102. In the second state of the control signal 102, the voltage level of the control signal 102 is relatively high and in one embodiment is about at the level of the positive supply voltage V_DD116. The second state of the control signal 102 results in relatively little voltage drop from gate to source across the P-Channel MOSFET Q₁106, e.g., about 0V, which thereby turns off the P-channel MOSFET Q₁106 such that there is relatively little conductivity between the drain and the source of the P-Channel MOSFET Q₁106. The second state of the control signal 102 provides a relatively high voltage to drop across the gate to source of the N-Channel MOSFET Q₂108, e.g., about V_DDfrom gate to source, thereby turning the N-Channel MOSFET Q₂108 on so that there is relatively little resistance between the drain and the source of the N-Channel MOSFET Q₂108.

[0039] A simplified equivalent circuit of the driver circuit 100 in a state corresponding to the second state of the control signal 102 is provided in FIG. 3. Turning the N-Channel MOSFET Q₂108 to the “on” state effectively ties the first terminal of the capacitor C_A114 to ground. The diode D 110 prevents the capacitor C_A114 from discharging via the resistor R 112, thereby advantageously permitting the amount of capacitance for the capacitor C_A114 to be relatively low. This permits the negative of the voltage stored V_CAto be applied to the input of the driven transistor or the JFET Q_L160, which is represented in FIG. 3 as the diode 202. Where the driven transistor is the JFET Q_L160, the negative voltage reverse biases the gate to source so that the JFET is shut off, i.e., is not conductive. Advantageously, the driver circuit 100 provides this negative voltage on the output 104 without a negative power supply voltage bias or the use of transformer coupling.

[0040] In one embodiment, the control signal 102 transitions between the first state and second state at a relatively high frequency. Relatively high frequency switching can be benficial in reducing the cost, the size, and the weight of other components. In one example, the driver circuit 100 receives the control signal 102 and corresponding drives a power transistor coupled to the output 104 at a rate of about 500 kHz, which is relatively high for a power device.

[0041] As described earlier, for relatively high switching speeds, the control signal 102 should be provided from a source of relatively low output resistance such as the buffer circuit 150. The buffer circuit 150 can also be used to perform a level shift. One example of the buffer circuit 150 is a MOSFET driver IXDN402SI available from IXYS Corporation of Santa Clara, Calif. The buffer circuit 150 can be incorporated with the driver circuit 100. However, it will be understood by one of ordinary skill in the art that control circuits can already provide suitable output levels and low enough output impedance for driving the input of the driver circuit 100. It should be noted that the illustrated portion of the driver circuit 100 is logically inverting. Thus, it may be desirable in some applications to include a buffer circuit that is inverting, such as the buffer circuit 150 as shown in the illustrated embodiment of FIG. 1, such that the logical state from an input 152 to the output 104 is not inverted. In another embodiment, the buffer circuit is non-inverting.

[0042] FIG. 4 illustrates a driver circuit 400 according to another embodiment of the invention. Operation of the driver circuit 400 of FIG. 4 is similar to the operation of the driver circuit 100 described earlier in connection with FIG. 1. In the driver circuit 400, the rectifying device is actively switched. In the illustrated embodiment of the driver circuit 400, the rectifying device is a second P-Channel MOSFET Q₃402, but it will be apparent to skill in the art that other devices can be used.

[0043] In the illustrated driver circuit 400, the gate of the second P-Channel MOSFET Q₃402 is tied to the same node as the gate of the P-Channel MOSFET Q₁106. The source of the second P-Channel MOSFET Q₃402 is also tied to the same node as the source of the P-Channel MOSFET Q₁106. The second P-Channel MOSFET Q₃402 and the P-Channel MOSFET Q₁106 thereby switch on and switch off at approximately the same time.

[0044] The second P-Channel MOSFET Q₃402 and the P-Channel MOSFET Q₁106 both turn on when the control signal 102 is in the first state, i.e., is relatively low. The second P-Channel MOSFET Q₃402 and the P-Channel MOSFET Q₁106 both turn off when the control signal 102 is in the second state, i.e., is relatively high. When turned on, the second P-Channel MOSFET Q₃402 ties the first terminal of the capacitor C_A114 to the positive supply voltage V_DD116, and thereby permits charging of the capacitor C_A114. When turned “off,” the second P-Channel MOSFET Q₃402 prevents the capacitor C_A114 from discharging through an undesired path such as through the resistor R 112.

[0045] Embodiments of the invention can advantageously provide an input drive to a transistor, such as to a power JFET, such that a positive bias is provided to turn the transistor on and a negative bias is provided to turn the transistor off. Further advantageously, the drive circuits disclosed can operate from a single power supply bias, though it will be understood by the skilled practitioner that additional biases can also be used.

[0046] Various embodiments of the invention have been described above. Although this invention has been described with reference to these specific embodiments, the descriptions are intended to be illustrative of the invention and are not intended to be limiting. Various modifications and applications may occur to those skilled in the art without departing from the true spirit and scope of the invention as defined in the appended claims.