US 5,686,823 AGrant
Bandgap Voltage Reference Circuit
Issue Date:1997-11-11
•18 Claims
•3 Drawing Sheets
Abstract
A bandgap voltage reference circuit includes a feedback controlled current mirror, a bandgap voltage generator, and a voltage comparator. The current mirror, in response to a feedback control signal from the voltage comparator, generates a controllable reference current. The bandgap voltage generator generates two reference voltages based upon conduction of the reference current from the current mirror through two PN diodes having different emitter areas. The voltage comparator compares the two reference voltages and generates the feedback control signal for the current mirror. Such a bandgap voltage reference circuit simultaneously generates a bandgap voltage reference and a current mirror reference while also being operable over a wide power supply voltage range and down to very low power supply voltage values.
Metadata
Assignee
- National Semiconductor Corporation
Inventor
- A. Karl Rapp
Application Information
Application Number:US 6893112
Filing Date:1996-08-07
Priority Date:1996-08-07
Art Unit:211
Classifications
IPC:
G05F 326
Field of Search:
323327313;314;315;316;312;281530;538;539
Patent Drawings (3 sheets)
Description
Background of the Invention
1. Field of the Invention
The present invention relates to a bandgap voltage reference generator circuit which operates over a wide supply voltage range and consumes little supply current.
2. Description of the Related Art
Bandgap voltage references are well known for obtaining a reference voltage that is relatively constant over a substantial temperature range. The basic concept is to combine two potentials, one having a positive temperature coefficient and one having a negative temperature coefficient. The sum of these two potentials is made equal to the semiconductor bandgap potential extrapolated to absolute zero temperature. For silicon, this value is close to 1.2 volts.
Typically, the negative temperature coefficient potential is obtained from a forward-biased PN junction, i.e., the emitter-base junction in a conducting transistor operated at a current that will produce a voltage drop of about 600 mV at 300.degree. K. This voltage has a negative temperature coefficient of about 2 mV/.degree.C. The positive temperature coefficient is obtained from a .DELTA.V.sub.BE -producing circuit that develops a 600 mV potential at about 300.degree. K. This voltage has a positive temperature coefficient of about 2 mV/.degree.C. Thus, when these two voltages are combined at 300.degree. K, a 1.2 V potential is produced with close to zero temperature coefficient.
The .DELTA.V.sub.BE potential is typically produced by operating a pair of transistors or diodes at substantially different current densities. This can be done by ratioing the transistor or diode areas and passing equal currents, or by using matched area devices and ratioing the currents. If desired, a combination of transistor size and current ratioing can be employed. The low-current-density transistor includes a series resistor. The two devices are equivalently connected in parallel so that the differential voltage drop (.DELTA.V.sub.BE) appears across the resistor. Typically, at 300.degree. K and a current-density ratio of 10, the .DELTA.V.sub.BE will be about 60 mV. This value, when multiplied by 10, produces a voltage of about 600 mV having a positive temperature coefficient.
Summary of the Invention
A bandgap voltage generator in accordance with the present invention provides a highly stable temperature-constant bandgap voltage reference circuit that simultaneously generates a bandgap voltage reference and a current mirror reference and operates over a wide power supply voltage range and down to very low power supply voltage values.
In accordance with one embodiment of the present invention, a bandgap voltage generator includes a current source, a current amplifier, a voltage generator and a voltage comparator. The current source is configured to receive a control signal and in accordance therewith provide an input current which is adjustable in accordance with the control signal. The current amplifier is coupled to the current source and is configured to conduct the input current and in accordance therewith conduct an output current which is proportional to the input current. The voltage generator is coupled to the current amplifier, includes first and second PN junction devices having first and second current densities, and is configured to receive the output current and in accordance therewith generate first and second voltages. The first and second voltages are approximately proportional to the output current and are dependent upon the first and second current densities, respectively. The voltage comparator is coupled to the voltage generator and the current source and is configured to receive and compare the first and second voltages and in accordance therewith provide the control signal such that the first and second voltages are equal.
In accordance with another embodiment of the present invention, a bandgap voltage generator includes a reference voltage generator, a voltage converter and a voltage comparator. The reference voltage generator includes a controllable shunt circuit which is configured to receive a control signal, generate a shunt current which is adjustable in accordance with the control signal and generate a reference voltage which is adjustable in accordance with the shunt current. The voltage converter is coupled to the reference voltage generator, includes first and second PN junction devices having first and second current densities, and is configured to receive the reference voltage and generate first and second voltages which are dependent upon the first and second current densities, respectively, and are adjustable in accordance with the reference voltage. The voltage comparator is coupled to the voltage converter and the reference voltage generator and is configured to receive and compare the first and second voltages and in accordance therewith provide the control signal such that the first and second voltages are equal.
These and other features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings.
Brief Description of the Drawings
FIG. 1 is a simplified schematic showing the high gain feedback loop for a bandgap voltage reference circuit in accordance with the present invention and which includes a current reference circuit.
FIG. 2 is a schematic diagram illustrating a CMOS version of a bandgap voltage reference with a high gain feedback loop in accordance with the present invention and which shows a low-power voltage output comparator.
FIG. 3 is a simplified schematic diagram illustrating another embodiment of a bandgap reference circuit with a high gain feedback loop in accordance with the present invention which is shown with current reference signals supplied by a current reference external to the bandgap voltage reference circuit.
FIG. 4 is a schematic diagram illustrating another embodiment of a bandgap voltage reference circuit with a high gain feedback loop in accordance with the present invention which is shown with current reference signals supplied by a current reference external to the bandgap voltage reference circuit and which shows a low-power voltage output comparator.
Detailed Description of the Invention
To aid explanation and understanding, where components are similar between figures, the same identifying label has been used. Where components of different diagrams perform similar functions, but vary in dimensions, they are identified with the number of the figure as the most significant digit and with identical least significant digits in the identifying label.
FIG. 1 illustrates a simplified schematic diagram of the .DELTA.V.sub.BE portion of a bandgap voltage reference circuit 100 with a high gain feedback loop driven by a voltage output comparator 10 in accordance with the present invention. In the FIG. 1 circuit, the currents I.sub.a and I.sub.b flow in PN diodes 12 and 13, respectively. As shown in FIG. 1, the emitter area of diode 13 is 10 times that of diode 12. Voltage V.sub.a is developed across diode 12 and appears at circuit node 15. Voltage V.sub.b is developed across the series combination of diode 13 and resistor R4 so that this voltage appears at circuit node 16. Resistors R2 and R3 function primarily to determine the levels of currents I.sub.b and Ia, respectively, which, in the preferred embodiment of the invention, are made equal. As shown in FIG. 1, and described in detail below, and in accordance with the present invention, a voltage output comparator 10 has its differential inputs connected to nodes 15 and 16 and its voltage output 11 connected to control the current input I.sub.s shown in FIG. 1.
In FIG. 1, a current reference circuit made up of p-channel reference transistor P1, p-channel current mirror transistor P2, n-channel current reference transistor N1, n-channel current mirror transistor N2, and current reference circuit resistor R1 establish a reference current I. The reference current I in transistor P1 is mirrored and ratioed in p-channel current mirror transistor P3 to control current I.sub.s which is the current source for the resistor and divider network of the bandgap voltage reference circuit. Resistor R1 is sized such that the reference current I established by the current reference circuit is insufficient to achieve balance between voltages V.sub.a and V.sub.b, at circuit nodes 15 and 16 respectively, which are input to voltage output comparator 10.
The comparator 10 monitors the voltages V.sub.a and V.sub.b in the bandgap circuit and generates feedback control signal 11 which controls the conductance of a current shunt transistor N3. Transistor N3, in turn, produces a current I.sub.3 which shunts the resistor R1 in the current reference. By varying the magnitude of I.sub.3, the current in transistor P1 and the mirror current I.sub.s in transistor P3 can be modified which controls the currents I.sub.a and I.sub.b in the two branches of the bandgap voltage reference. The voltages V.sub.a and V.sub.b vary in response to currents I.sub.a and I.sub.b, respectively, to complete the feedback loop. The feedback causes the shunt transistor N3 to conduct the correct amount of current to balance voltages V.sub.a and V.sub.b at the inputs to comparator 10. The high sensitivity of the shunt transistor N3 to the voltage output 11 from comparator 10 gives the feedback loop very high gain.
The schematic for an embodiment of the bandgap voltage reference circuit 100 is shown in FIG. 2. In this circuit, the resistors R2, R3 and R4 in the bandgap branches are formed by four smaller resistors R200, R202, R203 and R204 to save die area. A startup transistor N210 is shown that is driven by a Startup signal to ensure that current flow is established in the current reference circuit. Diode 13 is fabricated as a plurality of ten diode-connected transistors of the same size as diode-connected transistor 12 connected in parallel to produce the equivalent of a large diode with a PN junction area ten times that of diode-connected transistor 12.
An embodiment of the voltage comparator 10 is also shown in FIG. 2. Input transistors 224 and 226 are native devices connected together at their sources and also to the drain of current mirror transistor 228. Current mirror transistor 228 has its gate connected to an n-channel current reference voltage Nmr which is obtained from the current reference circuit, as shown here, or from an external current reference, as described below. The input transistors 224 and 226 are connected to load transistors 220 and 222 respectively. The load transistors 220 and 222 are driven by p-channel current reference voltage Pmr which is obtained from the current reference circuit, as shown here, or from an external current reference.
Branching off from the drain of each input transistor 224 and 226 is a clamped-active p-channel transistor (230 and 234, respectively) in series with an n-channel transistor (232 and 236, respectively). The clamped-active transistors 230 and 234 each have their gate connected to the ground potential and function to maintain the input transistors in their active region by preventing the drain voltage of the input transistors from falling below one p-channel threshold voltage. N-channel transistor 236 is diode connected and connected to the gate of transistor 232 which will consequently mirror the current in transistor 236.
At balance, the current reference voltages will induce a current of magnitude I in transistor 228 and in each of load transistors 220 and 222. Because transistor 228 can only sink current I, the remaining current sourced by load transistors 220 and 222 must be sunk by the branch legs off of each input transistor 224 and 226. With the circuit at balance, I/2 flows through the branch leg including clamped-active transistor 234 and diode connected transistor 236. Current mirror transistor 232 mirrors the current in transistor 236 so that I/2 flows in clamped-active transistor 230 and transistor 232.
When the voltages V.sub.a and V.sub.b are not balanced, then the resulting difference in input voltage to transistors 224 and 226 alters the currents in the branch legs to produce an output voltage signal 11 at the drain of transistor 232. For example, when V.sub.b is greater than V.sub.a, input transistor 224 conducts more current than input transistor 226. Because current sink transistor 228 maintains a constant current level, the additional current passing through transistor 24 must be counterbalanced by reduced current flow in input transistor 226. The reduction in current through input transistor 226 results in more current flowing into transistor 234 and diode connected transistor 236. The current in transistor 236 is mirrored by transistor 232 which is driven harder while, simultaneously, there is less current flowing through transistor 230 because of the additional current drawn by input transistor 224. The consequence is that the output voltage 11 at the drains of transistors 230 and 232 drops in proportion to the amount by which V.sub.b exceeds V.sub.a.
Conversely, when V.sub.a is greater than V.sub.b, the relationship between the relative currents in the branch legs of the comparator is reversed. Input transistor 224 conducts less current resulting in more current flowing through input transistor 226. As a consequence, less current flows in transistor 234 and diode connected transistor 236 resulting in less current draw in mirror transistor 232. At the same time, because input transistor 224 is conducting less current, more current is available through transistor 230 and the output voltage 11 rises in proportion to the difference between V.sub.a and V.sub.b.
The circuit nodes 15 and 16 of the bandgap voltage reference are connected to the input transistors 224 and 226 of the voltage comparator. The voltage output control signal 11 of the comparator drives the gate of shunt transistor N3 to control the current in transistor N1 and, consequently, also the current in transistor P3 to form the high gain feedback loop described above. The signal V.sub.ref is the stable voltage reference level generated by the circuit 200.
The circuit of FIG. 2 may be formed using CMOS technology employing the following components:
Transistors 224 and 226 are constructed to have low (about 0.2 volt) thresholds. The nominal operating power supply voltage range is 1.5-6.0 volts. When the circuit is stable (i.e., balance is achieved), the current in transistor P3 is 12 microamperes. Hence, the current "I" in transistor P1 is 2.4 microamperes (i.e., 10/50 of 12 microamperes).
In FIG. 3, a simplified schematic of a bandgap voltage reference circuit 300 with an externally controlled current source S1 is shown. When current reference voltages are available from an external source, then the reference circuit 300 may be employed which is simplified version of the bandgap voltage reference circuit 100 of FIGS. 1 and 2 and requires no startup signal.
The current sink S1 sinks a current I which, as was the case above, induces current I.sub.s in transistor P3 that is less than the current necessary to balance voltages V.sub.a and V.sub.b in the two legs of the bandgap reference circuit. Voltages V.sub.a and V.sub.b are input to comparator 10 which produces voltage output control 11 that drives shunt transistor N3 in order to vary the current I.sub.3 and thereby form the high gain feedback loop discussed above.
FIG. 4 is a detailed schematic of a bandgap voltage reference 400 which implements the design of FIG. 3. The current source S1 is driven by externally supplied n-channel current reference signal Nmr which also drives current sink transistor 428 in the voltage comparator circuit. Similarly, externally supplied p-channel current reference signal Pmr drives load transistor 420 and 422 that source constant currents in the two branches of the voltage comparator circuit. The current I in current sink S1 combines with the current I.sub.3 in shunt transistor N3 to determine the current in transistor P1 and, consequently, control the current I.sub.s supplied to the two branches of the bandgap voltage reference circuit by transistor P3 and which ultimately determines the level of the voltage V.sub.a and V.sub.b input to the comparator. The current I.sub.3 in shunt transistor N3 is controlled by the voltage output control signal 11 from the comparator circuit to form the high gain feedback loop that controls the bandgap voltage circuit 400. The output signal V.sub.ref is the stable voltage reference output generated by the circuit 400.
The circuit of FIG. 4 may be formed using CMOS technology employing the following components:
Transistors 424 and 426 are constructed to have low (about 0.2 volt) thresholds. The nominal operating power supply voltage range and current are 1.5-6.0 volts and 15.2 microamperes, respectively. When the circuit is stable (i.e., balance is achieved), the current in transistor P3 is 12 microamperes. Hence, the current in transistor P1 (i.e., the sum of currents "I" and "I.sub.3 " in transistors S1 and N3, respectively) is 1.2 microamperes (i.e., 10/100 of 12 microamperes).
It should be understood that various alternatives to the embodiments of the invention described herein may be employed in practicing the invention. It is intended that the following claims define the scope of the invention and that methods and circuits within the scope of these claims and their equivalents be covered thereby.
Claims
What is claimed is:
1. An apparatus including a bandgap voltage generator comprising: a current source configured to receive a control signal and in accordance therewith provide an input current which is adjustable in accordance with said control signal, wherein said current source includes a current shunt configured to be coupled across a current conductor and receive said control signal, and wherein said current conductor conducts a series current, said current shunt conducts a shunt current in accordance with said control signal and said input current comprises a sum of said series current and said shunt current; a current amplifier, coupled to said current source, configured to conduct said input current and in accordance therewith conduct an output current which is proportional to said input current; a voltage generator, coupled to said current amplifier, including first and second PN junction devices having first and second current densities, and configured to receive said output current and in accordance therewith generate first and second voltages, wherein said first and second voltages are approximately proportional to said output current and are dependent upon said first and second current densities, respectively; and a voltage comparator, coupled to said voltage generator and said current source, configured to receive and compare said first and second voltages and in accordance therewith provide said control signal such that said first and second voltages are equal.
2. The apparatus of claim 1, further comprising a resistor as said current conductor.
3. The apparatus of claim 1, wherein said current amplifier comprises a current mirror.
4. The apparatus of claim 1, wherein said voltage generator comprises: a first circuit branch including said first PN junction device and first and second resistors serially coupled thereto; and a second circuit branch including said second PN junction device and a third resistor serially coupled thereto.
5. The apparatus of claim 4, wherein said first voltage is generated across said first PN junction device and said first resistor and said second voltage is generated across said second PN junction device.
6. An apparatus including a bandgap voltage generator comprising: a reference voltage generator including a controllable shunt circuit configured to receive a control signal, generate a shunt current which is adjustable in accordance with said control signal and generate a reference voltage which is adjustable in accordance with said shunt current; a voltage converter, coupled to said reference voltage generator, including first and second PN junction devices having first and second current densities, and configured to receive said reference voltage and generate first and second voltages which are dependent upon said first and second current densities, respectively, and are adjustable in accordance with said reference voltage; and a voltage comparator, coupled to said voltage converter and said reference voltage generator, configured to receive and compare said first and second voltages and in accordance therewith provide said control signal such that said first and second voltages are equal.
7. The apparatus of claim 6, wherein said reference voltage generator comprises a current shunt configured to be coupled across a current conductor and receive said control signal, wherein said current conductor conducts a series current, said current shunt conducts a shunt current in accordance with said control signal and said input current comprises a sum of said series current and said shunt current and said reference voltage is generated in accordance with said input current.
8. The apparatus of claim 6, wherein said reference voltage generator comprises: a resistor configured to conduct a series current; and a current shunting device, coupled across said resistor, configured to receive said control signal and in accordance therewith conduct a shunt current; wherein said input current comprises a sum of said series current and said shunt current and said reference voltage is generated in accordance with said input current.
9. The apparatus of claim 6, wherein said voltage generator comprises: a first circuit branch including said first PN junction device and first and second resistors serially coupled thereto; and a second circuit branch including said second PN junction device and a third resistor serially coupled thereto.
10. The apparatus of claim 9, wherein said first voltage is generated across said first PN junction device and said first resistor and said second voltage is generated across said second PN junction device.
11. A method of generating a bandgap voltage, said method comprising the steps of: receiving a control signal and in accordance therewith generating an input current which is adjustable in accordance with said control signal by conducting a series current with a current conductor, and coupling across said current conductor and receiving a control signal and in accordance therewith conducting a shunt current, wherein said input current comprises a sum of said series current and said shunt current; conducting said input current and in accordance therewith conducting an output current which is proportional to said input current; receiving said output current with first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are approximately proportional to said output current and are dependent upon said first and second current densities, respectively; and receiving and comparing said first and second voltages and in accordance therewith generating said control signal such that said first and second voltages are equal.
12. The method of claim 11, wherein said step of conducting said input current and in accordance therewith conducting an output current which is proportional to said input current comprises receiving said input current and generating said output current with a current mirror.
13. The method of claim 11, wherein said step of receiving said output current with first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are approximately proportional to said output current and are dependent upon said first and second current densities, respectively, comprises: receiving a portion of said output current with a first circuit branch including said first PN junction device and first and second resistors serially coupled thereto; and receiving another portion of said output current with a second circuit branch including said second PN junction device and a third resistor serially coupled thereto.
14. The method of claim 13, wherein said step of receiving said output current with first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are approximately proportional to said output current and are dependent upon said first and second current densities, respectively, comprises generating said first voltage across said first PN junction device and said first resistor and generating said second voltage across said second PN junction device.
15. A method of generating a bandgap voltage, said method comprising the steps of: receiving a control signal with a controllable shunt circuit and generating therewith a shunt current which is adjustable in accordance with said control signal; generating a reference voltage which is adjustable in accordance with said shunt current; receiving said reference voltage with a circuit which includes first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are dependent upon said first and second current densities, respectively, and are adjustable in accordance with said reference voltage; and receiving and comparing said first and second voltages and in accordance therewith generating said control signal such that said first and second voltages are equal.
16. The method of claim 15, wherein said step of receiving a control signal with a controllable shunt circuit and generating therewith a shunt current which is adjustable in accordance with said control signal comprises: conducting a series current with a current conductor; and coupling across said current conductor and receiving said control signal and in accordance therewith conducting a shunt current, wherein said input current comprises a sum of said series current and said shunt current and said reference voltage is generated in accordance with said input current.
17. The method of claim 15, wherein said step of receiving said reference voltage with a circuit which includes first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are dependent upon said first and second current densities, respectively, and are adjustable in accordance with said reference voltage comprises: receiving said reference voltage and in accordance therewith generating an output current; receiving a portion of said output current with a first circuit branch including said first PN junction device and first and second resistors serially coupled thereto; and receiving another portion of said output current with a second circuit branch including said second PN junction device and a third resistor serially coupled thereto.
18. The method of claim 15, wherein said step of receiving said reference voltage with a circuit which includes first and second PN junction devices having first and second current densities and in accordance therewith generating first and second voltages which are dependent upon said first and second current densities, respectively, and are adjustable in accordance with said reference voltage comprises generating said first voltage across said first PN junction device and said first resistor and generating said second voltage across said second PN junction device.
Patent Citations (31)
| Patent | Date | Inventor | Cited By |
|---|---|---|---|
| US4151482 | 1979-04-01 | Robe | |
| US4251743 | 1981-02-01 | Hareyama | |
| US4287439 | 1981-09-01 | Leuschner | |
| US4399398 | 1983-08-01 | Wittlinger | |
| US4447784 | 1984-05-01 | Dobkin | |
| US4628248 | 1986-12-01 | Birrittella et al. | |
| US4656374 | 1987-04-01 | Rapp | |
| US4816742 | 1989-03-01 | van de Plaasche | |
| US4839535 | 1989-06-01 | Miller | |
| US4849684 | 1989-07-01 | Sonntag et al. | |
| US4896094 | 1990-01-01 | Greaves et al. | |
| US4924113 | 1990-05-01 | Schade, Jr. | |
| US4935690 | 1990-06-01 | Yan | |
| US4939442 | 1990-07-01 | Carvajal et al. | |
| US4977336 | 1990-12-01 | Martiny | |
| US5038055 | 1991-08-01 | Kinoshita | |
| US5063342 | 1991-11-01 | Hughes et al. | |
| US5084665 | 1992-01-01 | Dixon et al. | |
| US5087831 | 1992-02-01 | Ten Eyck | |
| US5089769 | 1992-02-01 | Petty et al. | |
| US5160882 | 1992-11-01 | Ten Eyck | |
| US5221864 | 1993-06-01 | Galbi et al. | |
| US5229710 | 1993-07-01 | Kraus et al. | |
| US5245273 | 1993-09-01 | Greaves et al. | |
| US5289111 | 1994-02-01 | Tsuji | |
| US5291122 | 1994-03-01 | Audy | |
| US5453679 | 1995-09-01 | Rapp | |
| US5559425 | 1996-09-01 | Allman | |
| US5592123 | 1997-01-01 | Ulbrich | |
| US5612613 | 1997-03-01 | Dutt | |
| EPX415620A2 | 1991-03-01 |
Non-Patent Literature (4)
- M.A. Rybicki, "A Push-Pull Transconductance Amplifier with Extended Power Supply and Common Mode Range", Motorola Technical Developments, Aug. 1989, pp. 58-59.
- Chung-Yu Wu et al., "New Fully Differential HF CMOS OP Amp's With Efficient Common Mode Feedback", 1989 IEEE International Symposium on Circuits and Systems, vol. 3 of 3, May 1989, pp. 2076-2079.
- J. Fisher et al., "A Highly Linear CMOS Buffer Amplifier", IEEE Journal of Solid-State Circuits, vol. SC-22, No. 3, Jun. 1987, pp. 330-334.
- D. Senderowicz et al., "PCM Telephony: Reduced Architecture for a D/A Converter and Filter Combination", IEEE Journal of Solid-State Cirucits, 25, (1990) Aug., No. 4, pp. 987-995.