US 4,399,398 AGrant
Voltage Reference Circuit With Feedback Circuit
Issue Date:1983-08-16
•7 Claims
•1 Drawing Sheets
Abstract
A bandgap reference voltage generating circuit develops a predetermined reference potential between first and second terminals. A pair of transistors are operated at different emitter current densities to develop a difference between their base-emitter potentials. That difference is applied across a first resistance and is increased and applied across a second resistance. The reference potential comprises the sum of at least the scaled-up potential and the conduction potential of a semiconductor junction. A regulating transistor completes a degenerative feedback connection and controls the current flowing between the first and second terminals responsive to the reference potential departing from the predetermined value. A regenerative feedback connection responds to the current in the regulating transistor to decrease the potential across the second resistance when the controlled current increases.
Metadata
Assignee
- RCA Corporation
Inventor
- Harold A. Wittlinger
Application Information
Application Number:US 2791943
Filing Date:1981-06-30
Priority Date:1981-06-30
Art Unit:214
Classifications
IPC:
G05F 1613G05F 320
Field of Search:
307323330296 R;297226;311-316296;297
Patent Drawings (1 sheets)
Description
The present invention relates generally to electronic circuits for developing a reference potential, and specifically to those employing a regenerative feedback circuit.
Voltage reference circuits, commonly referred to as "band-gap voltage reference circuits", can be employed as a two-terminal voltage regulator substitutable for an avalanche diode. In that case, it is desired that its potential be substantially unaffected as the current through the reference circuit varies substantially. In other words, a two-terminal voltage reference circuit should exhibit a very low resistance.
To that end, a circuit for developing a predetermined value of reference potential between a pair of terminals according to the present invention includes a pair of transistors conditioned to operate at different emitter current densities to develop a difference between their respective base-emitter potentials. That difference potential is applied to a first resistance and is increased and applied across a second resistance in proportion to the first and second resistances. At least the potential across the second resistance is summed with the conduction potential of a semiconductor junction to develop the reference potential. The portion of the present invention for maintaining the reference potential at the predetermined value comprises a regulating apparatus providing a degenerative feedback configuration for controlling the current flowing between the terminals when the reference potential departs from the predetermined value. A regenerative feedback configuration controls the potential across the second resistance responsive to the controlled current.
In the drawing:
FIGS. 1 and 2 are schematic diagrams of exemplary embodiments including the present invention.
Voltage reference circuit 10 of FIG. 1 serves as a two-terminal voltage regulator for maintaining the potential between terminals 12 and 14 at a predetermined value V.sub.BG. That value is maintained substantially constant irrespective of variations in the current conducted by regulator 10 between terminals 12 and 14 owing to variations in voltage source EB, shown by way of example as a battery, and in source resistance RS. Regulator 10 could be substituted for an avalanche diode connected between terminals 12 and 14.
To develop a reference potential, NPN transistors T1 and T2 are conditioned to operate at different emitter current densities. The emitter currents of T1 and T2 are
and
In equations (1) and (2), I.sub.E-T1 and I.sub.E-T2 are the emitter currents of transistors T1 and T2, respectively, and V.sub.BE-T1 and V.sub.BE-T2 are the base-emitter voltages of T1 and T2, respectively.
Since the base-emitter voltages V.sub.BE of T1 and T2 are nearly the same, the emitter currents of T1 and T2 are substantially determined by the values of resistors R1 and R2. Thus, the ratio of their emitter currents is
When T1 and T2 are of like emitter junction area, their emitter current densities are also in about R1/R2 ratio. Alternatively, the desired ratio of emitter current densities can be obtained by using transistors of different emitter junction areas and adjusting the current ratio accordingly.
When the emitter current densities of T1 and T2 are selected in about 10:1 ratio, their base-emitter voltages differ by about 60 millivolts. Because the bases of T1 and T2 connect together, that difference potential .DELTA.VBE is developed between terminals 14 and 16 and is applied across resistor R3. R3 thus conducts a current determined by .DELTA.VBE and is of value selected so that its current is substantially the same as the collector-emitter current of T2. Since the resistance of R7 is substantially larger than that of R3, the current in R7 is relatively small. Thus, to simplify the immediately following description, the quiescent current in R7 will be ignored even though it is supplied from the emitter of T2.
Since substantially equal currents flow in R2 and R3, the voltage developed across R2 is .DELTA.VBE increased by the resistance ratio R2/R3. .DELTA.VBE, and thus the voltage across R2, exhibit a positive temperature coefficient (PTC). Since the emitter currents of T1 and T2 are in selected ratio, the potential across R1 is substantially the same as that across R2. The R1 PTC voltage is summed with the V.sub.BE of T1 because they are in series connection between terminals 12 and 14. That sum is about 1.25 volts; V.sub.BE-T1 has a negative temperature coefficient (NTC). The relative values of R2 and R3 are selected so that the PTC of the voltage across R2, and therefore that across R1, is of substantially the same magnitude as the NTC of T1. As a result, the summed voltage can have substantially zero temperature coefficient. It is noted that the PTC voltage across R2 is summed with the NTC V.sub.BE of T3 and that sum also equals V.sub.BG.
A degenerative (negative) feedback connection is employed to maintain the potential between terminals 12 and 14 at V.sub.BG by conducting current therebetween, primarily in the collector-emitter path of NPN transistor T5. NPN transistors T3 and T4 are cascade-connected common-emitter amplifiers including collector resistors R4 and R5, respectively. If V.sub.BG were assumed to increase, then the voltage at T2 collector increases causing T3 to conduct more heavily. That, in turn, reduces the collector voltage of T3 causing T4 to conduct less heavily, thus increasing its collector voltage and causing T5 to conduct more heavily. That increased current in T5 increases the current flowing in RS to return V.sub.BG to its predetermined value. Opposite changes occur to return V.sub.BG if it were assumed to have decreased. Capacitor C stabilizes the degenerative feedback loop against undesirable oscillations.
The degree to which the shunt regulation feedback just described corrects changes in V.sub.BG depends upon the magnitude of the gain of T3, T4 and T5. Since that gain is finite in practical circuits, a finite change in V.sub.BG results from any given change in current flowing in regulator 10. As a result, regulator 10 exhibits an apparent non-zero resistance.
To reduce this resistance, a regenerative (positive) feedback connection responds to the current flow in T5. Resistor R6, of relatively small value compared to R3 or R7, develops a voltage proportional to the emitter current of T5.
Because the voltage across R3 is determined by .DELTA.VBE and thus tends to not change, the voltage across resistor R7 decreases by the amount of the increase in the R6 voltage. That decreases the current flow in R7 which decreases the current supplied from the emitter of T2. That decrease reduces the voltage across R2 which increases the T2 collector voltage. As described above, that increase is coupled by T3 and T4 to cause T5 to conduct slightly more heavily thereby to further reduce V.sub.BG. The values of R6 and R7 are selected so that the change of V.sub.BG is reduced to the desired low value when the current flowing in regulator 10 varies between its minimum and maximum levels.
In a circuit constructed with the values shown in FIG. 1 and with T1-T5 being an RCA CA3086 transistor array, V.sub.BG was 1.238 volts when one milliampere was conducted by regulator circuit 10. Over a range of that current from 0.5 to 5.0 milliamperes, the resistance exhibited was less than 0.05 ohms. V.sub.BG exhibited a temperature coefficient of about 0.01% per degree Celsius.
Modifications to the embodiment described are contemplated, and the present invention is limited only by the claims following. For example, FIG. 2 is a modification wherein resistor R7 has been deleted and the function of R6 is performed by portion R3A of resistor R3' which has a very low resistance compared to that of portion R3B. FIG. 2 further differs in that NPN transistors T4 and T5 are replaced by PNP transistor T5'; such replacements and modifications are satisfactory so long as the relationship that increasing voltage at the T2 collector causes increased current flow between terminals 12 and 14. The remainder of the circuit of FIG. 2 operates in like manner to that previously described in relation to FIG. 1.
Claims
What is claimed is:
1. A circuit for developing a predetermined value of reference potential between first and second terminals comprising: a pair of transistors; first and second resistances; means connecting said pair of transistors and said first and second resistances in circuit between said first and second terminals for operating said pair of transistors at different emitter current densities to develop a difference between their respective base-emitter potentials, wherein said first resistance is connected for receiving said difference potential and said second resistance is connected for receiving said difference potential increased in proportion to the resistances of said first and second resistances, and wherein at least the potential across said second resistance is summed with the conduction potential of at least one semiconductor junction to develop said reference potential between said first and second terminals; regulating means, coupled between said first and second terminals to conduct a controlled current therebetween, for maintaining said reference potential at said predetermined value by increasing and decreasing said controlled current flowing between said first and second terminals in response to said reference potential departing from said predetermined value in increasing and decreasing senses, respectively, wherein said regulating means provides a degenerative (negative) feedback connection; and control means for maintaining said reference potential at said predetermined value by controlling the potential across said second resistance in response to said controlled current flowing through said regulating means, wherein said control means provides a regenerative (positive) feedback connection.
2. The circuit as set forth in claim 1 wherein: said regulating means is connected between said first and second terminals for conducting said controlled current therebetween; and said control means decreases and increases the potential across said second resistance responsive to increase and decrease, respectively, in said controlled current.
3. The circuit as set forth in claim 2 wherein said control means includes means for causing said controlled current to flow in a portion of said first resistance.
4. The circuit as set forth in claim 2 wherein said control means includes a third resistance through which said controlled current flows, means for connecting one end of said third resistance to one end of said first resistance, and a fourth resistance connected between the respective other ends of said first resistance and said third resistance.
5. The circuit as set forth in claim 4 wherein said third resistance exhibits a resistance substantially less than that of said first resistance and said fourth resistance exhibits a resistance substantially greater than that of said first resistance.
6. The circuit as set forth in claim 3 or 4 wherein the one end of said first resistance connects to said first terminal and the other end thereof connects to the emitter electrode of a first one of said pair of transistors, the emitter electrode of the other of said pair of transistors connects to said first terminal, and the respective base electrodes of said pair of transistors connect together.
7. The circuit as set forth in claim 1 or 2 wherein said regulating means includes: a regulating transistor having a principal conduction path between its output and common electrodes coupled between said first and second terminals, and having an input electrode coupled for receiving an error signal; and means responsive to said reference potential for developing said error signal poled to increase the conduction of said regulating transistor when the potential between said first and second terminals exceeds said predetermined value.
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