Method of transferring electric charge from image sensing device and image sensing device

[0001] 1. Field of the Invention

[0002] The present invention relates to a method for transferring an electric charge from an image sensing device and an image sensing device preferable for use in a video camera enabling to take pictures of moving images and still images.

[0003] 2. Description of the Related Art

[0004] A solid-sate image sensing device outputs an electric signal converted from an incoming light image and is utilized for a video camera and a digital still camera. As for the solid-state image sensing device, a high resolution image can be obtained by increasing a number of pixels of the image sensing device. Recently, video camera users want to obtain not only moving images but also a high resolution still image taken by a video camera. Accordingly, the image sensing device for video camera is in need of having more pixels.

[0005] FIG. 6 is a plan view of a conventional solid-state image sensing device. In FIG. 6, the image sensing device is composed of a photoelectric converter 31 for converting light images into an electric signal, a vertical transfer CCD (hereinafter referred to as “VCCD”) 32 for transferring an electric charge to vertical shift register, a horizontal transfer CCD (hereinafter referred to as “HCCD”) 33 for transferring an electric charge to horizontal shift register, an amplifier 34 for amplifying the electric charge from the HCCD 33.

[0006] A timing generator not shown generates a read-out pulse for each VD (vertical sync signal) period of a television signal. The electric charge stored in each photoelectric converter 31 is transferred to the adjacent VCCD 32 each time when generating the read-out pulse.

[0007] The VCCD 32 shifts the electric charge from each photoelectric converter 31 to the succeeding stage of the VCCD 32 one by one toward the HCCD 33. The HCCD 33 outputs all electric charges transferred from the VCCD 32 through the amplifier 34. Accordingly, the velocity of shifting the electric charge in HCCD 33 should be adjusted to the speed which can output all the electric charges transferred from the VCCD 32 through the amplifier 34 at each time when electric charges equivalent to one stage of the VCCD 32 are transferred from the VCCD 32.

[0008] As described above, the electric charge stored in each photoelectric converter 31 is temporally transferred to VCCD 32. The electric charges transferred from VCCD 32 to HCCD 33 are shifted to horizontal direction and outputted through the amplifier 34.

[0009] When the number of pixels in the vertical direction and the horizontal direction of photoelectric converter 31 increases, the number of stages for shifting electric charge in the VCCD 32 and the HCCD 33 also increases. Accordingly, a clock frequency for transferring electric charge should be increased as the number of pixels of the photoelectric converter 31 increases.

[0010] However, the increase of clock frequency may cause problems such as generating heat, increasing electric power consumption, and deteriorating signal to noise ratio. FIG. 7 shows an example of solid-state image sensing device of which clock frequency for transferring electric charge of HCCD is lowered.

[0011] In FIG. 7, the solid-state image sensing device is composed of a pixel area 41 for disposing a photoelectric converter in vertical and horizontal directions and constituting VCCD, HCCDs 42 and 43 for shifting electric charge transferred from VCCD in the pixel area 41, adders 44 and 45 for adding a reference signal of predetermined level to the electric charge to be outputted from HCCDs 42 and 43 respectively, amplifiers 46 and 47 for amplifying the reference signal and the electric charge supplied from the adders 44 and 45 respectively. The reference signal is utilized for compensating scatter of each channel characteristic before synthesizing electric charge of each channel.

[0012] The electric charge transferred from the VCCD in the pixel area 41 is dispersed into the HCCD 42 and the HCCD 43, and is shifted to the vertical direction by each of the HCCDs 42 and 43. Accordingly, the clock frequency necessary for shifting the electric charge in each of the HCCD 42 and 43 can be reduced to a half of the clock frequency for single HCCD.

[0013] In case of the solid-state image sensing device shown in FIG. 7, the pixel size generally becomes smaller when a number of pixels increases. If the pixel size becomes smaller, the transferring efficiency for electric charge becomes insufficient and resulted in that the quality of image may be affected.

[0014] Recently, the whole system of video camera including the optical system is miniaturized and the solid-state image sensing device is also miniaturized into ⅓ inch or ¼ inch size. However, when many photoelectric converters are disposed in a miniaturized image sensing device, the transferring efficiency becomes insufficient for VCCD to shift its electric charges to HCCD in the pixel area 41 and resulted in that the quality of image may be affected.

[0015] In order to solve the problem of the related art, the present invention provides an image sensing device for obtaining high quality of image by suppressing clock frequency for transferring electric charge even for the image sensing device having more than one million pixels.

[0016] Accordingly, in consideration of the above-mentioned problems of the related art, an object of the present invention is to provide a method of transferring electric charge from an image sensing device converting light image into an electric signal by a plurality of photoelectric converters disposed in a CCD, the method including the steps of: dividing a plurality of pixel areas of the CCD; transferring an electric charge from the plurality of photoelectric converters in each divided pixel area of the CCD; and outputting an electric signal from an output stage of each divided pixel area of the CCD, wherein the divided pixel areas adjacent to each other have at least one set of output stages contiguous to the boundary of the divided pixel areas in the CCD.

[0017] The other object of the present invention is to provide an image sensing device for transferring electric charge to convert light image into an electric signal by a plurality of photoelectric converters disposed in a CCD, the image sensing device including: a plurality of pixel areas divided in the CCD for transferring an electric charge from the photoelectric converters; a VCCD for transferring the electric charge from the plurality of photoelectric converters in the vertical direction; an oblique shift CCD for transferring the electric charge from each pixel area to shift the electric charge in oblique direction; a HCCD for transferring the electric charge from the oblique shift CCD in the horizontal direction to output an electric signal; and an output stage for outputting the electric signal from the electric charge transferred from the HCCD in each divided pixel area, wherein the output stage is at least disposed contiguous to the boundary of the pixel areas adjacent to each other in the CCD.

[0018] Other object and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.

[0026] FIG. 1 is a block diagram of an image sensing apparatus installed with an image sensing device according to an embodiment of the present invention. In FIG. 1, an image sensing device in accordance with the present invention is composed of a solid-state image sensing device 1 for converting light images into an electric signal (hereinafter referred to as “CCD signal”), CDS/AGCs 2a and 2b for eliminating noise component and adjusting the signal level for a CCD signal of each separate channel, analog to digital (A/D) converters 3a and 3b for converting the CCD signal in analog form into digital, a comparison circuit 4 for adjusting the level of digital CCD signal by comparing each CCD signal in each channel with each other, a line converter 5 for generating a CCD signal in one direction, a Y/C processor 6 for carrying out signal processing such as gamma correction and aperture control on the CCD signal outputted from the line converter 5, a timing generator 7 for supplying a driving pulse to the solid-state image sensing device 1, and controller 8 for controlling each portion of the image sensing device.

[0027] FIG. 2 is an enlarged plan view of the solid-state image sensing device shown in FIG. 1. In FIG. 2, the solid-state image sensing device 1 is composed of a first pixel area 11a and a second pixel area 11b arranged with a plurality of photoelectric converters in horizontal and vertical matrix array, respectively, and provided with VCCD, a first oblique area 12a and a second oblique area 12b for shifting an electric charge transferred from the VCCD in the first pixel area 11a and the second pixel area 11b, areas 13a and 13b are HCCDs for transferring an electric charge from the first and second oblique areas 12a and 12b to the horizontal direction, electric charge injectors 14a and 14b for injecting a reference signal of predetermined level to the electric charge from the HCCDs 13a and 13b, and amplifiers 15a and 15b for amplifying and outputting the reference signal and electric charge.

[0028] In FIG. 2, the electric charge injectors 14a and 14b are indicated as a separate element. However, the difference of signal level of the reference signal to be supplied to each channel can be minimized by following structure. One reference signal generator provides the reference signal to first and second adder wherein the first adder is provided between the HCCD 13a and the amplifier 15a, and the second adder is provided between the HCCD 13b and amplifier 15b. In this case, the reference signal generator is provided in the same distance from the first adder and the second adder respectively, so that the level difference of the reference signal to be provided to each channel can be minimized.

[0029] FIG. 3 is an enlarged view of an output portion of the HCCD shown in FIG. 2. In FIG. 3, the output portion of the HCCD is composed of photoelectric converters 21a and 21b to convert light into an electric signal, VCCDs 22a and 22b for transferring electric charges from each of photoelectric converters 21a and 21b to vertical direction, oblique shift CCDs 23a and 23b for shifting electric charge transferred from the VCCDs 22a and 22b and shifted to each HCCD 13a and 13b. The photoelectric converter 21a and the VCCD 22a is provided in the pixel area 11a, and the photoelectric converter 21b and the VCCD 22b is provided in the pixel area 11b shown in FIG. 2. The oblique shift CCDs 23a and 23b are provided in the shift areas 12a and 12b shown in FIG. 2 respectively.

[0030] The image sensing device may be a solid-state image sensing device of progressive-scan type, which can output one frame of signal during one VD period, or interline type, which can output one field of signal during one sync period. The one sync period as specified hereto indicates one field period or one horizontal scanning period of the NTSC system television signal.

[0031] The image sensing device in accordance with the present invention is capable of taking still pictures and moving pictures. Below is the operation of taking moving pictures by the image sensing device.

[0032] The timing generator 7 shown in FIG. 1 outputs a driving pulse to the solid-state image sensing device 1. The driving pulse includes a read-out pulse of the electric charges from the photoelectric converters 21a and 21b, a vertical transferring pulse of the VCCDs 22a and 22b, and a horizontal transferring pulse of the HCCD 13a and 13b.

[0033] When the read-out pulse is provided to the solid-state image sensing device 1 by the timing generator 7, the electric charges stored in all areas of the photoelectric converters 21a and 21b are transferred to contiguous VCCDs 22a and 22b respectively. Then the electric charges stored are shifted to the HCCD 13a and 13b by the timing of the vertical transferring pulse from the timing generator 7.

[0034] The electric charges to be outputted from the VCCD 22a in the pixel area 11a shown in FIG. 2 are transferred to the input of the oblique shift CCD 23a in the first oblique area 12a. The electric charges to be outputted from VCCD 22b in the pixel area 11b shown in FIG. 2 are transferred to the input of the oblique shift CCD 23b in the second oblique area 12b.

[0035] The oblique shift CCDs 23a and 23b are also provided with vertical transferring pulse identical to the HCCDs 22a and 22b. The electric charge transferred into the oblique shift CCDs 23a and 23b is shifted to oblique direction in the timing of vertical transferring pulse. Then the output from the oblique shift CCDs 23a and 23b are transferred to the HCCDs 13a and 13b respectively.

[0036] The electric charge from the photoelectric converter 21a in the pixel area 11a is transferred through the VCCD 22a and the oblique shift CCD 23a. The electric charge from the photoelectric converter 21b in the pixel area 11b is transferred through the VCCD 22b and the oblique shift CCD 23b.

[0037] The HCCDs 13a and 13b are provided with horizontal transferring pulse of different phase respectively. The electric charge in the HCCD 13a is shifted to right side and the electric charge in the HCCD 13b is shifted to left side by the transferring pulse. The electric charge injectors 14a and 14b provide a reference signal of predetermined level at the top of the electric charge for one scanning line so that the signal outputs from the amplifiers 15a and 15b become as shown in FIGS. 4(a) to 4(c). The signal level for the reference signal to be inputted in the electric charge injectors 14a and 14b are supposed to have the same level.

[0038] FIGS. 4(a) to 4(c) are examples of a CCD signal and a reference signal in accordance with the present invention. FIG. 4(a) shows a waveform of signal output from the amplifier 15a, and FIG. 4(b) shows a waveform of signal output from the amplifier 15b. The head portion of each waveform indicated in FIGS. 4(a) and 4(b) is the reference signal supplied to the top of the CCD signal for one scanning line. The electric charge in the pixel area 11b is outputted sequentially from a pixel in the left side to a pixel in the right side of a screen. The electric charge in the pixel area 11a is outputted sequentially from a pixel in the right side to a pixel in the left side of the screen.

[0039] In this sense, the read-out order for the electric charge in the pixel areas 11a and 11b differs from each other. However, as shown in FIG. 2, when the screen is divided into two areas that are the pixel areas 11a and 11b, and the electric charge is read-out from the boundary of the pixel areas 11a and 11b, a number of the transferring stages in the horizontal direction at the boundary of the pixel areas 11a and 11b becomes the same.

[0040] Consequently, the number of the horizontal transferring stages for electric charge in the pixel from the boundary of the screen of the first and second pixel areas 11a and 11b become the same. The electric charge transferred in each of the first pixel area 11a and the second pixel area 11b is shifted in the same condition, so that the discontinuity of the image caused by the difference of the transferring stage for electric charge at the boundary of the center of the screen can be prevented.

[0041] The signal outputted from the amplifiers 15a and 15b are supplied to the CDS/AGCs 2a and 2b respectively for eliminating noise component and adjusting the level. Then the signals are provided to the A/D converter 3a and 3b and converted from analog to digital form and supplied to the comparison circuit 4.

[0042] The comparison circuit 4 adjusts the level of the signal to make the level of the reference signal to become the same by comparing the signals outputted from the A/D converters 3a and 3b respectively. More specifically, the reference signal for predetermined channel is fixed and the signal level of the other channel is adjusted to make its signal level to become the same level with the predetermined channel. However, the adjustment is not limited to the above. The level of the reference signal in both channels can be adjusted simultaneously to become the same level.

[0043] After the level of the signal for each channel is adjusted by the comparison circuit 4, the signal is provided to the line converter 5 to reverse the image in line direction of the CCD signal outputted from the first pixel area 11a. The combined signal as shown in FIG. 4(c) is provided to the YC processor 6 where the gamma processing and aperture control processing is conducted.

[0044] Each characteristic of the amplifiers 15a and 15b, the CDS/AGCs 2a and 2b, and the A/D converters 3a and 3b varies by individual difference of characteristic. As described above, the electric charge of the same level is inputted to the electric charge injectors 14a and 14b and is compared in the comparison circuit 4 so that the individual difference of characteristic is absorbed.

[0045] Assuming that each gain of the CDS/AGCs 2a and 2b can be set within a range from 0 dB to 30 dB and each dynamic range of the A/D converters 3a and 3b is 1V, the input level of the electric charge for the electric charge injectors 14a and 14b should be smaller than one thirty-seconds the reference signal that is equal to 31.25 mV outputted from the amplifiers 15a and 15b. Otherwise, the level adjustment in the comparison circuit 4 can not be conducted effectively.

[0046] For example, if both of the input channels of the A/D converter surpass 1 V, the output of each A/D converter becomes 1 V irrespective of characteristic differences of each channel. In this sense, the level adjustment of each channel can not be conducted by the signal of 1 V.

[0047] On the other hand, if the input level of the electric charge injectors 14a and 14b are set to less than or equal to 31.25 mV, the difference of each channel characteristic can be adjusted. However, the input level is so small that it can be affected by noise component. Consequently, the channel signal may not be adjusted properly.

[0048] Accordingly, as long as the reference signal for CCD signal outputted from the solid-state image sensing device is concerned, the gain of the CDS/AGCs 2a and 2b should be fixed to relatively low scale and fixed ratio such as 0 dB or 3 dB. The gain for the signal portion other than the reference signal, for example, is set for every VD period so that the individual difference can be adjusted precisely accurate.

[0049] FIG. 5 is a block diagram of a comparison circuit in accordance with the present invention. The comparison circuit 4 is composed of amplifiers 9a and 9b which amplify a CCD signal outputted from the A/D converters 3a and 3b respectively, and sample hold (S/H) sections 10a and 10b which hold and output the value of the CCD signal amplified by the amplifiers 9a and 9b respectively.

[0050] The S/H sections 10a and lob hold the sample value of the reference signal inputted just before and provide it to the controller 8. The controller 8 controls the gain of the amplifiers 9a and 9b so that the sample values outputted from the S/H sections 10a and 10b become the same.

[0051] As described above, both amplifiers 9a and 9b are necessary for changing the level of both channels of a CCD signal. However, for example, if the level of output signal from the A/D converter 3a is fixed and the level of output signal from the A/D converter 3b is variable, the amplifier 9a is not necessarily incorporated.

[0052] As described above, the present invention provides an image sensing device for having an output stage contiguous to the boundary of two CCD areas as shown in FIG. 2. However, the number of CCD areas is not limited to 2. It can also be 3 or more.

[0053] As for the image sensing device having three CCD areas, adjacent two CCD areas in the three are constructed as shown in FIG. 2. As for the image sensing device having four CCD areas, two groups of CCD areas shown in FIG. 2 can be provided.

[0054] As described above, the image sensing device in accordance with the present invention provides the first and second pixel areas in the CCD. Each output stage of the first and second HCCDs is opposed to each other, so that the clock frequency of transferring charge for the HCCD can be suppressed to low frequency. Further, the reference signal can be inserted to the CCD signal outputted from each HCCD, so that the level of the CCD signal outputted from each HCCD can be adjusted easily.

[0055] In addition, the gain of the CCD signal is fixed for the reference signal portion and variable for the other portion when amplifying the CCSD signal outputted from each HCCD, so that the level of the reference signal to be inputted can be set relatively high to adjust the signal level between the channels precisely accurate.

[0056] The present invention is not limited to the use of CCD for NTSC television system as is in the case of the embodiment described above, but also for other television system such as PAL or SECAM, analog or digital system using CCD device.

[0057] It is to be understood that the invention is not limited in its application to the details of construction and arrangement of parts illustrated in the accompanying drawings, since the invention is capable of other embodiments and of being practiced or carried out in various ways. Also it is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation.