Solid state image pickup device and its read method

[0002] This application is based on Japanese Patent Applications HEI 11-231999 and HEI 11-232000 filed on Aug. 18, 1999, all the contents of which are incorporated herein by reference.

[0003] a) Field of the Invention

[0004] The present invention relates to a solid state image pickup device, and more particularly to a solid state image pickup device whose adjacent pixels are disposed shifted by a half pitch between pixels in both vertical and horizontal directions, and to its read method.

[0005] b) Description of the Related Art

[0006] High integration of pixels has been desired for a solid state image pickup device such as a CCD solid state image pickup device.

[0007] FIG. 18 is a plan view of a general interline type CCD solid state image pickup device.

[0008] The solid state image pickup device is formed on a semiconductor substrate 201 made of, for example, silicon.

[0009] A CCD solid state image pickup device X formed on the semiconductor substrate 201 includes pixels 203, vertical charge transfer paths 205, a horizontal charge transfer path 207 and an output amplifier 211. A plurality of pixels 203 are regularly disposed on the semiconductor substrate 201 in the vertical and horizontal directions.

[0010] Each pixel 203 includes a photodiode (photoelectrical conversion element) 203aand a read gate (transfer gate) 203b. The photodiode 203aconverts incident light into electric charges and stores the electric charges. The transfer gate 203breads the electric charges stored in the photodiode 203ato the vertical charge transfer path 205.

[0011] Each pixel column P11 constituted of a plurality of pixels 203 disposed in the vertical direction is provided with one vertical charge transfer path 205. The vertical charge transfer path 205 is made of, for example, an n-type conductive layer formed on the semiconductor substrate 201. The horizontal charge transfer path 207 is disposed at the lower ends of the vertical charge transfer paths 205.

[0012] The horizontal charge transfer path 207 is constituted of mainly an n-type conductive layer 208 in the semiconductor substrate 201 and horizontal charge transfer electrodes 221 made of two polysilicon layers (first and second polysilicon layers) formed on the semiconductor substrate 201.

[0013] The n-type conductive layer 208 includes high concentration regions 208ahaving a high n-type impurity concentration and low concentration regions 208bhaving a low n-type impurity concentration formed alternately. The high concentration region 208aforms a potential well having a low potential energy. The low concentration region 208bforms a potential barrier having a high potential energy. Potential barriers and potential wells are alternately disposed in the horizontal direction. Two pairs of one potential barrier and one potential well form one charge transfer packet (hereinafter simply called a “packet”). A number of packets are formed along the horizontal direction.

[0014] First polysilicon layer electrodes (horizontal transfer electrodes 221-1, 221-3, 221-5, . . . , refer to FIG. 19) are formed on the high concentration regions 208a(potential wells), and second polysilicon layer electrodes (horizontal transfer electrodes 221-0, 221-2, 221-4, . . . , refer to FIG. 19) are formed on the low concentration regions 208b(potential barriers).

[0015] The horizontal charge transfer electrodes 221-0 and 221-1 are connected together and a voltage φ1 is applied to these electrodes. The horizontal charge transfer electrodes 221-2 and 221-3 are connected together and a voltage φ2 is applied to these electrodes. Similarly, the horizontal charge transfer electrode 221-4 and 221-5 are connected together and the voltage φ1 is applied to these electrodes.

[0016] As shown in FIG. 19, two vertical charge transfer electrodes 215, e.g., vertical charge transfer electrodes 215-1 and 215-2, are formed on the vertical charge transfer path 205 in a space between adjacent pixels disposed in the row direction.

[0017] Voltages V1 to V4 are applied to the vertical charge transfer electrodes 215-1, 215-2, 215-3 and 215-4. Similarly the voltages V1 to V4 are applied to the vertical charge transfer electrodes 215-5 to 215-8, and 215-9 to 215-12. The voltages V1 to V4 are, for example, 0 V for forming a potential barrier in the vertical charge transfer path, 8 V for forming a charge transfer potential well, and 15 V for reading electric charges from pixels.

[0018] The vertical charge transfer path 205 is electrically connected to one potential well region of each packet of the horizontal charge transfer path 207.

[0019] The operation of the solid state image pickup device will be described with reference to FIGS. 18 and 19.

[0020] When V1 is set to 15 V, electric charges stored in all the photodiodes 203aconnected to the V1 vertical charge transfer electrodes are read via the transfer gates 203bto the vertical charge transfer paths 205.

[0021] A relatively low plus voltage, e.g., 8 V, is applied to the vertical charge transfer electrode 215-1, and also to the vertical charge transfer electrodes 215-2 and 215-3. Then, the voltage at the vertical charge transfer electrode 215-1 is reset to 0 V and a voltage of 8 V is applied to the vertical charge transfer electrode 215-4. These operations are repeated to transfer electric charges in the vertical charge transfer path 205 toward the horizontal charge transfer path by a four-phase driving method.

[0022] As a relatively low plus voltage, e.g., 8 V, is used as V1, V2 nd V3, and 0 V is used as V4, the read electric charges distribute under three vertical charge transfer electrodes at V1, V2 and V3.

[0023] As V1 is reset to 0 V, the electric charges are confined under the electrodes at V2 and V3. As V4 is set to 8 V, the electric charges distribute under the electrodes at V2, V3 and V4. By repeating this operation, the electric charges are transferred in the vertical charge transfer path 205 toward the horizontal charge transfer path by the four-phase driving method.

[0024] As the voltage φ1 of the horizontal charge transfer path is set, for example, to 0 V and the voltage φ2 to 8 V, electric charges under the φ1 electrode are transferred to the region under the right side φ2 electrode. At this time, a potential barrier is formed in the left region of the region under the φ1 electrode to prevent a counterflow of the electric charges.

[0025] Electric charges can therefore be transferred in the horizontal charge transfer path 207 by a two-phase driving method without a mixture of pixels.

[0026] With the two-phase driving method using the voltages φ1 and φ2, electric charges can be transferred in the horizontal charge transfer path 207.

[0027] With the above operations, electric charges can be read from pixels of each line connected to the V1 vertical charge transfer electrode.

[0028] Next, electric charges are read from pixels on other rows by a similar method. After electric charges of all pixels for V1 are read, a read pulse is used as V2 to read electric charges from pixels connected to the V2 vertical charge transfer electrodes. Similarly, electric charges are sequentially read from pixels connected to the V3 and V4 vertical charge transfer electrodes.

[0029] Electric charges transferred to the horizontal charge transfer path 207 are transferred to the output amplifier 211, for example, by the two-phase driving method. The output amplifier 211 amplifies the electric charges and outputs image signals to the external.

[0030] By disposing photodiodes 203atwo-dimensionally, signals of a two-dimensional image can be obtained.

[0031] In order to meet the requirements of high integration of pixels, it is necessary to make the pixel size fine.

[0032] With the solid state image pickup device X described above, one vertical charge transfer path 205 is provided for each pixel column P11. Four horizontal charge transfer electrodes 208a, 208b, 208aand 208bare required in order to transfer electric charges transferred from one vertical charge transfer path 205 to the horizontal charge transfer path 207, to the region of the horizontal charge transfer path 207 connected to the next adjacent vertical charge transfer path 205.

[0033] If a pixel 203 is made fine to about 2 to 3 micron square, it becomes difficult to perform fine pattering of horizontal charge transfer electrodes 221. Moreover, as the pixel 203 is made fine, the area of the photoelectric conversion element 203a, e.g., a photodiode, becomes small and the amount of accumulated electric charges reduces. Therefore, a dynamic range cannot be made large.

[0034] Still further, as the total number of pixels of a solid state image pickup device increases, it takes a longer time to read image signals of one frame.

[0035] A general digital camera has an image signal frame rate of {fraction (1/30)} second in the National Television System Committee (NTSC) system.

[0036] Even if a time to read image signals of a still image picked up with a digital camera is prolonged, there is no serial problem.

[0037] A moving image is displayed on a monitor display of a digital camera in real time. In this case, as the number of pixels increases, it becomes difficult to follow the frame rate. If the number of pixels exceeds one million, it is difficult to read image signals from all pixels in {fraction (1/30)} second. A clear image cannot be obtained.

[0038] It is an object of the present invention to provide a solid state image pickup device capable of providing a high pixel density while mitigating a patterning precision of horizontal charge transfer electrodes.

[0039] It is another object of the present invention to provide a solid state image pickup device capable of displaying a clear moving image to be monitored and its control method.

[0040] According to one aspect of the present invention, there is provided a solid state image pickup device comprising: a plurality of pixel groups disposed on a two-dimensional plane defined by horizontal and vertical directions, the plurality of pixel groups being juxtaposed in the horizontal direction, each of the pixel groups including a first pixel column and a second pixel column, the first pixel column including a plurality of pixels regularly disposed at a first pixel pitch in the vertical direction, the second pixel column including a plurality of pixels regularly disposed at a half pitch of the first pixel pitch in the vertical direction relative to the first pixel column, the second pixel columns being disposed in the horizontal direction at a half pitch of a second pixel pitch of pixels of adjacent first pixel columns of the pixel groups; a first separation region formed between pairs of the pixel groups adjacent in the horizontal direction; a single vertical charge, transfer path extending in the vertical direction and weaving between the first and second pixel columns of each of the pixel groups; and a horizontal charge transfer path formed at one ends of a plurality of vertical charge transfer paths for receiving electric charges transferred from the vertical charge transfer paths and transferring the electric charges in the horizontal direction.

[0041] According to another aspect of the present invention, there is provided a method of reading a solid state image pickup device, the solid state image pickup device comprising: a plurality of pixel groups disposed on a two-dimensional plane defined by horizontal and vertical directions, the pixel groups being juxtaposed in the horizontal direction, each of the pixel groups including a first pixel column and a second pixel column, the first pixel column including a plurality of pixels regularly disposed at a first pixel pitch in the vertical direction, the second pixel column including a plurality of pixels regularly disposed at a half pitch of the first pixel pitch in the vertical direction relative to the first pixel column, the second pixel columns being disposed in the horizontal direction at a half pitch of a second pixel pitch of pixels of adjacent first pixel columns of the pixel groups; a first separation region formed between pairs of the pixel groups adjacent in the horizontal direction; a single vertical charge transfer path extending in the vertical direction and weaving between the first and second pixel columns of each of the pixel groups; and a horizontal charge transfer path formed at one ends of a plurality of the vertical charge transfer paths for receiving electric charges transferred from the vertical charge transfer paths and transferring the electric charges in the horizontal direction, wherein: the pixel includes a photoelectric conversion element formed in an area defined by four oblique sides slanted relative to the horizontal and vertical directions; the first separation region is formed along a first set of right or left oblique sides among the four oblique sides of the pixel in the first pixel column; a first read gate is formed near the vertical charge transfer path along one of a second set of upper and lower oblique sides on a side opposite to a region where the first separation region is not formed, and a second separation region is formed along the oblique side where the first read gate is not formed; the first separation region is also formed along a second set of two oblique sides among the four oblique sides of the pixel in the second pixel column on a side opposite to the first pixel column; a second read gate is formed near the vertical charge transfer path along one of a fourth set of two oblique sides not facing the first read gate of the pixel in the first pixel column and on a side opposite to a region where the first separation region is formed, and a third separation region is formed along the oblique side on a side where the second read gate is not formed; and a plurality of vertical charge transfer electrodes are formed extending in the horizontal direction, each of the vertical charge transfer electrodes being formed between pixels of a first pixel row regularly disposed in a row direction and included in the first pixel column and pixels of a second pixel row adjacent to the first pixel row in the vertical direction and regularly disposed in the row direction, the method comprises: a first field output step including a step of reading electric charges from the pixels in a first field to the vertical charge transfer paths by applying read pulses to the vertical charge transfer electrodes at an n-th row and every predetermined rows and a step of transferring the electric charges in the vertical charge transfer paths toward the horizontal charge transfer path by sequentially applying a voltage to the vertical charge transfer electrodes, and transferring the electric charges transferred to the horizontal charge transfer path and outputting the electric charges to an external; a second field output step including a step of reading electric charges from the pixels in a second field to the vertical charge transfer paths by applying read pulses to the vertical charge transfer electrodes at an (n+1)-th row and every predetermined rows and a step of transferring the electric charges in the vertical charge transfer paths toward the horizontal charge transfer path by sequentially applying a voltage to the vertical charge transfer electrodes, and transferring the electric charges transferred to the horizontal charge transfer path and outputting the electric charges to the external; and a third field output step including a step of reading electric charges from the pixels in a third field to the vertical charge transfer paths by applying read pulses to the vertical charge transfer electrodes at an (n+2)-th row and every predetermined rows and a step of transferring the electric charges in the vertical charge transfer paths toward the horizontal charge transfer path by sequentially applying a voltage to the vertical charge transfer electrodes, and transferring the electric charges transferred to the horizontal charge transfer path and outputting the electric charges to the external, wherein the first to third fields are different fields of the solid state image pickup device.

[0042] A solid state image pick up device, further comprising a driver circuit for independently applying a voltage to each of a set of eight vertical charge transfer electrodes adjacent in the vertical direction among the plurality of vertical charge transfer electrodes; a horizontal charge transfer path formed at one ends of a plurality of the vertical charge transfer paths for receiving electric charges transferred from the vertical charge transfer paths and transferring the electric charges in the horizontal direction; and an output amplifier formed at one end of the horizontal charge transfer path for amplifying electric charges supplied from the horizontal charge transfer path and outputting to an external is preferable.

[0043] According to another aspect of the present invention, there is provided a method of reading a solid state image pickup device, the solid state image pickup device comprising: a plurality of pixel groups disposed on a two-dimensional plane defined by horizontal and vertical directions, the pixel groups being juxtaposed in the horizontal direction, each of the pixel groups including a first pixel column and a second pixel column, the first pixel column including a plurality of pixels regularly disposed at a first pixel pitch in the vertical direction, the second pixel column including a plurality of pixels regularly disposed at a half pitch of the first pixel pitch in the vertical direction relative to the first pixel column, the second pixel columns being disposed in the horizontal direction at a half pitch of a second pixel pitch of pixels of adjacent first pixel columns of the pixel groups; a first separation region formed between pairs of the pixel groups adjacent in the horizontal direction; a single vertical charge transfer path extending in the vertical direction and weaving between the first and second pixel columns of each of the pixel groups; a plurality of vertical charge transfer electrodes formed extending in the horizontal direction, each of the vertical charge transfer electrodes being formed between pixels of a first pixel row regularly disposed in a row direction and included in the first pixel column and pixels of a second pixel row adjacent to the first pixel row in the vertical direction and regularly disposed in the row direction; a driver circuit for independently applying a voltage to each of a set of eight vertical charge transfer electrodes adjacent in the vertical direction among the plurality of vertical charge transfer electrodes; a horizontal charge transfer path formed at one ends of a plurality of the vertical charge transfer paths for receiving electric charges transferred from the vertical charge transfer paths and transferring the electric charges in the horizontal direction; and an output amplifier formed at one end of the horizontal charge transfer path for amplifying electric charges supplied from the horizontal charge transfer path and outputting to an external, wherein: the pixel in the first pixel column is a first color pixel including a photoelectric conversion element and a first color filer; and the pixels in the second pixel column comprise a second color pixel including a photoelectric conversion element and a second color filer and a third color pixel including a photoelectric conversion element and a third color filer, the second and third color pixels being alternately disposed in the vertical direction and in the horizontal direction, the method comprises: a) a step of reading electric charges to the vertical charge transfer paths by sequentially applying a read pulse to the first to eighth vertical charge transfer electrodes so as to read the electric charges of a same color from a same vertical charge transfer path; b) a step of transferring the electric charges read to the vertical charge transfer paths toward the horizontal charge transfer path; c) a step of transferring the electric charges read to the horizontal charge transfer path toward the output amplifier; d) amplifying the electric charges supplied from the horizontal charge transfer path and outputting the electric charges to the external; and e) repeating the steps a) to d) for pixels of different rows to read electric charges from all the pixels.

[0044] According to another aspect of the present invention, there is provided a method of reading a solid state image pickup device, the solid state image pickup device comprising: a plurality of pixel groups disposed on a two-dimensional plane defined by horizontal and vertical directions, the pixel groups being juxtaposed in the horizontal direction, each of the pixel groups including a first pixel column and a second pixel column, the first pixel column including a plurality of pixels regularly disposed at a first pixel pitch in the vertical direction, the second pixel column including a plurality of pixels regularly disposed at a half pitch of the first pixel pitch in the vertical direction relative to the first pixel column, the second pixel columns being disposed in the horizontal direction at a half pitch of a second pixel pitch of pixels of adjacent first pixel columns of the pixel groups; a first separation region formed between pairs of the pixel groups adjacent in the horizontal direction; a single vertical charge transfer path extending in the vertical direction and weaving between the first and second pixel columns of each of the pixel groups; a plurality of vertical charge transfer electrodes formed extending in the horizontal direction, each of the vertical charge transfer electrodes being formed between pixels of a first pixel row regularly disposed in a row direction and included in the first pixel column and pixels of a second pixel row adjacent to the first pixel row in the vertical direction and regularly disposed in the row direction; a driver circuit for independently applying a voltage to each of a set of eight vertical charge transfer electrodes adjacent in the vertical direction among the plurality of vertical charge transfer electrodes; a horizontal charge transfer path formed at one ends of a plurality of the vertical charge transfer paths for receiving electric charges transferred from the vertical charge transfer paths and transferring the electric charges in the horizontal direction; and an output amplifier formed at one end of the horizontal charge transfer path for amplifying electric charges supplied from the horizontal charge transfer path and outputting to an external, wherein: the pixel in the first pixel column is a first color pixel including a photoelectric conversion element and a first color filer; and the pixels in the second pixel column comprise a second color pixel including a photoelectric conversion element and a second color filer and a third color pixel including a photoelectric conversion element and a third color filer, the second and third color pixels being alternately disposed in the vertical direction and in the horizontal direction, the method comprises: a) a step of reading electric charges from the photoelectric conversion elements to the vertical charge transfer paths by applying a read pulse to two vertical charge transfer electrodes adjacent in the vertical direction among the first to eighth vertical charge transfer electrodes; b) a step of collecting the electric charges read to the vertical charge transfer paths; c) a step of transferring the electric charges from the vertical charge transfer path to the horizontal charge transfer path; d) a step of transferring the electric charges transferred to the horizontal charge transfer path to the output amplifier; and e) amplifying the electric charges supplied from the horizontal charge transfer path and outputting the electric charges to the external.

[0045] A patterning precision of a solid state image pickup device, particularly vertical charge transfer paths and vertical charge transfer electrodes, can be mitigated. The patterning precision of a horizontal charge transfer path can also be mitigated. At a given patterning precision, the pixel density can be made higher.

[0046] A manufacture yield can be improved. Reliability of solid state image pickup devices can be improved.

[0047] With the solid state image pickup device reading method, all pixels of a still image can be read. Moreover, since pixels can be read through thinning, it is easy to read and reproduce a moving image to be monitored.

[0048] FIG. 1 is a plan view of a solid state image pickup device according to a first embodiment of the invention.

[0049] FIG. 2A is an enlarged plan view of a pixel area of the solid state image pickup device shown in FIG. 1, and FIG. 2B is a cross sectional view taken along line IIa-IIa of FIG. 2A.

[0050] FIG. 3 is a timing chart illustrating the operation of the solid state image pickup device shown in FIG. 1.

[0051] FIG. 4 is a plan view of a solid state image pickup device according to a modification of the first embodiment.

[0052] FIG. 5 is a timing chart illustrating the operation of the solid state image pickup device shown in FIG. 4.

[0053] FIG. 6 is a plan view of a solid state image pickup device according to a second embodiment of the invention.

[0054] FIG. 7A is an enlarge view showing the detailed structure of a pixel area of a solid state image pickup device similar to that shown in FIG. 6, and FIG. 7B is a cross sectional view taken along line VIIa-VIIb of FIG. 7A.

[0055] FIG. 8 is a timing chart illustrating the operation of reading a still image taken with the solid state image pickup device shown in FIG. 6.

[0056] FIG. 9 is a timing chart illustrating the operation of reading a still image taken with the solid state image pickup device shown in FIG. 6.

[0057] FIG. 10 is a timing chart illustrating the operation of reading a still image taken with the solid state image pickup device shown in FIG. 6.

[0058] FIG. 11 is a timing chart illustrating the operation of reading a still image taken with the solid state image pickup device shown in FIG. 6.

[0059] FIG. 12 is a timing chart illustrating the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0060] FIG. 13 is a timing chart illustrating the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0061] FIG. 14 is a diagram showing the positions of color signals on the vertical charge transfer paths during the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0062] FIG. 15 is a timing chart illustrating the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0063] FIG. 16 is a timing chart illustrating the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0064] FIG. 17 is a diagram showing the positions of color signals on the vertical charge transfer paths during the operation of reading a monitor image taken with the solid state image pickup device shown in FIG. 6.

[0065] FIG. 18 is a plan view of a conventional solid state image pickup device, mainly showing the structure of a semiconductor region.

[0066] FIG. 19 is a plan view of the conventional solid state image pickup device, mainly showing the structure of charge transfer electrodes.

[0067] Embodiments of the invention will be described.

[0068] FIG. 1 is a plan view of a solid state image pickup device A according to a first embodiment of the invention.

[0069] A solid state image pickup device A includes: a pixel area B in which a plurality of pixels 3 (3a, 3b, 3c) are regularly disposed on a semiconductor substrate 1; vertical charge transfer paths 5 disposed in the pixel area B for transferring electric charges in the pixels 3 in a vertical direction; a horizontal charge transfer path 7 disposed under the pixel area B for transferring electric charges transferred from the vertical charge transfer paths 5 in a horizontal direction; and an amplifier 17 for amplifying electric charges transferred from the horizontal charge transfer path 7.

[0070] In the pixel area B, a plurality of pixels 3 are disposed on a two-dimensional plane of the semiconductor substrate 1 in the horizontal (row) and vertical (column) directions. Pixels at every second columns form a matrix of pixels disposed at a first pitch in the vertical direction and at a second pitch in the horizontal direction. Pixels at one column and at the next column are disposed shifted by half pitches of each of the first and second pitches in the vertical and horizontal directions, to thereby constitute a so-called pixel shifted solid state image pickup device.

[0071] The pixels 3 are grouped into green pixels 3a, red pixels 3band blue pixels 3c. Red pixels 3band blue pixels 3care alternately disposed in the vertical direction to form a first pixel column P1. In a second pixel column P2 adjacent to the first pixel column P1, green pixels 3aare disposed.

[0072] The first and second pixel columns P1 and P2 form one pixel group PG. A plurality of pixel groups PG are disposed in the horizontal direction. As shown in FIG. 1, each pixel is of generally a rhomboid shape having four oblique sides.

[0073] Pixels of the second pixel columns P2 are disposed in spaces between rows and columns formed by the pixels 3c, 3b, 3c, . . . of the first pixel columns P1.

[0074] As the drawing of FIG. 1 is rotated by 45 degrees, pixels of the first and second pixel columns constitute generally a square matrix.

[0075] The vertical charge transfer path 5 (indicated by solid lines) made of n-type semiconductor layers in the semiconductor substrate 1 is of a zigzag shape or weaving shape extending along a space formed between the first and second pixel columns P1 and P2 of each pixel group PG.

[0076] Each electrode (vertical charge transfer electrode) 11 of the vertical charge transfer path 5 extends generally in the horizontal direction in a zigzag way along spaces between pixels.

[0077] A voltage V1 is applied to vertical charge transfer electrodes 11-1, 11-5 and 11-9. A voltage V2 is applied to vertical charge transfer electrodes 11-2, 11-6 and 11-10. A voltage V3 is applied to vertical charge transfer electrodes 11-3, 11-7 and 11-11. A voltage V4 is applied to vertical charge transfer electrodes 11-4, and 11-8.

[0078] FIGS. 2A and 2B show the main part of the solid state image pickup device shown in FIG. 1. FIG. 2A is a plan view and FIG. 2B is a cross sectional view taken along line Ia-Ib of FIG. 2A.

[0079] As shown in FIG. 2A, the pixel 3 (3a, 3b, 3c) is of generally a square shape. Of the four vertices of the square, opposing two vertices of the pixels are generally and regularly disposed in the vertical and horizontal directions. Oblique sides (imaginary lines) coupling the four vertices and extending in a direction of right/left symmetry are called two oblique sides 27aand 27band two oblique sides 27cand 27d.

[0080] In an area surrounded by the four oblique sides 27a, 27b, 27cand 27dof the pixel 3, a photoelectric conversion element (photodiode) 41 (41a, 41b, 41c) is disposed. A transfer gate 45 is formed between a light reception area 41aof the photodiode 41 and the n-type semiconductor layer 31a, 31bpartially forming the vertical charge transfer path 5.

[0081] The left pixel column group PG of the two pixel column groups PG shown in FIG. 2A will be described.

[0082] A first separation region 47ais formed along the first set of two right oblique sides 27cand 27damong the four oblique sides 27ato 27dof the pixel 3ain the second pixel column P2 of the left pixel column group PG.

[0083] A first read gate 45ais formed near the vertical charge transfer path 31 along the upper oblique side 27aof the second set of two oblique sides 27aand 27bopposite to the side where the first separation region 47ais formed, and a second separation region 47bis formed along the oblique side 27bwhere the first read gate 45ais not formed.

[0084] In the first pixel column P1 of the same pixel column group PG, a first separation region 47ais formed along the third set of two oblique sides 27aand 27bon the opposite side of the second pixel column P2, among the four oblique sides 27ato 27dof the pixel 3b(at a position where the pixel 3ais moved in parallel) in the first pixel column P2.

[0085] A second read gate 45bis formed near the vertical charge transfer path 5 along the oblique side 27cnot facing the read gate 45aof the pixel 3aof the second pixel column P2, among the four set of two oblique sides 27cand 27dopposite to the side where the first separation region 47ais formed, and a third separation region 47cis formed along the oblique side 27dwhere the second read gate 45bis not formed.

[0086] An n-type conductive layer 31bis formed in the semiconductor substrate 1 along the upper left oblique side 27aof the pixel 3aof the second pixel column P2. An n-type conductive layer 31ais formed in the semiconductor substrate 1 along the upper right oblique side 27cof the pixel 3b.

[0087] The n-type conductive layers 31aand 31bare coupled together to form the vertical charge transfer path 5 extending in a zigzag shape or weaving shape in the vertical direction toward the horizontal charge transfer path.

[0088] The vertical charge transfer electrode 11-10 extends in the horizontal direction in a zigzag way along the right and left lower oblique sides 27band 27dof a plurality of pixels 3aconstituting a first pixel row Q1. The four sides of each of these pixels 3aconstituting the first pixel row Q1 are surrounded by the vertical charge transfer electrodes 11-9 and 11-10.

[0089] As shown in FIG. 2B, a p-type deep well 43 is formed in the semiconductor substrate 1, and formed in this p-type well 43 are the photodiode 41, vertical charge transfer path 31a, transfer gate 45 and separation region 47.

[0090] The vertical charge transfer electrode 11 (11-10) is formed over the region where the vertical charge transfer path 31ais formed.

[0091] Color filters CF are formed over the semiconductor substrate 1, with a planarizing film H being interposed therebetween.

[0092] Micro lenses ML made of photoresist are formed on the color filters CF. The micro lens ML converges light onto the surface of the photodiode 41.

[0093] In FIG. 2A, although the read gate 45 is formed along the oblique side facing the vertical charge transfer path among the upper two oblique sides, it may be formed along the oblique side facing the vertical charge transfer path among the lower two oblique sides.

[0094] With reference to the timing chart shown in FIG. 3, a method of controlling the solid state image pickup device according to the embodiment will be described by referring to the plan view of FIG. 1 when necessary.

[0095] A method of reading signals of four fields by applying read pulses will be described.

[0096] First, signals of the first field are read during a T₁period.

[0097] During a t_1aperiod, a plus voltage, e.g., 8 V, is applied to the electrodes (V1) connected to corresponding photodiodes, in this example, to the vertical charge transfer electrodes 11-1, 11-5 and 11-9, and then a large pulse voltage, e.g., 15 V, is applied.

[0098] With the read pulse, the potential barrier of the transfer gate 45 disappears and electric charges stored in the photodiodes 41 of the pixels 3aare read via the read transfer gates 45 to the vertical charge transfer paths 5.

[0099] Signal charges read to the vertical charge transfer path 5 are sequentially transferred in the vertical charge transfer path 5 during a t_1bperiod by the four-phase driving method using V1 to V4. At each predetermined timing, pixel signals of one row are transferred from the vertical charge transfer paths 5 to the horizontal charge transfer path 7.

[0100] The signal charges transferred to the horizontal charge transfer path 7 are transferred in the horizontal direction during a t_1cperiod by the two-phase driving voltages φ1 and φ2 applied to the horizontal charge transfer electrodes 15. The signal generated by the transferred charges is amplified by the amplifier 17 and read to the external. The read pixel signal corresponds to green (G) pixels.

[0101] Next, signals of the second field are read during a T₂period.

[0102] During a t_2aperiod, a plus voltage, e.g., 8 V, is applied to the electrodes (V3) connected to corresponding photodiodes, in this example, to the vertical charge transfer electrodes 11-3, 11-7 and 11-11, and then a large pulse voltage, e.g., 15 V, is applied.

[0103] With the read pulse, the potential barrier of the transfer gate 45 disappears and electric charges stored in the pixels 3aare read via the read transfer gates 45 to the vertical charge transfer paths 5.

[0104] Signal charges read to the vertical charge transfer path 5 are sequentially transferred in the vertical charge transfer path 5 during a t_2bperiod by the four-phase driving method using V1 to V4. At each predetermined timing, pixel signals of one row are transferred from the vertical charge transfer paths 5 to the horizontal charge transfer path 7.

[0105] The signal charges transferred to the horizontal charge transfer path 7 are transferred in the horizontal direction during a t_2cperiod by the two-phase driving voltages φ1 and φ2 applied to the horizontal charge transfer electrodes 15. The signal generated by the transferred charges is amplified by the amplifier 17 (FIG. 1) and read to the external. The reed pixel signal corresponds to green (G) pixels.

[0106] Next, signal charges of pixels in the third and fourth fields are read during T₃(t_3a, t_3b, t_3c) and _T4(t_4a, t_4b, t_4c) periods by the method similar to the method of transferring and reading signal charges of the first and second fields. Signal charges of pixels of red (R) and blue (B) are therefore read.

[0107] By reading the electric charges of the first to fourth fields, the information of all pixels in the pixel area B shown in FIG. 1 can be read.

[0108] In this embodiment of the method of reading pixel data from the solid state image pickup device, although a GG/RB alternate filter array is used, other color filter arrays may also be used.

[0109] The solid state image pickup device of the first embodiment uses one vertical charge transfer path in common for adjacent two pixel columns.

[0110] Therefore, the number of stages of horizontal CCDs connected to the vertical charge transfer paths is a half of the number of photodiodes of pixels in one row. It is possible to make large a pitch of horizontal charge transfer electrodes and pattern the electrodes at a low pattering precision. The manufacture yield of solid state image pickup devices can be improved.

[0111] FIG. 4 is a plan view of a solid image pickup device capable of reading pixel data of three fields according to a modification of the first embodiment.

[0112] A solid image pickup device X has approximately the same structure as the solid image pickup device A of the first embodiment.

[0113] The solid state image pickup device X includes: a pixel area B in which a plurality of pixels 53 (53a, 53b, 53c) are regularly disposed on a semiconductor substrate 51; vertical charge transfer paths 55 disposed in the pixel area B for transferring electric charges in the pixels 53 in a vertical direction; a horizontal charge transfer path 57 disposed under the pixel area B for transferring electric charges transferred from the vertical charge transfer paths 55 in a horizontal direction; and an amplifier 65 for amplifying electric charges transferred from the horizontal charge transfer path 57.

[0114] The structure of the pixel area B realizes a so-called pixel shifted solid state image pickup device similar to the solid state image pickup device A of the first embodiment. Similar to the solid image pickup device of the first embodiment, the pixel 53 is of generally a square shape.

[0115] The four sides of each pixel 53 are surrounded by two vertical charge transfer electrodes 61 adjacent in the vertical direction.

[0116] A voltage V3 is applied to vertical charge transfer electrodes 61-1, 61-4 and 61-7, a voltage V2 is applied to vertical charge transfer electrodes 61-2, 61-5 and 61-8, and a voltage V1 is applied to vertical charge transfer electrodes 61-3, 61-6 and 62, realizing a so-called three-phase driving method.

[0117] With reference to the timing chart shown in FIG. 5, the operation of the solid state image pickup device X will be described.

[0118] First, electric charges of the first field are read during a T₁period.

[0119] During a t_1aperiod, a plus voltage, e.g., 8 V, is applied to the electrodes (V1) to the vertical charge transfer electrodes 61-3 and 61-6, and then a charge read pulse signal is applied. Electric charges corresponding to red (R) and blue (B) are therefore transferred to the vertical charge transfer paths 55.

[0120] Signal charges read to the vertical charge transfer path 5 are sequentially transferred in the vertical charge transfer path 5 during a t_1bperiod by the three-phase driving method using V1 to V3. At each predetermined timing, pixel signals of one row are transferred from the vertical charge transfer paths 55 to the horizontal charge transfer path 57.

[0121] After the electric charges are transferred to the horizontal charge transfer path, the electric charges are transferred in the horizontal charge transfer path toward the amplifier 65 during a t_1cperiod by the two-phase driving voltages φ1 and φ2. The pixel signal is output via the amplifier 65 to the external.

[0122] In a similar manner, signal charges of the second and third fields are read during T₂(t_2a, t_2b, t_2c) and T₃(t_3a, t_3b, t_3c) periods.

[0123] By reading the electric charges of the first to third fields, the information of all pixels in the pixel area can be read.

[0124] In the solid state image pickup device X, a group of pixels in the two pixel columns shares one vertical charge transfer path 55.

[0125] Therefore, the number of stages of horizontal CCDs connected to the vertical charge transfer paths is a half of the number of photodiodes of pixels in one row. It is possible to pattern the electrodes at a low pattering precision. The manufacture yield of solid state image pickup devices can be improved.

[0126] Although the shape of the pixel of the solid state image pickup device is of generally the square shape, other polygonal shapes may be used such as a rectangle and a regular hexagon.

[0127] It is apparent that various modifications, improvements, combinations, and the like can be made by those skilled in the art.

[0128] Next, the second embodiment of the invention will be described. In the solid state image pickup device of the second embodiment, color signals are added to display a moving image to be monitored.

[0129] FIG. 6 is a plan view of a solid state image pickup device according to the second embodiment of the invention.

[0130] A solid state image pickup device A2 includes: a pixel area B2 in which a plurality of pixels 153 are regularly disposed on a semiconductor substrate 151; vertical charge transfer paths 155 disposed in the pixel area B2 for transferring electric charges in the pixels 153 in a vertical direction; a horizontal charge transfer path 157 disposed under the pixel area B for transferring electric charges transferred from the vertical charge transfer paths 155 in a horizontal direction; and an output amplifier 167 for amplifying electric charges transferred from the horizontal charge transfer path 157.

[0131] In the pixel area B2, a plurality of pixels 153 are disposed on a two-dimensional plane of the semiconductor substrate 151 in the horizontal (row) and vertical (column) directions. One pixel and adjacent pixel are disposed shifted by a half pitch in the vertical direction, to thereby constitute a so-called pixel shifted solid state image pickup device.

[0132] Each pixel is of generally the square shape. Pixels are disposed so that diagonal lines of squares are regularly disposed in the vertical and horizontal directions.

[0133] Pixels regularly disposed in the vertical direction are called pixel columns.

[0134] A plurality of green pixels 153aregularly disposed in the vertical direction constitute a first pixel column P1a. A plurality of pixels regularly disposed in the vertical direction and being adjacent to the first pixel column P1ain the horizontal direction constitute a second pixel column P2a. Blue pixels 153band red pixels 153care alternately disposed in the vertical direction to form the second pixel column P2a.

[0135] The first pixel column P1aand the second pixel column P2aadjacent to the first pixel column P1ain the horizontal direction constitute one pixel group PG. A plurality of pixel groups PG1, PG2, PG3, . . . are disposed adjacent to each other in the horizontal direction to form the pixel area B2.

[0136] In FIG. 6, although only two pixel groups PG1 and PG2 are shown for the simplicity of drawing, a number of pixel groups are actually formed.

[0137] The vertical charge transfer path 155 (155a, 155b) (indicated by solid lines in FIG. 6) made of n-type semiconductor layers in the semiconductor substrate 151 is of a zigzag shape or a weaving shape extending along a space formed between, for example, the first and second pixel columns P1aand P2aof the first pixel group PG1. The vertical charge transfer path 155 is not formed between pixel groups PG. Namely, the vertical charge transfer path 155 is not formed between the pixel groups PG1 and PG2 adjacent in the horizontal direction. Pixels regularly disposed in the horizontal direction are called pixel rows.

[0138] Referring to FIG. 6, a vertical charge transfer electrode, e.g., a vertical charge transfer electrode 161-1 (indicated by broken lines) extends in the horizontal direction in a weaving shape or zigzag shape along sets of two oblique lines under a first pixel row Q1 constituted of the green pixels 153a.

[0139] A vertical charge transfer electrode 161-2 (indicated by solid lines) extends in the horizontal direction in a weaving shape or zigzag shape along sets of two oblique lines under a second pixel row Q1 constituted of blue and red pixels 153band 153cregularly and alternately disposed in the horizontal direction.

[0140] Eight vertical charge transfer electrodes 161-1 to 161-8 constitute one electrode group EG. Although only one electrode group is shown in FIG. 6, a number of electrode groups EG are actually formed in the pixel area B2.

[0141] Different voltages V8 to V1 can be applied from a driver circuit to a set of eight vertical charge transfer electrodes 161-1 to 161-8.

[0142] Between the horizontal charge transfer path 157 and the last stage vertical charge transfer electrode 161-8 on the side of the horizontal charge transfer path 157 among the vertical charge transfer electrodes 161, two transfer electrodes Va and Vb adjacent in the vertical direction and extending in the horizontal direction are formed. By using two transfer electrodes Va and Vb, electric charges are transferred from the vertical charge transfer paths 155 to the horizontal charge transfer path 157.

[0143] The transfer electrodes Va and Vb may be used as desired and the number of transfer electrodes is not limited only to two.

[0144] The horizontal charge transfer path 157 is formed at one ends of the vertical charge transfer paths 155. A plurality of horizontal charge transfer electrodes 165 made of first and second polysilicon layers are formed along the horizontal charge transfer path 157. Horizontal charge transfer electrodes 165-0 and 165-1 are connected together and applied with a voltage φ1. Horizontal charge transfer electrodes 165-2 and 165-3 are connected together and applied with a voltage φ2. Horizontal charge transfer electrodes 165-4 and 165-5 are connected together and applied with the voltage φ1.

[0145] Between two vertical charge transfer paths 155 adjacent in the horizontal direction, four horizontal charge transfer electrodes (in the example, shown in FIG. 6, electrodes 165-1 to 165-4) are disposed.

[0146] B (blue), R (red), B, R, B and R are disposed in the vertical direction in the pixel column P2ain this order from the uppermost. G (green), G, G, G, G and G are disposed in the vertical direction in the pixel column P1ain this order from the uppermost.

[0147] R (red), B (blue), R, B, R and B are disposed in the vertical direction in the pixel column P2bin this order from the uppermost. G (green), G, G, G, G and G are disposed in the vertical direction in the pixel column P1bin this order from the uppermost.

[0148] The color array shown in FIG. 6 is called a perfect G stripe RB checkered pattern.

[0149] As shown in FIG. 6, each pixel is of generally a rhomboid shape having four oblique sides.

[0150] Pixels of the first pixel columns P1aand P1bare disposed in spaces between rows and columns formed by the pixels 3c, 3b, 3c, . . . of the second pixel columns P2aand P2b.

[0151] As the drawing of FIG. 6 is rotated by 45 degrees, pixels of the first and second pixel columns P1 and P2 constitute generally a square matrix. In FIG. 6, a read gate is formed along a lower oblique side facing the vertical charge transfer path 155a, 155bamong the four oblique sides of each pixel.

[0152] FIGS. 7A and 7B show the main part of the solid state image pickup device shown in FIG. 6. FIG. 7A is a plan view and FIG. 7B is a cross sectional view taken along line VIIa-VIIb of FIG. 7A. In FIGS. 7A and 7B, for the convenience of drawing, the read gate is formed along an upper oblique side facing the vertical charge transfer path 155a, 155bamong the four oblique sides of each pixel. The description for FIGS. 7A and 7B is given based upon the array shown in FIG. 6.

[0153] As shown in FIG. 7A, the pixel 153 (153a, 153b, 153c) is of generally a square shape. Of the four vertices of the square, opposing two vertices of the pixels are generally and regularly disposed in the vertical and horizontal directions. Oblique sides (imaginary lines) coupling the four vertices and extending in a direction of right/left symmetry are called two oblique sides 177aand 177band two oblique sides 177cand 177d.

[0154] In an area surrounded by the four oblique sides 177a, 177b, 177cand 177dof the pixel 153, a photoelectric conversion element (photodiode) 191 (191a, 191b, 191c) is disposed. A transfer gate 195 is formed between a light reception area 191aof the photodiode 191 and the n-type semiconductor layer 181a, 181bpartially forming the vertical charge transfer path 155. A transfer gate 195 is formed, for example, along the oblique side 177aof the pixel 153a. First to third separation regions 197 made of high concentration p-type semiconductor layers are formed along the other three oblique sides 177b, 177cand 177d.

[0155] More specifically, the first separation region 197ais formed along the first set of two left oblique sides 177aand 177bamong the four oblique sides 177ato 177dof the pixel 153cin the first pixel column P1.

[0156] A first read gate 195ais formed near the vertical charge transfer path 181 along the upper oblique side 177cof the second set of two oblique sides 177cand 177dopposite to the side where the first separation region 197cis formed, and the second separation region 197bis formed along the oblique side 177dwhere the first read gate 195ais not formed.

[0157] The first separation region 197ais formed along the third set of two oblique sides 177aand 177bon the opposite side of the first pixel column P1, among the four oblique sides 177ato 177dof the pixel 153b.

[0158] The third separation region 197cis formed along the oblique side 177cnot facing the read gate 195cof the pixel 153aof the first pixel column P1, among the fourth set of two oblique sides 177cand 177don the opposite side of the first separation region 197a.

[0159] An n-type conductive layer 181ais formed in the semiconductor substrate 151 along the lower left oblique side 177bof the pixel 153aof the second pixel column P2. An n-type conductive layer 181bis formed in the semiconductor substrate 151 along the upper left oblique side 177aof the pixel 153a.

[0160] The n-type conductive layers 181aand 181bare coupled together to form the vertical charge transfer path 155 extending in a weaving shape or zigzag shape in the vertical direction toward the horizontal charge transfer path.

[0161] The vertical charge transfer electrode 165-5 extends in the horizontal direction in a weaving shape along the right and left lower oblique sides 177band 177dof a plurality of pixels 153aconstituting a first pixel row Q1. The vertical charge transfer electrodes 161-4 and 161-5 extend in the horizontal direction in a weaving shape along the four sides of a plurality of pixels 153aconstituting the first pixel row Q1.

[0162] As shown in FIG. 7B, a p-type deep well 193 is formed in the semiconductor substrate 151, and formed in this p-type well 193 are the photodiode 191, vertical charge transfer path 181a, transfer gate 195 and separation region 197.

[0163] The vertical charge transfer electrode 161-5 is formed over the region where the vertical charge transfer path 181ais formed.

[0164] Color filters CF are formed over the semiconductor substrate 151, with a planarizing film H being interposed therebetween.

[0165] Micro lenses ML made of, for example, photoresist, are formed on the color filters CF. The micro lens ML converges light onto the surface of the photodiode 191.

[0166] With reference to the timing charts shown in FIGS. 8 to 15, the method of controlling the solid state image pickup device A2 of this embodiment will be described, and the operation of this device will be described with reference to the array shown in FIG. 6 (the read gate being formed along the lower oblique side).

[0167] An operation of reading all pixels after a still image is picked up will be described with reference to the timing charts shown in FIGS. 8 to 11.

[0168] As shown in FIG. 8, a high pulse voltage is applied as a read voltage to the vertical charge transfer electrode 161-7 (V2) and vertical charge transfer electrode 161-3 (V6). This read voltage is, for example, 15 V. Electric charges for green color (hereinafter called “G charges”) are read as indicated by arrows from the photodiodes 153ato the vertical charge transfer path 155 under the vertical charge transfer electrode 161-7 and to the vertical charge transfer path 155 under the vertical charge transfer electrode 161-3. In FIG. 6 and the timing charts shown in FIGS. 8 to 11, G charges are represented by a solid black circle.

[0169] The G charges read to the vertical charge transfer path 155 under the vertical charge transfer electrode 161-7 (V2) are transferred to the horizontal charge transfer path 157 by sequentially applying a high voltage of about 8 V to the vertical charge transfer electrode 161-8 (V1), first transfer electrode Va and second transfer electrode Vb.

[0170] The G charges read to the vertical charge transfer path 155 under the vertical charge transfer electrode 161-3 (V6) are transferred to the horizontal charge transfer path 157 by sequentially applying a high voltage of about 8 V to the vertical charge transfer electrodes 161-4 (V5) to 161-8 (V1), first transfer electrode Va and second transfer electrode Vb.

[0171] The G charges transferred from the vertical charge transfer path 155 to the horizontal charge transfer path 157 are transferred toward the output amplifier 167 by the two-phase driving method. The G signal amplified by the output amplifier 167 is supplied to an external circuit.

[0172] Next, the remaining G charges are read.

[0173] As shown in FIG. 9, the high pulse voltage is applied as the read voltage to the vertical charge transfer electrode 161-5 (V4) and vertical charge transfer electrode 161-1 (V8). The remaining G charges are therefore read to the vertical charge transfer path 155 as shown by arrows in FIGS. 6 and 9.

[0174] The G charges are transferred to the horizontal charge transfer path 157 by the same operation described with FIG. 8.

[0175] The G charges transferred to the horizontal charge transfer path 157 are transferred toward the output amplifier 167 by the two-phase driving method. The G signal amplified by the output amplifier 167 is supplied to the external circuit.

[0176] The operation of reading the G charges is the same for all pixel groups PG (PG1 and PG2 in FIG. 6) in the horizontal direction.

[0177] Next, B and R charges are read.

[0178] As shown in FIG. 10, the high pulse voltage is applied as the read voltage to the vertical charge transfer electrode 161-8 (V1) and vertical charge transfer electrode 161-3 (V5). The R charges (represented by a solid black square) are therefore read to the vertical charge transfer path 155aand the B charges (represented by a hatched square) are therefore read to the vertical charge transfer path 155b. FIG. 10 is the timing chart associated with the vertical charge transfer path 155aso that only the R charges are shown and the B charges are read to the vertical charge transfer path 155b.

[0179] The R and B charges are supplied to the external circuit by the same operation described with FIG. 8.

[0180] As shown in FIG. 11, the high pulse voltage is applied as the read voltage to the vertical charge transfer electrode 161-6 (V3) and vertical charge transfer electrode 161-2 (V7). The B charges are therefore read to the vertical charge transfer path 155aand the R charges are therefore read to the vertical charge transfer path 155b. FIG. 11 is the timing chart associated with the vertical charge transfer path 155aso that only the B charges are shown and the R charges are read to the vertical charge transfer path 155b.

[0181] The R and B charges are supplied to the external circuit by the same operation described with FIG. 8. With these operations, all pixels can be read and a still image can be reproduced clearly.

[0182] Charges are read from pixels by applying read pulses to vertical charge transfer electrodes 161 separated by four electrodes in the vertical direction. The read charges of the same color are transferred to one of the vertical charge transfer paths 155aand 155b.

[0183] It is therefore possible to prevent mixture (color mixture) of transferred charges which may be caused if charges of different colors are on the same vertical charge transfer path. Since mixture of transferred charges can be prevented, the solid state image pickup device of this embodiment is hard to degrade the quality of a reproduced image.

[0184] A method of reading an image signal in a video mode for reproducing a moving image to be monitored in a digital camera, will be described with reference to FIGS. 12 to 17.

[0185] In the video mode, electric charges are not read from all pixels, but electric charges are read only from pixels in second to seventh rows among each pixel column Q constituted of eight rows.

[0186] FIGS. 12 to 14 illustrate a thinning read method which applies the read voltage only to the vertical charge transfer electrodes 161-8 (V1) and 161-1 (V8) and the vertical charge transfer electrodes 161-5 (V4) and 161-4 (V5).

[0187] As shown in FIG. 12, while a plus voltage, e.g., 8 V, is applied to the electrode V8, a high plus voltage, e.g., 15 V, is applied to the electrode V8 as the read pulse.

[0188] G charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. A plus voltage is sequentially applied to the electrodes 161-1 (V8) to 161-5 (V4) to thereby transfer G charges in the vertical direction. The G charges are therefore stored in the vertical charge transfer path 155aunder the electrode 161-5.

[0189] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V4, a high plus voltage, e.g., 15 V, is applied to the electrode V4 as the read pulse.

[0190] G charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. The G charges are therefore added to the G charges transferred downward in the vertical charge transfer path under the electrode 161-5 (forming a GG signal).

[0191] A plus voltage is sequentially applied to the electrodes 161-5 (V4) to 161-8 (V1) to transfer the signal charges of the GG signal.

[0192] A plus voltage is applied to the electrodes Va and Vb to transfer the GG signal to the horizontal charge transfer path 157.

[0193] While a plus voltage, e.g., 8 V, is applied to the electrode V1, a high plus voltage, e.g., 15 V, is applied to the electrode V1 as the read pulse.

[0194] R charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. A plus voltage is sequentially applied to the electrodes 161-8 (V1) to 161-4 (V5) to thereby transfer R charges in the vertical direction. The R charges are therefore stored in the vertical charge transfer path 155aunder the electrode 161-4.

[0195] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V5, a high plus voltage, e.g., 15 V, is applied to the electrode V5 as the read pulse.

[0196] R charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. The R charges are therefore added to the R charges transferred downward in the vertical charge transfer path under the electrode 161-4 (forming an RR signal).

[0197] A plus voltage is sequentially applied to the electrodes 161-5 (V4) to 161-8 (V1) to transfer the signal charges of the RR signal.

[0198] A plus voltage is applied to the electrodes Va and Vb to transfer the RR signal to the horizontal charge transfer path 157.

[0199] FIG. 13 illustrates a method of reading electric charges from pixels in the pixel group PG2.

[0200] While a plus voltage, e.g., 8 V, is applied to the electrode V1, a high plus voltage, e.g., 15 V, is applied to the electrode V1 as the read pulse.

[0201] B charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. A plus voltage is sequentially applied to the electrodes 161-8 (V1) to 161-4 (V5) to thereby transfer B charges in the vertical direction. The B charges are therefore stored in the vertical charge transfer path 155bunder the electrode 161-4.

[0202] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V5, a high plus voltage, e.g., 15 V, is applied to the electrode V5 as the read pulse.

[0203] B charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. The B charges are therefore added to the B charges transferred downward in the vertical charge transfer path 155bunder the electrode 161-4 (forming a BB signal).

[0204] A plus voltage is sequentially applied to the electrodes 161-4 (V5) to 161-8 (V1) to transfer the signal charges of the BB signal.

[0205] A plus voltage is applied to the electrodes Va and Vb to transfer the BB signal to the horizontal charge transfer path 157.

[0206] While a plus voltage, e.g., 8 V, is applied to the electrode V8, a high plus voltage, e.g., 15 V, is applied to the electrode V8 as the read pulse.

[0207] G charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. A plus voltage is sequentially applied to the electrodes 161-1 (V8) to 161-5 (V4) to thereby transfer G charges in the vertical direction. The G charges are therefore stored in the vertical charge transfer path 155bunder the electrode 161-5.

[0208] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V4, a high plus voltage, e.g., 15 V, is applied to the electrode V4 as the read pulse.

[0209] G charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. The G charges are therefore added to the G charges transferred downward in the vertical charge transfer path 155bunder the electrode 161-5 (forming a GG signal).

[0210] A plus voltage is sequentially applied to the electrodes 161-5 (V4) to 161-8 (V1) to transfer the signal charges of the GG signal.

[0211] A plus voltage is applied to the electrodes Va and Vb to transfer the GG signal to the horizontal charge transfer path 157.

[0212] FIG. 14 shows the layout of electric charges of respective colors read from the photodiodes to the vertical charge transfer paths 155aand 155bby the above-described read method.

[0213] The added RR charges are stored in the vertical charge transfer path 155aunder the electrode V1. The added GG charges are stored in the vertical charge transfer path 155aunder the electrode V4.

[0214] The added BB charges are stored in the vertical charge transfer path 155bunder the electrode V1. The added GG charges are stored in the vertical charge transfer path 155bunder the electrode V4.

[0215] The electric charges of RR, BB and GG are stored in other vertical charge transfer paths 155aand 155bin a similar manner.

[0216] As described with reference to FIGS. 12 to 14, the solid state image pickup device can display a moving image quickly by reading pixels through thinning.

[0217] Moreover, since the signals of the same colors are added, the image pickup sensitivity can be improved and a clear image can be formed.

[0218] FIGS. 15 to 18 illustrate a thinning read method which applies the read voltage only to the vertical charge transfer electrodes 161-7 (V2) and 161-6 (V3) and the vertical charge transfer electrodes 161-3 (V6) and 161-2 (V7).

[0219] As shown in FIG. 15, while a plus voltage, e.g., 8 V, is applied to the electrode V2, a high plus voltage, e.g., 15 V, is applied to the electrode V2 as the read pulse.

[0220] G charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. A plus voltage is sequentially applied to the electrodes 161-7 (V2) to 161-3 (V6) to thereby transfer G charges in the vertical direction. The G charges are therefore stored in the vertical charge transfer path 155aunder the electrode 161-3.

[0221] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V6, a high plus voltage, e.g., 15 V, is applied to the electrode V6 as the read pulse.

[0222] G charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. The G charges are therefore added to the G charges transferred downward in the vertical charge transfer path under the electrode 161-3 (forming a GG signal).

[0223] A plus voltage is sequentially applied to the electrodes 161-3 (V6) to 161-8 (V1) to transfer the signal charges of the GG signal.

[0224] A plus voltage is applied to the electrodes Va and Vb to transfer the GG signal to the horizontal charge transfer path 157.

[0225] While a plus voltage, e.g., 8 V, is applied to the electrode V7, a high plus voltage, e.g., 15 V, is applied to the electrode V7 as the read pulse.

[0226] B charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. A plus voltage is sequentially applied to the electrodes 161-3 (V7) to 161-6 (V3) to thereby transfer B charges in the vertical direction. The B charges are therefore stored in the vertical charge transfer path 155aunder the electrode 161-6.

[0227] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V3, a high plus voltage, e.g., 15 V, is applied to the electrode V3 as the read pulse.

[0228] B charges are therefore read to the vertical charge transfer path 155aof the pixel group PG1. The B charges are therefore added to the B charges transferred downward in the vertical charge transfer path under the electrode 161-6 (forming a BB signal).

[0229] A plus voltage is sequentially applied to the electrodes 161-6 (V3) to 161-8 (V1) to transfer the signal charges of the BB signal.

[0230] A plus voltage is applied to the electrodes Va and Vb to transfer the BB signal to the horizontal charge transfer path 157.

[0231] FIG. 16 illustrates a method of reading electric charges from pixels in the pixel group PG2.

[0232] While a plus voltage, e.g., 8 V, is applied to the electrode V2, a high plus voltage, e.g., 15 V, is applied to the electrode V2 as the read pulse.

[0233] G charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. A plus voltage is sequentially applied to the electrodes 161-1 (V2) to 161-3 (V6) to thereby transfer G charges in the vertical direction. The G charges are therefore stored in the vertical charge transfer path 155bunder the electrode 161-3.

[0234] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V6, a high plus voltage, e.g., 15 V, is applied to the electrode V6 as the read pulse.

[0235] G charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. The G charges are therefore added to the G charges transferred downward in the vertical charge transfer path 155bunder the electrode 161-3 (forming a GG signal).

[0236] A plus voltage is sequentially applied to the electrodes 161-4 (V5) to 161-8 (V1) to transfer the signal charges of the GG signal.

[0237] A plus voltage is applied to the electrodes Va and Vb to transfer the GG signal to the horizontal charge transfer path 157.

[0238] While a plus voltage, e.g., 8 V, is applied to the electrode V7, a high plus voltage, e.g., 15 V, is applied to the electrode V7 as the read pulse.

[0239] R charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. A plus voltage is sequentially applied to the electrodes 161-2 (V7) to 161-6 (V3) to thereby transfer R charges in the vertical direction. The R charges are therefore stored in the vertical charge transfer path 155bunder the electrode 161-6.

[0240] In this state, i.e., while the plus voltage, e.g., 8 V, is applied to the electrode V3, a high plus voltage, e.g., 15 V, is applied to the electrode V3 as the read pulse.

[0241] R charges are therefore read to the vertical charge transfer path 155bof the pixel group PG2. The R charges are therefore added to the R charges transferred downward in the vertical charge transfer path 155bunder the electrode 161-6 (forming an RR signal).

[0242] A plus voltage is sequentially applied to the electrodes 161-6 (V3) to 161-8 (V1) to transfer the signal charges of the RR signal.

[0243] A plus voltage is applied to the electrodes Va and Vb to transfer the RR signal to the horizontal charge transfer path 157.

[0244] FIG. 17 shows the layout of electric charges of respective colors read from the photodiodes to the vertical charge transfer paths 155aand 155bby the above-described read method.

[0245] The added BB charges are stored in the vertical charge transfer path 155aunder the electrode V3. The added GG charges are stored in the vertical charge transfer path 155aunder the electrode V6.

[0246] The added RR charges are stored in the vertical charge transfer path 155bunder the electrode V3. The added GG charges are stored in the vertical charge transfer path 155bunder the electrode V3.

[0247] The electric charges of RR, BB and GG are stored in other vertical charge transfer paths 155aand 155bin a similar manner.

[0248] As described with reference to FIGS. 15 to 17, the solid state image pickup device can display a moving image quickly by reading pixels through thinning.

[0249] Moreover, since the signals of the same colors are added, the image pickup sensitivity can be improved and a clear image can be formed.

[0250] Although the above-described method of reading a solid state image pickup device utilizes the GG/RG alternate array, other color filter arrays may also be used.

[0251] In thinning pixels, although the read voltages are applied to two adjacent electrodes in the vertical direction among a group of eight vertical charge transfer electrodes, the read voltages may be applied to three of more vertical charge transfer electrodes.

[0252] In the solid state image pickup device, signals of two adjacent pixel columns are read to a single common vertical charge transfer path. It is therefore possible to mitigate a patterning precision of a vertical charge transfer path. The relative size of a pixel, e.g., a photodiode, can be made large. The amount of electric charges accumulated in a pixel can be increased. From another point of view, the pixel size can be made small assuming that the patterning precision of the vertical charge transfer path is the same.

[0253] The number of stages of the horizontal charge transfer path connected to the vertical charge transfer paths is a half of the number of photodiodes disposed in one row. The pitch of the horizontal charge transfer electrodes can therefore be made large. The horizontal transfer path can be formed at a low patterning precision. Manufacture yields of solid state image pickup devices can be improved.

[0254] By using the method of reading a solid state image pickup device of this invention, all pixels of a still image can be read. Since thinning is easy, a moving image to be monitored can be easily reproduced.

[0255] In the solid state image pickup device of the embodiments, a pixel of generally a square shape is used. The pixel may take other polygonal shapes different from a square shape, such as a rectangle and a hexagon.

[0256] The color filter array of a solid state image pickup device may take other arrays if they can realize color image pickup. In addition to the color filter array based on three primary colors (red (R), green (G) and blue (B)), so-called complementary color filter arrays may also be used.

[0257] A complementary color type color filter array may be: a combination of green (G), cyan (Cy) and yellow (Y); a combination of cyan (Cy), yellow (Ye) and white or achromatic color (W); a combination of cyan (Cy), magenta (Mg), yellow (Ye) and green (G); a combination of cyan (Cy), yellow (Ye), green (G) and white or achromatic color (W); or the like.

[0258] The pattern of a primary color filter array may be: a perfect G stripe RB perfect checkered pattern used for the embodiments; a Bayer type; an interline type; a G stripe RB checkered pattern; or the like.

[0259] The present invention has been described in connection with the preferred embodiments. The invention is not limited only to the above embodiments. It is apparent that various modifications, improvements, combinations, and the like can be made by those skilled in the art.