Soft start precharge circuit for DC power supply

[0001] The present application claims the benefit of now abandoned application Ser. No. 60/470,299, filed May 14, 2003, by E. Solie, entitled: “Soft Start Precharge Circuit for DC Power Supply,” assigned to the assignee of the present application and the disclosure of which is incorporated herein.

[0002] The present invention relates in general to electronic circuits and components therefor, and is particularly directed to a soft start precharge circuit that is used to precharge the soft start capacitor to the voltage on the output capacitor of a pulse width modulator-based, switched DC power supply circuit, so as to mitigate against excessive currents, and decrease the time required for the output capacitor to be charged to the reference voltage.

[0003] Electrical power for an integrated circuit (IC) is typically supplied by one or more direct current (battery) power sources, such as a pulse width modulation (PWM)-based, DC-DC converter. This type of converter contains a PWM signal generator that supplies a synchronous PWM signal to a switching circuit driver. The switching circuit drive, in turn, controls the on-time and off-time of electronic power switching devices (such as a pair of FETs connected between a pair of power supply rails). A common node between the two FETs is coupled through an inductor to a load reservoir or output capacitor, with the connection between the inductor and the capacitor serving as an output node from which a desired (regulated) DC output voltage is applied to the load.

[0004] FIG. 1 diagrammatically illustrates a conventional soft start circuit that may be used with such a DC-DC converter. As shown therein, an input reference voltage Vref is coupled to a current limiting (at I_Lim) Gm Amplifier buffer 10, the output of which is coupled to the non-inverting (+) input 21 of an error amplifier 20 and to a soft start capacitor 30, which is referenced to ground. A feedback resistor 40 is coupled between the output 23 and the inverting (−) input 22 of the error amplifier. The output 23 of the error amplifier is coupled to a pulse width modulator (PWM) 50. The output of the PWM 50 is coupled through an inductor 60 to an output node 65, to which an output capacitor 70, referenced to ground, is coupled. The voltage at the output node 65 is fed back through a feedback resistor 80 to the inverting (−) input 22 of error amplifier 20. A switch 90 is coupled in parallel with the soft start capacitor 30 and operates as follows.

[0005] When the DC-DC converter is disabled, the switch 90 is closed, so as to short the capacitor 30 to ground. When the converter is enabled, switch 90 is opened, so that the voltage across the soft start capacitor 30 ramps up from its initial voltage of zero (0) volts to the reference voltage Vref, at a constant charging rate of dv/dt, set by the ratio of I_Lim/Csoft. The voltage across the output capacitor 70 will follow the voltage ramp across the soft start capacitor 30.

[0006] In this circuit, if the output capacitor 70 is charged up at the time the converter is enabled (for example, if the converter is disabled and then reenabled before the output capacitor 70 is discharged), the converter will attempt to discharge the voltage across the output capacitor Cout to the soft start voltage of nearly zero volts across the soft start capacitor 30. If the circuit is not designed properly, the resulting current could be excessively large and may damage components. In addition, circuit operation is inefficient, as it discharges the output capacitor before charging it.

[0007] Pursuant to the invention, rather than couple the soft start switch of the circuit of FIG. 1 to ground, this switch is coupled to the output capacitor. As a result, when the circuit is disabled, the switch shorts the soft start capacitor to the output node. This has the effect of precharging the soft start capacitor to the value of the output voltage. As a consequence, when the DC-DC converter is enabled, it will not attempt to discharge the soft start capacitor, as in the circuit of FIG. 1. Instead, it will ramp the output voltage from its current value to the voltage Vref without excessive currents. In addition, this switch configuration allows the output capacitor to be charged to the reference voltage Vref in a shorter time than the prior art circuit of FIG. 1, since the soft start ramp need not start at zero; it can start at Vout.

[0008] In an alternative embodiment the switch is removed and another switch is used in its placed. However, rather than being coupled directly to the soft start capacitor and to the front end of the error amplifier, this auxiliary switch has its common terminal coupled to the buffer amplifier. The switch has a first terminal coupled to the reference voltage and a second terminal coupled to the output node. In this alternative configuration, the soft start capacitor is charged through the buffer amplifier. When the switch is disabled, the positive input of the buffer amplifier is connected to the output node. This causes the soft start capacitor to charge up to the output voltage. When the switch is enabled, the positive input of the buffer amplifier is disconnected from the output voltage and connected instead to the reference voltage.

[0012] Before describing an embodiment of the soft start precharge circuit of the present invention, it should be observed that the invention resides primarily in arrangements of conventional circuit components, and the manner in which they may be incorporated into a DC converter of the type described above. It is to be understood that the present invention may be embodied in a variety of other implementations, and should not be construed as being limited to only the embodiment shown and described herein. Rather, the implementation example shown and described is intended to supply only those specifics that are pertinent to the present invention, so as not to obscure the disclosure with details that are readily apparent to one skilled in the art having the benefit of present description. Throughout the text and drawings like numbers refer to like parts.

[0013] Attention is now directed to FIG. 2, which diagrammatically illustrates an embodiment of the soft start precharge circuit of the invention. For the most part the circuit of FIG. 2 includes components and interconnections of the same as employed in FIG. 1, and attention may be directed to the description above for an explanation of the same. However, the soft start precharge circuit exhibits a significant difference with respect to the circuit of FIG. 1 with respect to the connections for the switch 90. In particular, rather than reference the switch 90 to ground, as in the prior art circuit of FIG. 1, switch 90 is coupled to the output capacitor 70.

[0014] As a result, when the circuit is disabled, the switch 90 shorts the soft start capacitor 30 to the output node 65. This has the effect of precharging the soft start capacitor 30 to the value of the output voltage. This means that when the DC-DC converter is enabled, it will not attempt to discharge the output capacitor 70, as in the circuit of FIG. 1. Instead, it will ramp the output voltage from its current value to the voltage Vref without excessive currents. In addition, it allows the output capacitor 70 to be charged to the reference voltage Vref in a shorter time than the prior art circuit of FIG. 1, since the soft start ramp does not have to start at zero; it can start at Vout.

[0015] FIG. 3 illustrates an alternative embodiment to the configuration shown in FIG. 2. In FIG. 2, the switch 90 of FIG. 2 is removed and a switch 100 is used in its placed. However, rather than being coupled directly to the soft start capacitor 30 and to the front end of the error amplifier 20, switch 100 has its common terminal coupled to the non-inverting (+) input of Gm Amplifier buffer 10. Switch 100 has a first terminal coupled to the reference voltage Vref and a second terminal coupled to the output node 65.

[0016] In this alternative configuration, the soft start capacitor 30 is charged through the Gm amplifier 10. When switch 100 is disabled, the positive (+) input of the Gm amplifier 10 is connected to Vout at node 65. This causes the Csoft capacitor 30 to charge up to the output voltage. When switch 100 is enabled, the positive (+) input of the Gm amplifier 10 is disconnected from Vout and connected to Vref.

[0017] While I have shown and described several embodiments in accordance with the present invention, it is to be understood that the same is not limited thereto but is susceptible to numerous changes and modifications as known to a person skilled in the art. I therefore do not wish to be limited to the details shown and described herein, but intend to cover all such changes and modifications as are obvious to one of ordinary skill in the art.