Self-driving circuit for a DC/DC converter

[0002] The present invention relates to a self-driving circuit for a DC/DC converter of low voltage, high current, and high power density.

[0003] With the rapid development of high technologies, such as, communications, remote sensing, electronic computers, and electronic instrument, the requirement of power supplies of such electronic equipment has increased accordingly. DC/DC converter of low voltage, high current, and high power density is the core technology of the power supplies for supper integrated circuits and high-speed central processors. To meet high efficiency and high power density requirement, the auxiliary (secondary) side of such DC/DC converters shall use synchronous rectifying MOSFET transistor in place of Schottky diode for rectification in order to reduce power loss. However, for a synchronous rectifying MOSFET, the gate thereof needs a corresponding drive circuit to stimulate. In order to prevent cross-conductive losses, the requirement of time sequence of the drive circuit is very high. The existing drive circuits utilize external driving technology, but its control is too complicated and the cost is high.

[0004] For a converter having only one synchronous rectifying MOSFET at the secondary side, such as a backward stimulating circuit, the synchronous rectifying MOSFET cannot be driven directly by the waveform of the secondary side of the transformer. Otherwise, the transistor would be damaged for failure to shut down. For instance, FIG. 1ashows a traditional backward stimulating circuit. The voltage waveform of its secondary side is shown in FIG. 1b. If such a waveform of the secondary side is used to drive the gate of SR₁, as shown in FIG. 2, SR₁may hardly be turned off owing to V_gs1=V_o, and there will be short-circuit in the secondary side to cause losses when S turns on.

[0005] If an external auxiliary winding is used for self-driving, the converting efficiency may reduce dramatically because it is hard to control the cross-conducting time. The efficiency is normally lower than that of using Schottky diode. For instance, FIG. 3 shows a self-driving circuit using an external auxiliary winding Nsa to drive SR₁. When S turns off and the secondary side voltage changes to positive at top and negative at bottom, SR₁turns on, and the energy of the secondary side of the transformer will be provided to the load through SR₁; when S turns on, S and SR₁may be on at the same time because it will need sometime for the secondary side voltage to change to negative at bottom and positive at top such that the secondary side would be short-circuited. Although this time is relatively short, its cross-conductive loss is rather high. If serious, it may damage S and SR₁. Even under the normal operation, the converting efficiency can hardly be increased. Therefore, to improve the converting efficiency, the self-driving circuit should be modified.

[0006] Therefore, the object of the present invention is to solve the existing problem in the self-driving circuit of the main circuit of a DC/DC converter of low voltage and high current, and to provide a self-driving circuit for the converter that has reduced cross-conductive loss, simple structure, and low cost.

[0007] The present invention is realized through the following technical embodiments. In the first configuration of the self-driving circuit of the DC/DC converter of the present invention, the rectification portion of the converter comprises a synchronous rectifying MOS transistor (SR₁), wherein the self-driving circuit is composed of two resisters (R_a1, R_a2), two capacitors (C_a1, C_a2), a PNP transistor (Q_a1) and a NPN transistor (Q_a2). The resister (R_a1) and the capacitor (C_a1) are connected in parallel, and an end of the parallel connection of the register (R_a2) and capacitor (C_a2) connected with the base of the transistor (Qa) and the other end connected with an end of parallel connected resister (R_a2) and capacitor (C_a2), and with the positive end of the transformer winding (Ns) and the drain end of the rectifying MOS transistor (SR₁). The other end of the parallel connection of the resister (R_a2) and capacitor (C_a2) is connected with the base end of the transistor (Q_a2). The emitter of the transistor (Q_a2) is connected with the source end of the MOS transistor (SR₁), while its collector is connected the collector of the transistor (Q_a1) and the gate of the MOS transistor (SR₁). The emitter of the transistor (Q_a1) is connected with the negative end of the winding (Ns).

[0008] In the second configuration of the self-driving circuit of the DC/DC converter of the present invention, the rectification portion of the converter comprises a synchronous rectifying MOS transistor (SR₁), wherein the self-driving circuit is composed of a diode (Da), a small power MOS transistor (SRa), an auxiliary winding (Nsa), a time delay driving circuit, and an isolating differential circuit. The delay driving circuit and the isolating differential circuit are connected with each other. An end of the isolating differential circuit is connected with the gate of the small power MOS transistor SRa. The positive end of the auxiliary winding (Nsa) is connected with the source end of the small power MOS transistor (SRa) and the source end of the synchronous rectifying MOS transistor (SR₁), while its negative end is connected with the anode of the diode Da. The cathode of the diode Da is connected with the gate of the synchronous rectifying MOS transistor (SR₁) and the drain end of the small power transistor (SRa).

[0009] The isolating differential circuit may be composed of the windings (N_pa1) and (N_pa2) of the transformer, two capacitors, two resisters, and a diode. The winding N_sa1is connected, through the capacitor, with the parallel-connected resister and diode.

[0010] The time delay driving circuit is composed of a delay circuit and a driving circuit, wherein an example of the delay circuit is formed by connecting the diode and resister in parallel, and then connected in serial to a ground capacitor.

[0011] The DC/DC converter is a double backward converter including windings (Np, Ns) and power MOS transistors (S₁, S₂). The positive end of the winding (Np) is connected with the source end of the power MOS transistor (S₁), and the negative end of the winding (Np) is connected to the drain end of the power MOS transistor (S₂). The delay driving circuit is connected with the gates of the power MOS transistors (S₁) and (S₂), respectively.

[0012] The DC/DC converter is a clamping backward converter of three windings (Nc, Np, Ns), including the windings (Nc, Np, Ns), power MOS transistor (S) and diode (Dc). The negative end of the winding (Np) is connected with the drain end of the power MOS transistor (S), and the positive end of the winding (Nc) is connected with the cathode of the diode (Dc). The delay driving circuit is connected with the gate of the power MOS transistor (S).

[0013] The DC/DC converter is a R.C.D. clamping backward converter including windings (Np, Ns), a power MOS transistor (S), a resister (Rc), a diode (Dc) and a capacitor (Cc). The negative end of the winding (Np) is connected with the drain end of the power MOS transistor (S). The delay driving circuit is connected with the gate of the power MOS transistor (S), and the negative end of the winding Np is connected with the anode of the diode (Dc). An end of the parallel-connected capacitor (Cc) and resister (Rc) is connected with the cathode of the diode (Dc), while the other end is connected with the positive end of the winding (Np).

[0014] The DC/DC converter is an active clamping backward converter including windings (Np, Ns), power MOS transistors (S, Sc) and a capacitor (Cc). The positive end of the winding (Np) is connected through the capacitor (Cc) with the drain end of the power MOS transistor (Sc). The source end of the power MOS transistor (Sc) is connected with the drain end of the power MOS transistor (S) and the negative end of the winding (Np). The delay driving circuit is connected with the gate of the power MOS transistor (S).

[0015] The converter is a diode clamping double backward converter including windings (Np, Ns), power MOS transistors (S₁, S₂) and diodes (D₁, D₂). The positive end of the winding (Np) is connected with the source end of the power MOS transistor (S₁), and the negative end of the winding (Np) is connected with the drain end of the power MOS transistor (S₂). The anode of the diode (D₁) is connected with the negative end of the winding (Np), and the cathode is connected with the drain end of the power MOS transistor (S₁). The anode of the diode (D₂) is connected with the source end of the power MOS transistor (S₂), and the cathode is connected with the positive end of the winding (Np). The delay driving circuit is connected, respectively, with the gates of the power MOS transistors (S₁), (S₂).

[0016] The converter is an active clamping double backward converter including windings (Np, Ns), power MOS transistors (S₁, S₂), a capacitor (Cc) and a power MOS transistor (Sc). The positive end of the winding (Np) is connected with the source of the power MOS transistor S₁), and the negative end of the winding (Np) is connected with the drain end of the power MOS transistor (S₂). The capacitor (Cc) and the power MOS transistor (Sc) are connected in serial, and then connected parallel the winding (Np), with its two ends connected with positive and negative ends of the winding (Np), respectively. The delay driving circuit is connected with the gates of the power MOS transistors (S₁) and (S₂), respectively.

[0017] The present invention utilizes certain small power resistance and capacitance elements, diodes, transistors or field effect transistors to realize the equivalent self-driving technology. Thus, it ensures the reliable turn-on and turn-off of SR1, and at the same time it ensures the minimum cross-conductive loss and high converting efficiency.

[0018] The present invention will be further explained through the following embodiments in conjunction with the accompanying drawings.

[0019] FIG. 1ais a normal backward converter circuit;

[0020] FIG. 1bis the waveform of the secondary side voltage of the above circuit;

[0021] FIG. 2 is a direct self-driving circuit;

[0022] FIG. 3 is a known self-driving circuit;

[0023] FIG. 4ais the first self-driving circuit of the present invention;

[0024] FIG. 4bis the second self-driving circuit of the present invention;

[0025] FIG. 5ais an embodiment of a double backward converter using the first self-driving circuit;

[0026] FIG. 5bis an embodiment of a double backward converter using the second self-driving circuit;

[0027] FIG. 6ais an embodiment of a three-winding clamping backward converter using the first self-driving circuit;

[0028] FIG. 6bis an embodiment of a three-winding clamping backward converter using the second self-driving circuit;

[0029] FIG. 7ais an embodiment of a R. C. D. clamping backward converter using the first self-driving circuit;

[0030] FIG. 7bis an embodiment of a R. C. D. clamping backward converter using the second self-driving circuit;

[0031] FIG. 8ais an embodiment of an active clamping backward converter using the first self-driving circuit;

[0032] FIG. 8bis an embodiment of an active clamping backward converter using the second self-driving circuit;

[0033] FIG. 9ais an embodiment of a diode clamping double backward converter using the first self-driving circuit;

[0034] FIG. 9bis an embodiment of a diode clamping double backward converter using the second self-driving circuit;

[0035] FIG. 10ais an embodiment of an active clamping double backward converter using the first self-driving circuit;

[0036] FIG. 10bis an embodiment of an active clamping double backward converter using the second self-driving circuit;

[0037] FIG. 11 shows a typical waveform of the converter using the driving circuit of FIG. 4 (a); and

[0038] FIG. 12 shows a typical waveform of the converter using the driving circuit of FIG. 4 (b).

[0039] The operation principle of the two self-driving circuits of the present invention is explained hereinafter. FIG. 4 (a) is a non-isolating self-driving circuit of a normal backward converter. Windings Np and Ns are connected in a manner of non-identical names, the rectification portion of the converter comprises a synchronous rectifying MOS transistor SR₁. The self-driving circuit is composed of two resisters R_a1, R_a2, two capacitors C_a1, C_a2, a PNP transistor Q_a1and a NPN transistor Q_a2. The configuration is as follows: the resister R_a1and the capacitor C_a1are connected in parallel, and an end of the parallel connection is connected with the base of the transistor Q_a1, and the other end thereof is connected with an end of the parallel connection of the register R_a2and capacitor C_a2, and with the positive end of the transformer winding Ns and the drain end of the rectifying MOS transistor SR₁. The other end of the parallel connection of the resister R_a2and capacitor C_a2is connected with the base end of the transistor Q_a2. The emitter of the transistor Q_a2is connected with the source end of the MOS transistor SR₁, while its collector is connected the collector of the transistor Q_a1and the gate end of the MOS transistor SRI. The emitter of the transistor Q_a1is connected with the negative end of the winding Ns.

[0040] Through R_a1, C_a1, and Q_a1, SR₁may turn on after S turns off. Through R_a2, C_a2, and Q_a2, SR₁remains off when S is on.

[0041] When the self-driving circuit of FIG. 4ais used, the typical operation waveform of various voltages and current of the converter is shown in FIG. 11.

[0042] At t=t₁, the main switch S turns off; at this time, the waveform of the secondary side voltage changes from positive at bottom and negative at top to positive at top and negative at bottom. Q_a1turns on quickly through R_a1. and C_a1V_aSR1changes to V_Oso as to turn on SR₁, and the energy of the secondary side of the transformer is provided to the load through SR₁. At t=t₂, the main switch S turns on again. The waveform of the secondary side changes from to positive and bottom negative to top negative and bottom positive, and Q_a2turns on quickly through R_a2, C_a2. V_gSR1changes to zero so as to turn off SR₁, and the primary side of the transformer stores energy, and the capacitor C provides power to the load. The accelerate circuit formed of R_a2, C_a2enables that Q_a2turns on quicker than SR₁, so as to ensure the quick discharge of the gate voltage of SR₁. By simply carefully selecting R_a2, C_a2, it may dramatically reduce the cross-conductive loss between SR₁and S to increase the converting efficiency. R_a2and C_a2can hardly be optimized when the frequency is relatively high because there is a storing time when Q_a2turns off.

[0043] Accordingly, the switch frequency of such technology should be lower than 250kHz. When the switch frequency of the converter is relatively low, such technology may achieve very high converting efficiency.

[0044] FIG. 4bis an isolating self-driving circuit of the normal backward converter. The circuit of FIG. 4bis to utilize an auxiliary winding Nsa, a diode Da, a small power MOSFET (SRa), a set of isolating pulse control circuit and a time delay driving circuit to accomplish the function of R_a1, C_a1, Q_a1and R_a2, C_a2, Q_a2of FIG. 4a. The rectification portion of the converter comprises a synchronous rectifying MOS transistor SR₁, and the self-driving circuit is composed of a diode Da, a small power MOS transistor SRa, an auxiliary winding Nsa, a delay driving circuit and an isolating differential circuit. The structure is as follows: the delay driving circuit and the isolating differential circuit are connected; an end of the isolating differential circuit is connected with the gate of the small power transistor SRa; the positive end of the auxiliary winding is connected with the source of the small power MOS transistor SRa, and the negative end is connected to the anode of the diode Da. The cathode of the diode Da is connected with the gate of the synchronous rectifying MOS transistor SR₁and the drain end of the small power transistor SRa.

[0045] The function of the delay driving circuit is to let SR1 turn off a little bit earlier than the turn-on of S so as to control the best delay time interval and to increase the efficiency of the converter. The typical waveform thereof is shown in FIG. 12.

[0046] The turning-on of SR1 is realized by the external auxiliary winding Nsa and the diode Da, and the turning-off thereof is realized by a small power MOSFET Sa, a delay driving circuit and an isolating differential circuit. Through the delay driving circuit, SR1 is adjustably turned off before S turns on so as to minimize the cross-conductive loss and to maximize the efficiency of the converter. This circuit differs from FIG. 4aas follows: (1) addition of certain small auxiliary circuit (such as Da, Sa, a delay circuit and an isolating differential circuit); (2) adjustable dead region of the cross-conduction; (3) flexibility of optimization of power stage.

[0047] The advantage of this kind of self-driving circuit is more common, and has no restriction to the switch frequency of the converter. The disadvantage is the little complicated structure, and requires isolation. However, the size of the all of components is still small because only pulse is required to drive Sa.

[0048] The present invention uses some additional small power elements, such that the DC/DC converter of only one synchronous rectifying MOSFET (e.g., backward converter) may also use self-driving synchronous rectification technology.

[0049] The two inventive technology of FIG. 4 can be broadly adopted. This can be seen in FIG. 5 to FIG. 10 for other embodiments. The advantages of them are described as follows:

[0050] FIG. 5 is the application of the two circuits of the present invention in a double backward stimulating circuit. The DC/DC converter includes windings Np, Ns and power MOS transistors S₁, S₂. The positive end of the winding Np is connected with the source end of the power MOS transistor S₁, and the negative end of the winding Np is connected with the drain of the power MOS transistor S₂. The delay driving circuit is connected, respectively, to the gate of the power MOS transistors S₁, S_2.

[0051] FIG. 6 to FIG. 8 are the applications of these two circuits of the present invention in backward converters of various clamping circuits. FIG. 6 is such an application in a three-winding clamping backward stimulating circuit. This three-winding (Nc, Np, Ns) clamping backward converter includes windings Np, Ns, Nc, a power MOS transistor S and a diode Dc. The negative end of the winding Np is connected with the drain of the power MOS transistor S, and the positive end of the winding Nc is connected with the cathode of the diode Dc. The delay driving circuit is connected with the gate of the power MOS transistors.

[0052] FIG. 7 is such an application in a R.C.D. clamping backward stimulating circuit. The R.C.D. clamping backward converter includes windings Np, Ns, a power MOS transistor S, a resister Rc, a diode Dc and a capacitor Cc. The negative end of the winding Np is connected with the drain end of the power MOS transistor S. The delay driving circuit is connected with the gate end of the power MOS transistor S, and the negative end of the winding Np is connected with the anode of the diode Dc. An end of parallel-connected capacitor Cc and resister Rc is connected with the cathode of the diode Dc, and the other end is connected with the positive end of the winding Np.

[0053] FIG. 8 is such an application in an active clamping backward stimulating circuit. The active clamping backward converter includes windings Np, Ns, power MOS transistors S, Sc and a capacitor Cc. The positive end of the winding Np is connected through the capacitor Cc with the drain end of the power MOS transistor Sc. The source end of the power MOS transistor Sc is connected with the drain end of the power MOS transistor S and the negative end of the winding Np. The delay driving circuit is connected with the gate of the power MOS transistor S.

[0054] FIG. 9-FIG. 10 are the applications of these two self-driving circuits of the present invention in double backward stimulating circuit various claiming circuits. FIG. 9 is such an application in a diode clamping double backward circuit. The diode clamping double backward converter includes windings Np, Ns, power MOS transistors S₁, S₂and diodes D₁, D₂. The positive end of the winding Np is connected with the source end of the power MOS transistor S₁, and the negative end of the winding Np is connected with the drain end of the power MOS transistor S₂. The anode of the diode D₁is connected with the negative end of the winding Np, and the cathode is connected with the drain end of the power MOS transistor S₁. The anode of the diode (D₂) is connected with the source end of the power MOS transistor (S₂), and the cathode is connected with the positive end of the winding (Np). The delay driving circuit is connected, respectively, with the gates of the power MOS transistors S₁, S₂.

[0055] FIG. 10 is such an application in an active clamping double backward stimulating circuit. The active clamping double backward converter includes windings Np, Ns, power MOS transistors S₁, S₂, a capacitor Cc and a power MOS transistor Sc. The positive end of the winding Np is connected with the source end of the power MOS transistor S₁, and the negative end of the winding Np is connected with the drain end of the power MOS transistor S₂. The capacitor Cc and the power MOS transistor Sc are connected in serial, and then connected parallel with the winding Np, with its two ends connected with positive and negative ends of the winding Np, respectively. The delay driving circuit is connected with the gates of the power MOS transistors S₁, S₂, respectively.

[0056] The two self-driving circuit of the present invention have been proved through experiments. The first embodiment has been used in a DC/DC power supply (using a three-winding clamping backward circuit) of 40-60V direct current input, and 1.2-1.65V@35A direct current output. The efficiency of the power stage reaches 84%. The second embodiment has been used in a DC/DC power supply (using a three-winding clamping backward circuit) of 36-72V direct current input and 5V@30A direct current output. The efficiency of the power stage reaches 90%.

[0057] The present invention has been explained through the embodiments. However, the present invention is not limited thereto. Any improvement and substitution should be viewed within the scope of the protection of the present invention provided that they are not apart from the spirits and contents of the present invention.