Encoder and a method of encoding for partial response channels

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 60/078,552, entitled “RATE 16/17 (G/I)=(10/10) CODE FOR PARTIAL RESPONSE CHANNELS,” filed on Mar. 19, 1998.

[0003] The present invention relates to digital communications systems and, more particularly to an encoding and decoding system in a disc drive or other data storage system.

[0004] In the field of digital communication systems, digital information is conveyed from a transmitter to a receiver through a channel. “Channel” is a generalized term that can include many different mediums such as recording media, telephonic lines and electromagnetic spectrum. In data storage systems, such as magnetic disc drives, the channel includes a storage medium, and the digital information is transmitted to the storage medium and stored for some period of time before being recovered and delivered to the receiver.

[0005] A typical magnetic disc drive includes one or more rigid discs mounted for rotation on a hub or spindle. Each disc has an associated data head formed of a hydrodynamic bearing and a transducer, for communicating with the surface of the disc. An electromechanical actuator moves the data head radially over the disc surface for track seek operations and holds the transducer directly over a desired track on the disc surface for track following operations. A drive controller controls the disc drive based on commands received from a host system to retrieve information from the discs and to store information on the discs. The drive controller is comprised of various subsystems, typically including a “host interface” for communicating with the host system, a “servo subsystem” for controlling the actuators and a “read channel” for recovering recorded data from the storage medium.

[0006] Information is typically stored in concentric data tracks on the disc surface. The direction of current through the transducer is controlled to encode magnetic flux reversals on the surface of the disc within the selected data track. In one type of coding, known as non-return-to-zero-inverse (NRZI) coding, a digital “1” is represented by a magnetic flux reversal from one bit position to the next in the data track, and a digital “0” is represented by a lack of a magnetic flux reversal from one bit position to the next.

[0007] In retrieving data from the disc, the servo subsystem controls the electromechanical actuator so that the data head flies above the desired data track, senses the flux reversals stored in the data track, and generates a read signal based on those flux reversals. The read signal is typically conditioned and then decoded by the read channel to recover the data represented by the flux reversals.

[0008] All channels, including disc drive storage channels, introduce noise into the signals they convey. To detect and sometimes to correct signal errors caused by this channel noise, a large number of coding techniques have been developed. These coding techniques convert data words formed of a number of data bits into code words formed of a number of code bits Coding constraints imposed in the code words permit the detection and sometimes the correction of errors in the signals received from the channel.

[0009] The average ratio of the number of data bits to the number of code bits is known as the code rate of the code. In general, the ability to detect and correct errors in a received signal may be increased as the code rate decreases because a lower code rate means a greater amount of redundant information in the code word. However, each additional bit added by the encoder increases the time and energy needed to transmit the signal through the channel.

[0010] Depending on the detection scheme, the code imposes certain constraints on the code word pattern. For example, in a disc drive, the rotational speed of the spindle motor that rotates the magnetic media varies over time. This results in non-uniform time intervals between read signal voltage pulses. A phase locked loop (PLL) is used to lock the phase and frequency of the read timing clock to the phase and frequency of the read signal voltage pulses. To ensure that the PLL is updated regularly, a code can be used that limits the number of consecutive zeroes in the coded sequence to be no greater than a maximum number “g”. This constraint on the maximum length of consecutive zeroes in a coded sequence is generally known as a run-length constraint. Smaller values of “g” ensure a greater minimum update rate for timing in the PLL. However, smaller values of “g” produce more constrained codes with a lower achievable code rate.

[0011] In a magnetic recording channel that employs Partial Response, Maximum Likelihood (PRML) signaling and uses a Viterbi detector to recover the data, another constraint “i” can also be incorporated in the code to limit delay in the Viterbi algorithm. The “i” constraint in a stream of code words represents the number of consecutive zeroes in each of two bit-wise interleaved sub-sequences of binary digits within the stream. One of the subsequence is formed by taking the odd indexed binary digits of the stream, and the other of the sub-sequences is formed by taking the even indexed binary digits of the stream.

[0012] Suppose that the sequence of binary inputs to the channel is labeled {c₀, C₁, C₂, . . . }. The compact notation $\begin{array}{cc}c\left(D\right)=\sum _{i=0}^{\infty }{c}_i{D}^i& \mathrm{Eq}.1\end{array}$

[0013] is referred to as the “D-transform” of the input sequence which uses the unit delay operator “D”, as it is known in the literature, to express that the coefficient c_kof D^kis the kth input to the channel. Partial response channels for magnetic recording condition the received output of the storage medium so that the sampled response of the system to an isolated input bit is given by a characteristic partial response polynomial, or “channel transfer function”, P(D). Partial response channels for magnetic recording often have a partial response polynomial of the form

[0014] P(D)=(1−D)(1+D)ⁿ,  Eq.2

[0015] where n is a positive integer. The D-transform of the noiseless output of the channel, v(D), is given by

[0016] v(D)=c(D)P(D)  Eq. 3

[0017] where the product is taken by normal polynomial multiplication.

[0018] Because of the (1−D)(1+D) factor of P(D), the channel has an all-zero response to long runs of consecutive same binary input symbols in the even and odd indexed binary sub-sequences and to long runs of consecutive alternating input symbols in the combined, global sequence. These sequences should be avoided because they contain little phase and amplitude information for closed loop control of the read channel.

[0019] One method of generating the desired channel input sequences is to use an encoder and a precoder at the input of the data channel. The encoder converts user data words that are to be stored in the channel into code words having selected constraints so that the code words avoid undesirable bit sequences. The precoder further conditions the code words and can have a transfer function of the form, $\begin{array}{cc}H\left(D\right)=\frac{1}{1\oplus D^2}& \mathrm{Eq}.4\end{array}$

[0020] where “⊕” denotes an exclusive-OR operation. The encoder produces a binary coded sequence b(D) which is input to the precoder. The output of the precoder is the channel input c(D), given by

[0021] c(D)=b(D)H(D)  Eq. 5

[0022] The conditioned code words are then provided to the channel. When the noisy output of the partial response channel is received, a detector and decoder are used to estimate the original user data. An encoder and a decoder are desired which have a relatively high code rate, satisfy the selected code constraints and require only a small number of elements to implement.

[0023] The present invention addresses these and other problems, and offers other advantages over the prior art.

[0024] One aspect of the present invention provides a method of encoding successive data words into successive code words for transmission through a channel. The method includes mapping a first portion of each successive data word unchanged into a first portion of a corresponding one of the successive code words. A second portion of each successive data word is mapped into a second portion of a corresponding one of the code words according to a selected code. The successive code words are concatenated to form an encoded bit stream having a plurality of bit positions. A run length constraint is imposed on the selected code such that encoded stream has a maximum possible run of ten consecutive binary zeroes in adjacent positions of the plurality of bit positions, and an interleave constraint is imposed on the selected code such that the encoded stream has a maximum possible run of ten consecutive binary zeroes in every other one of the plurality of bit positions.

[0025] Another aspect of the present invention provides a method of encoding successive 16-bit data words for transmission through a channel. The method includes mapping a first portion of each successive 16-bit data word unchanged into a first portion of a corresponding 17-bit code word and mapping a second portion of each successive 16-bit data word into a second portion of the corresponding 17-bit code word according to a selected code. The corresponding 17-bit code words for the successive 16-bit data words are concatenated to form an encoded bit stream having a plurality of bit positions. A run length constraint is imposed on the selected code such that the encoded stream has a maximum possible run of ten consecutive binary zeroes in adjacent positions of the plurality of bit positions, and an interleave constraint is imposed on the selected code such that encoded stream has a maximum possible run of ten consecutive binary zeroes in every other one of the plurality of bit positions.

[0026] Another aspect of the present invention provides an encoder for encoding successive data words into respective, successive code words which are concatenated to form an encoded bit stream. The encoder includes an m-bit data word input, an n-bit code word output and an encoding circuit coupled between the m-bit data word input and the n-bit code word output. The m-bit data word input receives the successive data words. The encoding circuit passes a first portion of each successive data word unchanged to the n-bit code word output as a first portion of a respective one of the successive code words. The encoding circuit passes a second portion of each successive data word to the n-bit code word output as a second portion of the respective successive code word in an encoded form. The encoded form limits the number of consecutive zeroes appearing in the encoded bit stream to a maximum of ten in a sequence of adjacent bit positions within the encoded bit stream and in subsequences of even and odd indexed bit positions in the encoded bit stream sequence.

[0027] Yet another aspect of the present invention provides a disc drive storage channel. The storage channel includes a transducer capable of communicating with a data storage disc and an encoder which is coupled to the transducer. The encoder encodes successive data words into successive code words according to a selected code to form an encoded bit stream, which is then precoded and applied the transducer. The encoder imposes a first consecutive same symbol run constraint on a first length of adjacent bit positions in the encoded bit stream and a second consecutive same symbol run constraint on a second length of even indexed bit positions and odd indexed bit positions in the encoded bit stream.

[0028] FIG. 1 is a perspective view of a disc drive in which the encoder of the present invention can be used.

[0029] FIG. 2 is a block diagram of an example of a generalized communication system in which the encoder of the present invention can be used.

[0030] FIG. 3 is a block diagram of the encoder shown in FIG. 2, according to one embodiment of the present invention.

[0031] FIG. 4 is a diagram showing an example of the longest possible global stream of consecutive zeroes in adjacent bit positions at a code word output of the encoder shown in FIG. 3.

[0032] FIG. 5 is a diagram showing an example of the longest possible global stream of consecutive zeroes in even indexed bit positions at the code word output.

[0033] FIG. 6 is a diagram showing an example of the longest possible global stream of consecutive zeroes in odd indexed bit positions at the code word output.

[0034] FIG. 1 is a perspective view of a disc drive 100 in which the present invention is useful. Disc drive 100 includes a housing with a base 102 and a top cover (not shown). Disc drive 100 further includes a disc pack 106, which is mounted on a spindle motor (not shown) by a disc clamp 108. Disc pack 106 includes a plurality of individual discs which are mounted for co-rotation about central axis 109. Each disc surface has an associated head 110 which is mounted to disc drive 100 for communication with the disc surface. In the example shown in FIG. 1, heads 110 are supported by suspensions 112 which are in turn attached to track accessing arms 114 of an actuator 116. The actuator shown in FIG. 1 is of the type known as a rotary moving coil actuator and includes a voice coil motor (VCM), shown generally at 118. Voice coil motor 118 rotates actuator 116 with its attached heads 110 about a pivot shaft 120 to position heads 110 over a desired data track along a path 122 between a disc inner diameter 124 and a disc outer diameter 126. Voice coil motor operates under control of internal circuitry 128.

[0035] Write circuitry within internal circuitry 128 encodes the data to be stored into successive code words and sends the code words in the form of a serial analog write signal to the write transducer on head 110 which encodes magnetic flux reversals within a magnetic layer on the disc surface. During read operations, the read transducer in head 110 senses the magnetic flux reversals and generates a serial analog read signal. The analog read signal is converted into a serial digital signal, which is provided to detector and decoder circuitry within internal circuitry 128 to produce a recovered data signal.

[0036] FIG. 2 is a block diagram of a generalized communication system 148 according to one embodiment of the present invention, which can be formed within disc drive 100, for example. Communication system 148 includes an encoder 150, which receives successive data words 152 and encodes the successive data words into successive code words 153. Each data word can include any number of symbols. In a binary system, for example, each symbol represents one logical data bit. In disc drive applications, common data word lengths are eight or sixteen bits. As described in more detail below, successive data words are encoded into successive code words using a Run length Limited code with “g” and “i” constraints. Encoder 150 includes combinational logic to ensure that code words are produced which avoid undesirable sequences of binary symbols. In alternative embodiments, encoder 150 can be implemented in software with a look-up table for making the conversion between each user data words and its corresponding code word. Other hardware and software implementations can also be used.

[0037] Parallel-to-serial converter 155 receives the successive code words 153, converts each code word into a serial representation and concatenates the serial representations to produce a serial stream of the code word bits 154. Precoder 156 receives the serial code word stream 154 and conditions the sequence so that it is optimized for the type of detector used to recover the signal from the channel. In the preferred embodiment, precoder 156 conditions the sequence according to the polynomial given in Equation 4 above. Precoder 156 produces an encoded write signal 158, which is provided to channel 160.

[0038] In disc drive 100, channel 160 includes a write current amplifier, the write transducer in head 110, disc pack 106, and the read transducer in head 110. The encoded write signal is stored on the disc surface by the write transducer. During a read operation, the read transducer reads the stored, encoded information from the disc surface and conveys the encoded information to receiver/detector 162 as a read signal 164. Receiver/detector 162 amplifies and filters read signal 164, and then recovers the encoded information from the read signal using one of several known detection methods. For instance, receiver/detector 162 may use a Viterbi detector, Decision Feedback Equalization (DFE), Fixed-Delay Tree Search with Decision Feedback (FDTS/DF) or Reduced State Sequence detection (RSSE). After detecting and amplifying the signal from channel 160, receiver/detector 162 produces a recovered sequence of code word bits 165, which are provided to serial-to-parallel converter 163. The sequence of code word bits 165 is in a serial format at the input to serial-to-parallel converter 163.

[0039] Serial-to-parallel converter 163 groups the bits into code words and converts the code words from a serial format to a parallel format. Successively recovered code words 166 have lengths corresponding to the lengths of the code words generated by encoder 150. Serial-to-parallel converter 163 then outputs the successively recovered code words 166 in parallel format to decoder 168. Decoder 168 uses the inverse of the coding rules used by encoder 150 and converts successive code words 166 into respective data words 170.

[0040] Encoder 150 imposes several constraints on the bit patterns in code word stream 153. Since the rotational velocity of the disc can vary over time, a phase locked loop (PLL) is used to lock the phase and frequency of the read timing clock to the phase and frequency of read signal 164. To ensure that the PLL is updated regularly, encoder 150 uses a code that limits the number of consecutive zeros in code word stream 153 to no greater than a maximum number “g”. This kind of code is known as a Run Length Limited (RLL) code with a global “g” constraint. Encoder 150 also limits the maximum run length of zeros in each of two interleaved sub-sequences within code word stream 153, which are formed by the odd indexed binary digits and the even indexed binary digits, respectively, in code word stream 153. This kind of code constraint is known as an interleaved “i” constraint. In a preferred embodiment, encoder 150 uses a 16/17 rate code with a “g” constraint of ten and an “i” constraint of ten, and these constraints are enforced at all boundaries between adjacent code words.

[0041] In an RLL code of rate m/n, m-bit long data words are mapped into n-bit long code words that satisfy the selected RLL constraints, where m and n are positive integer variables. In independent block coding 2^mn-bit code word patterns are required to map all the m-bit long data patterns. For example, a 16/17 rate code maps successive 16-bit data words (or two 8-bit data bytes) into successive 17-bit code words. When m and n are large, the encoder can become very complicated.

[0042] To overcome these problems, encoder 150 divides each 16-bit user data word 152, which can be referred to as D[15:0], into two 8-bit user data bytes U[7:0] and V[7:0]. The i^thpair of user data bytes U[7:0] and V[7:0] that is provided to encoder 150 is denoted,

[0043] {U⁽ⁱ⁾[7:0], V⁽ⁱ⁾[7:0]}={u₇⁽ⁱ⁾, u₆⁽ⁱ⁾, u₅⁽ⁱ⁾, . . . u₀⁽ⁱ⁾, v₇⁽ⁱ⁾, v₆⁽ⁱ⁾, v₅⁽ⁱ⁾, . . . v₀⁽ⁱ⁾}  Eq. 5

[0044] The i^thcode word produced by encoder 150 is denoted,

[0045] B⁽ⁱ⁾[16:0]={b₁₆⁽ⁱ⁾, b₁₅⁽ⁱ⁾, b₁₄⁽ⁱ⁾, . . . b₀⁽ⁱ⁾}  Eq. 6

[0046] FIG. 3 is a block diagram of encoder 150 according to one embodiment of the present invention. Encoder 150 includes user data word input 180, code word output 182 and combinational encoding logic 184. The successive data words 152, which are each labeled D[15:0], are applied to user data word input 180. Encoder 150 applies the first 8-bit byte U[7:0] of each user data word unchanged to the first eight bits B[16:9] of each code word on code word output 182. The individual bit mapping of these bits is shown in Equation 7,

[0047] b₁₆=u₇, b₁₅=u₆, b₁₄=u₅, b₁₃=u₄, b₁₂=u₃, b₁₁=u₂, b₁₀=u₁, and b₉=u₀  Eq. 7

[0048] The second 8-bit byte V[7:0] of each user data word is applied to the input of encoding logic 184. Logic 184 maps each 8-bit user data byte V[7:0] into a corresponding 9-bit code word pattern B[8:0] while avoiding undesirable bit patterns. This 9-bit code word pattern B[8:0] is applied to the remaining 9 bits of the corresponding code word on code word output 182 to form the overall 17-bit code word pattern B[16:0].

[0049] The 9-bit code word patterns produced by logic 184 are selected to satisfy the code constraints for the overall code word stream 153. The constraints are satisfied by selecting only those code words that have the following properties:

[0050] i) {b₈, b₇} is non-zero (i.e. not a logic “00”);

[0051] ii) {b₁, b₀} is non-zero (i.e. not a logic “00”);

[0052] iii) {b₈, b₆, b₄, b₂} is non-zero (i.e. not a logic “0000”);

[0053] iv) {b₇, b₅, b₃, b₁} is non-zero (i.e. not a logic “0000”); and

[0054] v) {b₆, b₄, b₂, b₀} is non-zero (i.e. not a logic “0000”).

[0055] Table 1 shows 260 of a possible 512 9-bit sequences that have the above-properties.

[0056] Of these 260 9-bit code word patterns, 256 patterns are selected to map to corresponding 8-bit user data bytes. With the above-properties, the overall stream of 17-bit code words satisfies the g=10 and i=10 code constraints. FIG. 4 is a diagram showing an example of the longest possible global stream of consecutive zeroes at code word output 182. Row 190 shows bits b₁⁽ⁱ⁾and b₀⁽ⁱ⁾of a code word 192 concatenated with bits b₁₆⁽ⁱ⁺¹⁾, b₁₅⁽ⁱ⁺¹⁾, b₁₄⁽ⁱ⁺¹⁾, . . . b₈⁽ⁱ⁺¹⁾and b₇⁽ⁱ⁺¹⁾of a code word 194. Row 196 shows the bit value of each of the bits b₁⁽ⁱ⁾, b₀⁽ⁱ⁾, b₁₆⁽ⁱ⁺¹⁾, b₁₅⁽ⁱ⁺¹⁾, b₁₄⁽ⁱ⁺¹⁾, . . . b₈⁽ⁱ⁺¹⁾and b₇⁽ⁱ⁺¹⁾. The longest possible global stream of consecutive zeroes at code word output 182 is ten since b₁⁽ⁱ⁾and b₀⁽ⁱ⁾are required to be non-zero and since b₈⁽ⁱ⁺¹⁾and b₇⁽ⁱ⁺¹⁾are required to be non-zero according to constraints i) and ii) above.

[0057] FIG. 5 is a diagram showing an example of the longest substream of consecutive zeroes in the even index bit positions at code word output 182. Row 200 shows bits b₇⁽ⁱ⁾, b₅⁽ⁱ⁾, b₃⁽ⁱ⁾and b₁⁽ⁱ⁾of a code word 202 concatenated with bits b₁₆⁽ⁱ⁺¹⁾, b^14(i+1), b₁₂⁽ⁱ⁺¹⁾, b₁₀⁽ⁱ⁺¹⁾, b₈⁽ⁱ⁺¹⁾, b₆⁽ⁱ⁺¹⁾, b₆⁽ⁱ⁺¹⁾, b₄⁽ⁱ⁺¹⁾and b₂⁽ⁱ⁺¹⁾of a code word 204. Row 206 shows the bit value of each of the bits. The longest possible interleaved stream of consecutive zeroes in the even index bit positions is ten since b₇⁽ⁱ⁾, b₅⁽ⁱ⁾, b₃⁽ⁱ⁾and b₁⁽ⁱ⁾are required to be non-zero according to constraint iv) above and since b₈⁽ⁱ⁺¹⁾, b₆⁽ⁱ⁺¹⁾, b₄⁽ⁱ⁺¹⁾and b₂⁽ⁱ⁺¹⁾are required to be non-zero according to constraint iii) above.

[0058] FIG. 6 is a diagram showing an example of the longest substream of consecutive zeroes in the odd index bit positions at code word output 182. Row 210 shows bits b₆⁽ⁱ⁾, b₄⁽ⁱ⁾, b₂⁽ⁱ⁾and b₀⁽ⁱ⁾of a code word 212 concatenated with bits b₁₅⁽ⁱ⁺¹⁾, b₁₃⁽ⁱ⁺¹⁾, b₁₁⁽ⁱ⁺¹⁾, b₉⁽ⁱ⁺¹⁾, b₇⁽ⁱ⁺¹⁾, b₅⁽ⁱ⁺¹⁾, b₃⁽ⁱ⁺¹⁾and b₁⁽ⁱ⁺¹⁾of a code word 214. Row 216 shows the bit value of each of the bits. The longest possible interleaved stream of consecutive zeroes in the odd index bit positions is ten since b₆⁽ⁱ⁾, b₄⁽ⁱ⁾, b₂⁽ⁱ⁾and b₀⁽ⁱ⁾are required to be non-zero according to constraint v) above and since b₇⁽ⁱ⁺¹⁾, b₅⁽ⁱ⁺¹⁾, b₃⁽ⁱ⁺¹⁾and b₁⁽ⁱ⁺¹⁾are required to be non-zero according to constraint iv) above.

[0059] Table 2 is a listing of encode and decode programs in the C programming language, for example, for encoder 150 and decoder 168, which can be used to implement one embodiment of the present invention. Decoder 168 is similar to encoder 150 shown in FIG. 3, but operates in reverse of encoder 150. Decoder 168 applies the first eight bits B[16:9] of each code word unchanged to the first eight bits U[7:0] of each user data word and maps the second nine bits B[8:0] of each code word into the second eight bits V[7:0] of each user data word according to the inverse of the code mapping used by encoder 150.

[0060] The variables in Table 2 are decimal numbers representing 8-bit user data bytes and 9-bit code words. The first array in Table 2, labeled “long enc89er[256]” maps each data byte from 0 to 256 into one of 256 9-bit code words. For example, a user data byte of “0” maps into the code word “133” as shown in the first location in the encoder array. A user data byte of “1” maps into the code word “134” as shown in the second location in the encoder array. This mapping continues up to a user data byte of “255” which maps into the code word “510” as shown in the last, or 256th, location in the encoder array.

[0061] The second array in Table 2, labeled “long dec89er[512]” maps each 9-bit code word, from 0 to 512, into a corresponding one of the 256 user data bytes or a “−1” which corresponds to an invalid code word input. Since not all of the 512 possible 9-bit code word patterns are used by encoder 150, the unused code word patterns are invalid and are not mapped into a valid user data byte. For example, a code word of “0” (an unused code word) maps into a “−1” as shown in the first location in the decoder array. A code word of “133” maps into user data byte “0” as shown in the 134th location in the decoder array. This mapping continues up to code word “511” (an invalid code word) which maps into a “−1” as shown in the last, or 512th, location in the decoder array. The order in which the C program maps individual user data bytes into corresponding code words can be varied in alternative embodiments, as long as each user data byte is mapped to one element of the set of 260 code words listed in Table 1 that meets the selected coding constraints, in a one-to-one (injective) mapping.

[0062] Well known semiconductor design tools can be used to generate hardware level descriptions of encoder 150 and decoder 168 from the C program. For example, the C program can be translated into a Hardware Description Language (HDL) definition, such as a Verilog definition, for encoder 150 and decoder 168. A synthesis tool can then be used to translate the HDL definition into a netlist of individual semiconductor gates and interconnections between the gates, which can be fabricated.

[0063] In summary, one aspect of the present invention provides a method of encoding successive data words 152 for transmission through a channel 160. A first portion U[7:0] of each successive data word 152 is mapped unchanged into a first portion B[16:9] of a corresponding one of the successive code words 153. A second portion V[7:0] of each successive data word 152 is mapped into a second portion B[8:0] of a corresponding one of the code words 153 according to a selected code. The successive code words 153 are concatenated to form an encoded bit stream 196, 206, 216 having a plurality of bit positions. A run length constraint is imposed on the selected code such that the encoded bit stream 196, 206, 216 has a maximum possible run of ten consecutive binary zeroes in adjacent ones of the plurality of bit positions. An interleave constraint is imposed on the selected code such that the encoded bit stream 196, 206, 216 has a maximum possible run of ten consecutive binary zeroes in every other one of the plurality of bit positions.

[0064] In one embodiment, the successive data words 152 each include m bits, where m is an integer. The successive code words 153 each include n bits, where n is an integer and n=m+1. A first, p-bit portion, U, of each successive m-bit data word 152 is mapped unchanged into a first, p-bit portion, B, of a corresponding one of the successive n-bit code words 153, where p is an integer. A second, q-bit portion, V, of each successive m-bit data word 152 into a second, q+1 bit portion B′ of a corresponding one of the n-bit code words 153 according to the selected code. For example, m=16, n=17, p=8, and q=8.

[0065] Another aspect of the present invention provides a method of encoding successive 16-bit data words 152 for transmission through a channel 160. The method includes mapping a first portion U[7:0] of each successive 16-bit data word 152 unchanged into a first portion B[16:9] of a corresponding 17-bit code word 153, and mapping a second portion V[7:0] of each successive 16-bit data word 152 into a second portion of the corresponding 17-bit code word 153 according to a selected code. The corresponding 17-bit code words 153 for the successive 16-bit data words 152 are concatenated to form a encoded bit stream having a plurality of bit positions. A run length constraint is imposed on the selected code such that the encoded bit stream has a maximum possible run of ten consecutive binary zeroes in adjacent ones of the plurality of bit positions. An interleave constraint is imposed on the selected code such that the encoded bit stream has a maximum possible run of ten consecutive binary zeroes in every other one of the plurality of bit positions.

[0066] Another aspect of the present invention provides an encoder 150 for encoding successive data words 152 into respective, successive code words 153 which are concatenated to form an encoded bit stream. The encoder 150 includes an m-bit data word input 180, an n-bit code word output 182 and an encoding circuit 184 coupled between the m-bit data word input 180 and the n-bit code word output 182. The m-bit data word input 180 receives the successive data words 152. The encoding circuit passes a first portion U[7:0] of each successive data word 152 unchanged to the n-bit code word output 182 as a first portion B[16:9] of a respective one of precoder input sequence 153. The encoding circuit 184 passes a second portion V[7:0] of each successive data word 152 to the n-bit code word output 182 as a second portion B[8:0] of the respective precoder input sequence 153 in an encoded form. The encoded form limits the number of consecutive zeroes appearing in the encoded bit stream to a maximum of ten in a sequence of adjacent bit positions within the encoded bit stream and in subsequences of even and odd indexed bit positions in the encoded bit stream.

[0067] Yet another aspect of the present invention provides a disc drive storage channel 160. The storage channel includes a transducer 110 capable of communicating with a data storage disc 106 and an encoder 150 coupled to the transducer 110. The encoder 150 encodes successive data words 152 into successive code words 153 according to a selected code to form an encoded bit stream, which is then precoded and applied the transducer 110. The encoder 150 imposes a first consecutive same symbol run constraint on a first length of adjacent bit positions in the encoded bit stream and a second consecutive same symbol run constraint on a second length of even indexed bit positions and odd indexed bit positions in the encoded bit stream.

[0068] It is to be understood that even though numerous characteristics and advantages of various embodiments of the present invention have been set forth in the foregoing description, together with details of the structure and function of various embodiments of the invention, this disclosure is illustrative only, and changes may be made in detail, especially in matters of structure and arrangement of parts within the principles of the present invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. For example, the particular elements may vary depending on the particular application for the coding method and apparatus while maintaining substantially the same functionality without departing from the scope and spirit of the present invention. In addition, although the preferred embodiment described herein is directed to a coding system for a disc drive, it will be appreciated by those skilled in the art that the teachings of the present invention can be applied to other systems, like satellite communications or cellular phone systems, without departing from the scope and spirit of the present invention.