High Speed, Low Forward Voltage Drop, SCR

Silicon controlled rectifiers (SCRs) have many applications in electronics design, because of their ability to control large amounts of current with a control signal. It is desirable in some applications for the SCR circuit to have a relatively small voltage drop when in the conducting state. Such a low forward-voltage drop SCR is disclosed in U.S. Pat. No. 4,613,767 to Holland. Still higher performance is needed in certain applications. Such higher performance may incorporate a faster response time and the ability to adjust the temperature coefficient of the holding current; the current required to maintain the SCR in the conducting state.

The present invention relates to a high speed, low forward-voltage drop, SCR device which has the above desired features.

The invention relates to silicon controlled rectifier device including an SCR portion controlled by an input voltage signal to a voltage comparator. The device also includes a latching circuit to permit the SCR portion to remain in the conducting state once switched, even in the absence of the input voltage signal, if the current through the SCR portion is greater than a predetermined threshold current. The SCR portion will remain conducting until the current through the SCR portion decreases below a threshold value. Such a device is especially useful when a narrow input voltage signal is used to switch the SCR into its conducting state.

In the prior art, the threshold level was difficult to adjust and PNP transistors, which were typically in the SCR circuit, caused the SCR to respond slowly. The present design provides the electronic circuit designer with an SCR device which is more accurate, faster and easily interfaced to high speed logic. The present design both overcomes the adjustment difficulties and responds approximately ten times faster than the prior art circuits.

The invention will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings in which:

FIG. 1 is a simplified diagram of a high speed, low forward voltage SCR; and

FIG. 2 is a detailed circuit diagram of a high speed, low forward voltage SCR.

In brief overview, an SCR device 4, shown in FIG. 1, includes a voltage comparator 8 controlling an SCR 6, which in its most basic form resembles a voltage controlled latching switch. An SCR control signal voltage is applied to one input terminal 10 of the comparator 8. When this control voltage is greater than a reference voltage signal applied to a second input terminal 12 of the comparator 8, the comparator 8 generates a high output signal on its output terminal 16, enabling SCR 6. A device in communication to the SCR input terminal 14 will experience a minimal resistance through the SCR device 4, to ground 15 in this configuration, as long as the SCR control signal voltage level exceeds the reference voltage. When the SCR input signal voltage level falls below the reference voltage level, enough current flows from the SCR input terminal 14 through the SCR 6 to ground 15 to keep the SCR 6 forward biased and conducting. When the current flowing through the SCR 6 from the SCR input terminal 14 to ground 15 goes below a threshold current level, the SCR 6 will switch off. Referring now to FIG. 2, an embodiment of a high speed, low forward voltage SCR device 4', includes a shutdown comparator portion 8', an SCR portion 6', a current comparator portion 18 and a voltage level shifting and maximum drive current determining portion 54. The shutdown comparator portion 8' includes a differential pair of transistors 72,74. The base of transistor 72 is connected to the SCR control signal terminal 10', to which is applied an SCR control signal. The base of transistor 74 is connected to a reference voltage 12' which determines the threshold value at which the comparator 8' will switch and generate an output. The emitters of the transistors 72,74 are connected together through a current source 80, while the collectors of the transistors 72,74 are connected through resistors 76,78 respectively to the power supply by way of power supply terminal 34. Resistors 76 and 78 are equal.

When a low SCR control signal applied to the SCR control signal terminal 10' is below the voltage applied to the reference terminal 12', the base voltage of transistor 74 is greater than the base voltage of transistor 72. As a result, there is greater current flow through transistor 74 than transistor 72 and hence there is a greater voltage drop across resistor 78 than resistor 76. This produces a lower base voltage on transistor 84 than on transistor 82 and hence a higher emitter voltage on transistor 82 than on transistor 84. The voltage difference between the two emitter voltages may supplied to ECL differential logic through a pair of leads 86, one lead of the pair connected to an emitter of its respective transistor 82, 84.

The differential voltage produced across the emitters of transistors 82,84 is level shifted and converted to a single ended voltage level measured relative to ground by the level shifting portion 54 which includes transistors 96,98 and 100 and two RC networks 89,91. The current through transistor 82 passes through the RC network 91 including resistor 94 and capacitor 90 (the capacitor providing a low impedance path at high frequencies), with the resulting voltage drop being applied to the base of transistor 96. The collector of transistor 96 is connected to the emitter of transistor 84 through RC network 89 including resistor 92 and capacitor 88. As a result, the current through transistor 96 mirrors the current through transistor 82. A current mirror of transistors 96,98 and 100 controls the current flow through resistors 92 and 94 so that the voltage drop across resistor 92,94 is equal.

The higher voltage drop across resistor 92 results in a low voltage being applied to the base of transistor 102, switching it off. The switching off of transistor 102, in turn, switches off transistors 106 and 108 of the SCR circuit 6'. In the embodiment shown, resistor 104 is the base current limiting resistor for transistors 106 and 108, while resistor 110 provides additional base current limitation to transistor 106 in the event that transistor 106 saturates. The maximum drive current (I.sub.drive) into the bases of transistors 106,108 is limited, in part by resistor 104 and is given by the expression: ##EQU1## where I is the current flowing through current source 80. Resistor 112 is the pull-down resistor for the bases of both transistor 106 and output switching transistor 108. The switching off of output switching transistor 108 results in the switching off of SCR portion 6', which then appears as a high impedance to the SCR input terminal 14'.

Conversely, when the SCR control signal on terminal 10' is high, the current flow through transistor 72 is greater than the current flow through transistor 74 and hence the voltage drop across resistor 76 is greater than the voltage drop across resistor 78. This increased voltage drop across 76 means that transistor 82 has a lower base voltage than transistor 84. As a result, transistor 102 switches on, in turn, switching on transistors 106,108. The switching on of output switching transistor 108 grounds SCR input terminal 14' and the SCR portion 6' appears as a low impedance to the SCR input terminal 14'.

Once transistors 106,108 switch on and the current through output switching transistor 108 exceeds the holding current, the base of transistor 120 in the current comparator portion 18 is brought low by the current through transistor 106, which proportionally mirrors the holding current, switching it off. The holding current (I.sub.holding) which causes transistor 120 to switch and remain switched is given by the expression: ##EQU2## where X is the emitter scaling factor between transistors 106 and 108, V.sub.supply is the supply voltage to the circuit applied at terminal 34, and V.sub.be is the base-emitter potential.

Once the holding current exceeds the set threshold, transistor 120 switches off, switching on holding transistor 124, which causes the base voltage of transistor 82 to be low. This is equivalent to the high SCR control signal on SCR control signal input 10' which caused the comparator 8' to generate a differential signal originally. Therefore, regardless of the voltage on the SCR control voltage terminal 10', the SCR portion remains latched in the enabled state. This means a narrow control pulse can be used to switch the SCR device 4' on, and the SCR device 4' will remain on as long as the holding current through output switching transistor 108 exceeds the threshold value. In the absence of a high input signal on the SCR control signal input 10', the reduction of the holding current below the threshold value causes holding transistor 124 to switch off thereby permitting the SCR 4' to return to the non-conducting state. The SCR device 4' just described permits narrow control signals to switch on the SCR device and has a low voltage drop (<200 milliVolts) in the conducting state. The output switch, once switched, will remain on until the holding current decreases to below the threshold level.

It should also be noted that the current comparator portion 18, including a voltage divider of resistors 126,128 and a current comparator of transistor 120 and diode 130, is designed to provide the holding current threshold and has the capability of having a zero temperature coefficient. Since in integrated circuit diffused resistors have a positive temperature coefficient and the Vbe has a negative temperature coefficient, the holding current first order temperature coefficient can easily be adjusted to a zero or a non-zero value as determined by the expression defining the change in holding current with temperature (dI.sub.holding /dT): ##EQU3## where dR/dT is the resistor temperature coefficient, and dV.sub.be /dT is the Vbe temperature coefficient. To achieve a zero temperature coefficient the following relationship must also hold: ##EQU4##

Thus the SCR device 4' disclosed herein not only is capable of being switched by a short duration pulses but it is also temperature compensated and has a low forward voltage drop.

It should be noted that in the typical non-complementary bipolar process used to fabricate the device, NPN transistors are fifty to one hundred times faster than PNP transistors. Hence, the all NPN implementation used in the present invention equates to a 30 nsec. response time compared to the 400 nsec. response time typically achieved by the prior art.

Other variations are possible within the scope of the claims and it is the intent to limit this application only by the scope of the claims.