MOSFET for Producing a Constant Voltage

The invention relates to a circuit for producing a constant voltage, and more particularly to a circuit in which a wide range of a voltage is produced with a stabilized characteristic.

A circuit for producing a constant voltage is generally used to supply a predetermined voltage, which is different from an externally input voltage, to a semiconductor device. One type of a conventional circuit for producing a constant voltage comprises first and second P type MOS field effect transistors (each defined "P-MOSFET" hereinafter) connected in series. In the circuit, gate and drain of the first P-MOSFET are connected to source and substrate potential of the second P-MOSFET, source and substrate potential of the first P-MOSFET are connected to a first voltage input terminal, and gate and drain of the second P-MOSFET are connected to a second voltage input terminal, wherein a connecting point between the gate and the drain of the first P-MOSFET and the source and the substrate potential of the second P-MOSFET is connected to a constant voltage output terminal.

In operation, first and second voltages V.sub.1 and V.sub.2 (V.sub.1 >V.sub.2) are applied to the first and second voltage input terminals, respectively. A current of the first P-MOSFET is decreased to increase an output voltage at the constant voltage output terminal, and is "zero" when the output voltage ranges a value of V.sub.1 -.vertline.V.sub.T1 .vertline. to the voltage V.sub.1, where V.sub.T1 is a threshold voltage of the first P-MOSFET. On the other hand, a current of the second P-MOSFET is "zero" when the the output voltage ranges the voltage V.sub.2 to a value of V.sub.2 +.vertline.V.sub.T2 .vertline., where V.sub.T2 is a threshold voltage of the second P-MOSFET, and is increased to increase the output voltage. When the currents of the first and second P-MOSFETs are equal to each other, a predetermined output voltage is obtained at the constant voltage output terminal in a stabilized state.

A stabilized output voltage V.sub.s is defined in the equation (1). ##EQU1## where

g.sub.m1 is a mutual transfer conductance of the first P-MOSFET, and

g.sub.m2 is a mutual transfer conductance of the second P-MOSFET.

According to the conventional circuit for producing a constant voltage, however, there is a disadvantage that a range of an output voltage is narrow, as understood from reasons to be described later.

Further, there is a disadvantage that the output voltage V.sub.s fluctuates in accordance with the threshold voltages V.sub.T1 and V.sub.T2 changed dependent on the conditions of the fabricating process of MOSFETs, as understood from the equation (1).

Accordingly, an object of the invention is to provide a circuit for producing a constant voltage from which a wide range of a constant output voltage is supplied.

A further object of the invention is to provide a circuit for producing a constant voltage in which a constant voltage is produced without being affected by a threshold voltage of MOSFETs.

According to the invention, a circuit for producing a constant voltage comprises first and second MOSFETs connected in series and each having one conduction type, and bias means connected between gate and drain of each MOSFET. The bias means produces potential differences equal to threshold voltages of the first and second MOSFETs, so that a wide range of an output voltage is produced at a connecting point between the first and second MOSFETs, and a stabilized output voltage does not change in level, even if the threshold voltages change in a semiconductor device fabricating process.

The invention will be explained in more detail in conjuction with appended drawings; wherein,

FIG. 1 is a circuitry diagram of a conventional circuit for producing a constant voltage including two P-MOSFETs connected in series,

FIG. 2 to 4 are graphical diagrams showing currents of the two P-MOSFETs relative to an output voltage of the conventional circuit, respectively,

FIG. 5 is a circuitry diagram of a circuit for producing a constant voltage in a first embodiment according to the invention,

FIG. 6 is a graphical diagram showing currents of two P-MOSFETs connected in series in the circuit of the first embodiment relative to an output voltage of the circuit, and

FIG. 7 is a circuitry diagram of a circuit for producing a constant voltage in a second embodiment according to the invention.

Before explaining a circuit for producing a constant voltage in the first and second embodiments according to the invention, the aforementioned conventional circuit for producing a constant voltage will be explained in conjunction with FIGS. 1 to 4.

FIG. 1 shows a structure of the conventional circuit in which the first and second P-MOSFETs M.sub.1 and M.sub.2 are connected in series. In the circuit, the source and the gate of the first P-MOSFET M.sub.1 are respectively connected to the source and the substrate potential of the second P-MOSFET M.sub.2, the source and the substrate potential of the first P-MOSFET M.sub.1 is connected to the first voltage input terminal V.sub.1N1, the gate and the drain of the second P-MOSFET is connected to the second voltage input terminal V.sub.1N2, and the connecting point between the gate and the drain of the P-MOSFET M.sub.1 and the source and the substrate potential of the P-MOSFET M.sub.2 is connected to the output terminal V.sub.OUT.

FIG. 2 shows the currents flowing through the P-MOSFETs M.sub.1 and M.sub.2 in the circuit for producing a constant voltage relative to an output voltage at the output terminal V.sub.OUT. When the threshold voltages of the first and second P-MOSFETs M.sub.1 and M.sub.2 are V.sub.T1 and V.sub.T2, and the input voltages V.sub.1 and V.sub.2 are applied to the input terminals V.sub.1N1 and V.sub.1N2 as explained before, no current flows through the first P-MOSFET M.sub.1 when the output voltage ranges V.sub.1 -.vertline.V.sub.T1 .vertline. to V.sub.1, and a current flows through the first P-MOSFET M.sub.1 in reversely proportional to the output voltage when it is below V.sub.1 -.vertline.V.sub.T1 .vertline., while no current flows through the second P-MOSFET M.sub.2 when the output voltage ranges V.sub.2 to V.sub.2 +.vertline.V.sub.T2 .vertline., and a current flows through the second P-MOSFET M.sub.2 in proportional to the output voltage when it is above V.sub.2 +.vertline.V.sub.T2 .vertline.. When the currents flowing through the P-MOSFETs M.sub.1 and M.sub.2 are equal to each other, the stabilized output voltage V.sub.s is obtained at the output terminal V.sub.out. The level of the stabilized output voltage V.sub.s is determined in accordance with the aforementioned equation (1).

Here, it is assumed that the input voltage V.sub.1 is 10 V, the input voltage V.sub.2 is 5 V, the threshold voltages V.sub.T1 and V.sub.T2 are -1 V, and the ratio of the mutual transfer conductances g.sub.m1 and g.sub.m2 is 2/1. Thus, lines M.sub.1 and M.sub.2 indicating currents flowing through the first and second P-MOSFETs M.sub.1 and M.sub.2 relative to the output voltage at the output terminal V.sub.OUT are obtained as shown in FIG. 3, so that the stabilized output voltage V.sub.s is 8 V. In this situation, the lines M.sub.1 and M.sub.2 changes as shown in FIG. 4, where the threshold voltages V.sub.T1 and V.sub.T2 of the first and second P-MOSFETs M.sub.1 and M.sub.2 change from -1 V to -0.5 V, so that the stabilized output voltage V.sub.s changes from 8 V to 8.17 V. This is one of the aforemention disadvantages. Further, it is clearly understood from FIG. 2 that a range of the output voltage at the output terminal V.sub.OUT is narrow. This is the other disadvantage. These disadvantages are overcome in a circuit for producing a constant voltage according to the invention.

Next, a circuit for producing a constant voltage in the first embodiment according to invention will be explained in conjunction with FIGS. 5 and 6.

In FIG. 5, there is shown the circuit for producing a constant voltage which comprises P-MOSFETs M.sub.11, M.sub.12, M.sub.13 and M.sub.14. In the circuit, the P-MOSFETs M.sub.11 and M.sub.12 are connected in series between first and second voltage input terminals V.sub.1N1 and V.sub.1N2, source and substrate potential of the P-MOSFET M.sub.13 are connected to drain of the P-MOSFET M.sub.11, gate and drain of the P-MOSFET M.sub.13 are connected to gate of the P-MOSFET M.sub.11, source and substrate potential of the P-MOSFET M.sub.14 are connected to drain of the P-MOSFET M.sub.12, gate and drain of the P-MOSFET M.sub.14 are connected to gate of the P-MOSFET M.sub.12, and a connecting point of the P-MOSFETs M.sub.11 and M.sub.12 is connected to an output terminal V.sub.OUT.

In operation, input voltages V.sub.1 and V.sub.2 are applied to the first and second voltage input terminals V.sub.1N1 and V.sub.1N2. Here, it is assumed that threshold voltages of the P-MOSFETs M.sub.11, M.sub.12, M.sub.13 and M.sub.14 are equal to each other to be "V.sub.TH ". Thus, a gate voltage V.sub.G11 of the P-MOSFET M.sub.11 is obtained in the presence of the P-MOSFET M.sub.13 as follows.

where V.sub.D11 is a drain voltage of the P-MOSFET M.sub.11. Then, a current flowing through the P-MOSFET M.sub.11 is indicated by a line M.sub.11 in FIG. 6, and is reversely proportional to the drain voltage V.sub.D11 equal to an output voltage at the output terminal V.sub.OUT, where the output voltage is below the first input voltage V.sub.1. On the other hand, a gate voltage V.sub.G12 of the P-MOSFET M.sub.12 is obtained in the presence of the P-MOSFET M.sub.14 as follows.

where V.sub.D12 is a drain voltage of the P-MOSFET M.sub.12. Then, a current flowing through the P-MOSFET M.sub.12 is indicated by a line M.sub.12 in FIG. 6, and is proportional to a source voltage equal to the output voltage, where the output voltage is above the second input voltage V.sub.2. The stabilized output voltage V.sub.s is obtained from a crossing point of the lines M.sub.11 and M.sub.12, and is determined in accordance with the equation (4). ##EQU2## where

g.sub.m11 is a mutual transfer conductance of the P-MOSFET M.sub.11, and

g.sub.m12 is a mutual transfer conductance of the P-MOSFET M.sub.12.

As understood from the equation (4), the output voltage at the output terminal V.sub.OUT can be arbitrarily set, in the range between the voltages V.sub.1 and V.sub.2 applied to the first and second voltage input terminals V.sub.1N1 and V.sub.1N2, in accordance with the setting of the mutual transfer conductances g.sub.m11 and g.sub.m12. Even more, the output voltage does not change under the conditions that the threshold voltages of the P-MOSFETs M.sub.11, M.sub.12, M.sub.13 and M.sub.14 are equal to each other, even if the threshold voltages change.

In FIG. 7, there is shown a circuit for producing a constant voltage in the second embodiment according to the invention, wherein like parts are indicated like reference symbols in the first embodiment. In the circuit, first and second P-MOSFETs M.sub.11 and M.sub.12 are connected in series between first and second voltage input terminals V.sub.1N1 and V.sub.1N2, source and substrate potential of P-MOSFET M.sub.13 are connected to drain of the P-MOSFET M.sub.11, gate and drain of the P-MOSFET M.sub.13 are connected to gate of the P-MOSFET M.sub.11, source and substrate potential of P-MOSFET M.sub.14 are connected to drain of the P MOSFET M.sub.12, and gate and drain of the P-MOSFET M.sub.14 are connected to gate of the P-MOSFET M.sub.12. In the circuit, further, drain of N type depletion MOSFET M.sub.15 is connected to a connecting point between the gate of the P-MOSFET M.sub.11 and the gate and the drain of the P-MOSFET M.sub.13, gate and source of the N type depletion MOSFET M.sub.15 are connected to a ground potential terminal V.sub.G1 connected to the ground potential, drain of N type depletion MOSFET M.sub.16 is connected to a connecting point between the gate of the P-MOSFET M.sub.12 and the gate and the drain of the P-MOSFET M.sub.14, gate and source of the N type depletion MOSFET M.sub.16 are connected to a ground potential terminal V.sub.G2 connected to the ground potential, and a connecting point between the first and second P-MOSFETs M.sub.11 and M.sub.12 is connected to an output terminal V.sub.OUT.

In operation, the same characteristic of an output voltage as that in the first embodiment is obtained at the output terminal V.sub.OUT. Even more, minute currents flow from the connecting point between the gate of the P-MOSFET M.sub.11 and the gate and the drain of the P-MOSFET M.sub.13 and the connecting point between the gate of the P-MOSFET M.sub.12 and the gate and the drain of the P-MOSFET M.sub.14 through the N type depletion MOSFETs M.sub.15 and M.sub.16 to the ground potential terminals V.sub.G1 and V.sub.G2, respectively, where the first and second voltages V.sub.1 and V.sub.2 applied to the input terminals V.sub.1N1 and V.sub.1N2 fluctuate, so that the gates of the P-MOSFETs M.sub.11 and M.sub.12 are under a floating state, thereby avoiding an operation instability of the circuit.

In a circuit for producing a constant voltage according to the invention, as explained above, first and second MOSFETs each having one conduction type are connected in series between first and second voltage sources, and bias means is connected between gate and drain of each MOSFET, wherein the bias means produces a potential difference equal to a threshold voltage of each MOSFET, so that a wide range of an output voltage can be produced, and an output voltage characteristic is maintained to be constant, even if a threshold voltage changes in a semiconductor device fabricating process.

Although the invention has been described with respect to specific embodiment for complete and clear disclosure, the appended claims are not to thus limited but are to be construed as embodying all modification and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.