Circuit Arrangement in a Television Receiver, Provided With a Line Deflection Circuit and a Switched Supply Voltage Circuit

The invention relates to a circuit arrangement in a television receiver which is provided with a line deflection circuit for generating a deflection current of line frequency through a deflection coil, said circuit arrangement including a first switch controllable at line frequency and a first winding and a supply voltage circuit also switched at the line frequency comprising a second switch controllable at line frequency and a second winding, whilst the first switch is controlled by said supply voltage circuit, a first current loop comprising the first winding, a third winding coupled to the second winding, a diode conducting during the cut-off time of the second switch and a capacitor.

Such a circuit arrangement is described in U.S. Pat. application Ser. No. 567,317 filed Apr. 4, 1975, in which the series arrangement of a capacitor and a primary winding of a transformer are arranged in parallel across the diode in order to control the first switch by a square-wave voltage which consequently does not include a retrace pulse. The voltage present across a secondary winding of this transformer is the control voltage of the first switch.

It is an object of the invention to provide a circuit arrangement having the same operation as the arrangement described in said patent application, but in which the said capacitor and transformer, which are expensive components, can be omitted. To this end the circuit arrangement according to the invention is characterized in that the control means of the first switch are incorporated in a second current loop which also comprise a fourth winding coupled to the first winding and a fifth winding coupled to the third winding.

The invention will be described in greater detail by way of example with reference to the accompanying Figures in which

FIG. 1 shows the principle circuit diagram of an arrangement described in said patent application,

FIG. 2 shows an equivalent circuit diagram of part of the arrangement of FIG. 1,

FIGS. 3a to e show embodiments relating to the present invention and

FIG. 4 shows an embodiment of the arrangement according to the invention.

The circuit arrangement of FIG. 1 is extensively described in the above-mentioned patent application so that it will suffice to note the following. A switching transistor Tr.sub.1, which may be of the Philips type BU 208, a retrace capacitor C.sub.r, a line deflection coil L.sub.y and a trace capacitor C.sub.t constitute the main components of the line deflection circuit of a television receiver not further shown. This circuit arrangement may be provided in known manner with one or more transformers for mutual coupling of the elements, arrangements for centring and linearity corrections and the like. It operates in known manner. During a first part of the trace time the collector-base diode of the transistor conducts. The voltage across capacitor C.sub.t is applied to coil L.sub.y through which a sawtooth-shaped deflection current i.sub.y flows. At a certain instant transistor Tr.sub.1 is rendered conducting. Approximately in the middle of the trace time current i.sub.y reverses its direction whereafter current i.sub.y flows through the transistor. At the end of the trace time transistor Tr.sub.1 is cut off. An oscillation, the retrace pulse, which reaches a high value in the middle of the retrace time and subsequently decreases again is produced at the junction A of elements Tr.sub.1, C.sub.r and L.sub.y. When the voltage across capacitor C.sub.r has become zero again, the collector base diode of transistor Tr.sub.1 is rendered conducting: this is the commencement of a new trace time.

One end of a primary winding L.sub.1 of a transformer T.sub.1 is connected to the collector of a second switching transistor Tr.sub.2, while the other end thereof is connected to the positive terminal of a direct voltage source B whose negative terminal is connected to the emitter of transistor Tr.sub.2.

A driver stage Dr receiving signals from a line oscillator not shown supplies switching pulses for the base of transistor Tr.sub.2. During part of the period transistor Tr.sub.2 conducts while its collector current flows through winding L.sub.1. During the other part of the period transistor Tr.sub.2 is cut off.

A winding L.sub.5 coupled to winding L.sub.1 is connected to the anode of a diode D.sub.2 whose cathode is connected to a tap on a winding L.sub.6. A capacitor C.sub.3 is arranged in series with winding L.sub.6. The other end of winding L.sub.6 is connected to point A. During the cut-off time of transistor Tr.sub.2 diode D.sub.2 conducts so that energy derived from source B is supplied to the deflection circuit. Windings L.sub.1,L.sub.5,L.sub.6 as well as windings for generating auxiliary supply voltages for other parts of the receiver are provided on the core of transformer T.sub.1, which core is shown as a rectangle. Two of these windings, L.sub.2 and L.sub.7, are shown in FIG. 1. They generate direct voltages with the aid of rectifiers across smoothing capacitances. One of these windings, for example, L.sub.2 is the EHT winding, so that the generated voltage is the EHT for the final anode of the television display tube (not shown) The voltage across a further winding L.sub.8 of transformer T.sub.1 is rectified and an adjustable part of the direct voltage thus obtained is fed back for stabilization purposes to a modulator present in driver stage D.sub.r for influencing the conductor period of transistor Tr.sub.2 in such a manner that the DC component V.sub.o of the voltage across capacitor Ct and consequently the amplitude of current i.sub.y remain constant. The winding sense of the different windings is shown by polarity dots in FIG. 1.

In FIG. 1 winding L.sub.5 and the elements shown to the right thereof are separated from the electric mains, that is to say, they are separated from ground of the arrangement. Connected thereto are the free ends of elements L.sub.5, L.sub.7, C.sub.3, C.sub.r and C.sub.t as well as the emitter of transistor Tr.sub.1. The dead ends of the elements shown to the left of windings L.sub.5, are connected to the return lead of the mains.

The series arrangement of a capacitor C.sub.2 and a primary winding L.sub.3 of a transformer T.sub.2 a secondary winding L.sub.4 of which controls the base electrode of transistor Tr.sub.1 is arranged in parallel across diode D.sub.2. It can be shown that the voltage across winding L.sub.3 assumes the value pV.sub. B -mV.sub. o during the time interval when transistor Tr.sub.2 is conducting and while diode D.sub.2 is blocked wherein V.sub.B is the voltage of source B, while 1:p is the ratio between the number of turns L.sub.1 and that of winding L.sub.5, and 1:m is the ratio between the number of turns of the entire winding L.sub.6 and that part thereof which is located between the tap and the junction with capacitor C.sub.3. The said voltage does not include a retrace pulse during the entire interval provided that transistor Tr.sub.1 is controlled in such a manner that the retrace time of deflection current i.sub.y does not occur during this period. During the rest of the line period, when diode D.sub.2 conducts, the voltage across winding L.sub.3 assumes the value V.sub.o. The said voltage, in the same manner as that across winding L.sub.4, is square-wave and the base of transistor Tr.sub.1 receives a blocking voltage of constant amplitude during the time when diode D.sub.2 conducts and a deblocking voltage having a non-stabilized amplitude during the time when the diode does not conduct. The advantages of such a control have been further described in the said patent application, i.e. the fact that the turn-off time of transistor Tr.sub.1 substantially does not vary and the fact that the control range of transistor Tr.sub.2 is increased.

Elements C.sub.2 and L.sub.3 of FIG. 1 which are arranged in series may change position. In the same manner capacitor C.sub.3 and the part of winding L.sub.6 between the tap and the junction with C.sub.3 may change position. This is shown in FIG. 2 which is only part of the circuit diagram of FIG. 1 and in which capacitor C.sub.3 is incorporated between the said part L'.sub.6 of winding L.sub.6 and the other part L".sub.6.

Voltages whose mean values are equal to voltage V.sub.o are present across capacitor C.sub.2 and C.sub.3. In fact, the direct voltage across the different inductors are zero. The voltage at the right-hand end of winding L.sub.3 and that at the end of winding L'.sub.6 shown at the top are therefore equal, so that the said ends can be connected together with the result that capacitor C.sub.2 can be omitted. This is the embodiment of FIG. 3a. If in this embodiment 1:n is the ratio between the number of turns of winding L.sub.3 and that of winding L.sub.4, the embodiment of FIG. 3b is equivalent. The said ratio in this case is equal to 1:1 while the ends of winding L.sub.3 are connected to taps on winding L.sub.5 and winding L'.sub.6, which taps are provided in such a manner that the ratio between the number of turns of windings L.sub.5 and L'.sub.6 and that of the part thereof shown below the tap is approximately equal to 1:n. The voltage across winding L.sub.4 in FIG. 3b is thus substantially equal to the voltage across the corresponding winding in FIG. 3a.

Since transformer T.sub.2 in the modification of FIG. 3b has a transformation ratio of 1:1, it may be omitted, provided that the windings L.sub.5 and L'.sub.6 formed as autotransformers are replaced by transformers. Thus the simplified circuit diagram of FIG. 3c is obtained in which elements L.sub.5, D.sub.2, C.sub.3 and L'.sub.6 constitute a loop while a second loop is constituted by the base-emitter diode of transistor Tr.sub.1 and two windings L.sub.9 and L.sub.10. In this case winding L.sub.9 is coupled to winding L.sub.5 and winding L.sub.10 is coupled to L'.sub.6 and the ratio between the number of turns of L.sub.5 and L'.sub.6 and that of L.sub.9 and L.sub.10, respectively, is equal to 1:n.

The emitter of transistor Tr.sub.1 and the ends of windings L.sub.5 and L'.sub.6 shown at the bottom are connected together in the previously described modifications. The embodiment of FIG. 3c may be replaced in such a case by that of FIG. 3d in which winding L.sub.9 is an extension of winding L.sub.5. Another embodiment is obtained by incorporating, in FIG. 3c, the base-emitter diode of transistor Tr.sub.1 between the ends of windings L.sub.9 and L.sub.10 shown at the bottom and not between their ends shown at the top. This is shown in FIG. 3e. When the emitter of transistor Tr.sub.1 and the low side of windings L.sub.10 and L'.sub.6 are connected together, the separation between these windings is not necessary and L.sub.10 may be replaced by a tap as was the case in FIG. 3b. Thus the embodiment of FIG. 4 is obtained whose operation is identical to that of FIG. 1 and in which transformer T.sub.2 and capacitor C.sub. 2 can be omitted at the expensive of only one extra tap on winding L.sub.6 and an extra winding L.sub.9.

It will be noted that the voltages across the different windings of transformer T.sub.1 do not have the same shape in spite of the fact that the windings are coupled together. This is possible because these shapes are not affected by the coupling because the voltages V.sub.o and V.sub.B which are impressed from the exterior are neither affected. On the other hand the currents flowing through the windings are influenced by the coupling, but this has no detrimental effect on the operation. All this has been further described in U.S. patent application Ser. No. 670,875 filed Mar. 26, 1976. It will be evident that the step according to this patent application is of no importance for the present invention, which means that the windings shown to the left and to the right may constitute two separate transformers. This also applies to the step according to U.S. Pat. No. 3,950,674, which means that the cathode of diode D.sub.2 may be directly connected to point A.