Single-inductor bipolar-output converter

[0001] The present invention generally relates to a single-inductor bipolar-output (SIBO) converter, and more particularly to a SIBO converter with tunable power distribution control.

[0002] As modern electronic products become thinner, lighter and smaller, chip size reduction has become an inevitable challenge. Traditionally, the switching inductor DC-DC converter is used as the power supply solution for the power converter. However, each converter needs to use an independent inductor, which certainly increases the cost and area in practical applications.

[0003] The emergence of the single-inductor multiple-output (SIMO) architecture requires only one inductor, as an external component, to generate multiple sets of output voltages. However, this architecture creates the problem of interactive voltage regulation. In active-matrix organic light-emitting diode (AMOLED) applications, for example, we need both positive and negative supply voltages. In order to save external components, we use topology of single-inductor bipolar-output (SIBO), a type of SIMO architecture, to provide the required bipolar voltage supply.

[0004] Active-energy-correction (AEC) technique has been proposed to improve the interactive voltage regulation phenomenon caused by a single load change. However, in some applications, such as AMOLED, the load currents usually vary simultaneously (or synchronously) and in the same way (commonly called synchronous load transient), which make the cross-regulation problem in the converter even more serious.

[0005] For the reason that conventional SIBO converter could not effectively solve the cross-regulation problem, a need has arisen to propose a novel scheme to overcome the drawbacks of the conventional converters.

[0006] In view of the foregoing, it is an object of the embodiment of the present invention to provide a single-inductor bipolar-output (SIBO) converter capable of alleviating the suffering on the output voltages when the load currents change simultaneously and in the same way, and uneven distribution of positive and negative (voltage) energy.

[0007] According to one embodiment, a single-inductor bipolar-output converter includes a power stage, a first error amplifier, a second error amplifier, a summation device and a tunable gain control circuit. The power stage generates a positive output voltage and a negative output voltage. The first error amplifier generates a first error signal according to the positive output voltage, and the second error amplifier generates a second error signal according to the negative output voltage. The summation device generates a sum signal by adding the first error signal and the second error signal. The tunable gain control circuit is coupled to receive the first error signal and is configured to generate an amplified first error signal with a tunable gain.

[0013] FIG. 1 shows a circuit diagram illustrating a single-inductor bipolar-output (SIBO) converter 100 according to one embodiment of the present invention, and FIG. 2 shows waveforms of pertinent signals of the SIBO converter 100 of FIG. 1.

[0014] In the embodiment, the SIBO converter (converter hereinafter) 100 may include a (single) inductor L. The converter 100 may include a first switch M₁ controlled by a first switch signal V_G1 and coupled between an input voltage V_IN and (a first end of) the inductor L. In one exemplary embodiment, the first switch M₁ may include a p-type metal-oxide-semiconductor field-effect (MOSFET) transistor with a source coupled to receive the input voltage V_IN, a drain connected to the first end of the inductor L and a gate coupled to receive the first switch signal V_G1.

[0015] The converter 100 of the embodiment may include a second switch M₂ controlled by a second switch signal V_G2 and coupled between (a second end of) the inductor L and ground. In one exemplary embodiment, the second switch M₂ may include an n-type MOSFET transistor with a source connected to the ground, a drain connected to the second end of the inductor L and a gate coupled to receive the second switch signal V_G2.

[0016] The converter 100 of the embodiment may include a first diode D1 with a cathode electrode connected to the first end of the inductor L and an anode electrode at which a negative output voltage VGL is outputted. The converter 100 of the embodiment may include a second diode D2 with an anode electrode connected to the second end of the inductor L and a cathode electrode at which a positive output voltage VGH is outputted. It is noted that the inductor L, the first switch M₁, the second switch M₂, the first diode D1 and the second diode D2 constitute a power stage of the converter 100, and the rest of the converter 100 constitutes a control stage of the converter 100.

[0017] The converter 100 may include a first error amplifier (error amp) 11A configured to generate a first error signal V_EP according to the positive output voltage VGH, a second error amplifier 11B configured to generate a second error signal V_EN according to the negative output voltage V_GL, and a summation device 12 configured to generate a sum signal V_{comp_sum} (indicating required total energy) by adding the first error signal V_EP and the second error signal V_EN.

[0018] Specifically, in the embodiment, the first error amplifier 11A amplifies a difference between a (predetermined) first reference voltage V_REFP (connected to a non-inverting input node) and a first divided voltage V_FBP (connected to an inverting input node) that is a fraction of the positive output voltage VGH by a (first) voltage divider composed of a first resistor R₁ and a second resistor R₂ connected in series (between the positive output voltage VGH and the ground). The second error amplifier 11B amplifies a difference between a (predetermined) second reference voltage V_REFN (connected to an inverting input node) and a second divided voltage V_FBN (connected to a non-inverting input node) that is a fraction of the negative output voltage VGL by a (second) voltage divider composed of a third resistor R₃ and a fourth resistor R₄ connected in series (between the negative output voltage VGL and a predetermined voltage V_nn).

[0019] The converter 100 may include a current sensor 13 configured to generate an inductor signal V_SUM representing an inductor current I_L flowing through the inductor L and slope data of the inductor current I_L with respect to time change.

[0020] The converter 100 may include a first comparator (comp) 14A that compares the inductor signal V_SUM and the first error signal V_EP, and outputs a first compare signal V_C1 indicating whether the inductor signal V_SUM is larger than the first error signal V_EP. The converter 100 may include a second comparator 14B that compares the inductor signal V_SUM and the sum signal V_{comp_sum}, and outputs a second compare signal V_C2 indicating whether the inductor signal V_SUM is larger than the sum signal V_{comp_sum}.

[0021] The converter 100 may include a path controller 15 (controlled by a clock signal V_CLK) configured to determine one of a plurality of paths (three paths in the embodiment) and accordingly generate the first switch signal V_G1 and the second switch signal V_G2.

[0022] FIG. 3A shows a circuit diagram illustrating a portion of the converter 100 of FIG. 1 and the determined paths, and FIG. 3B shows a waveform illustrating the inductor current I_L, associated slop data and power distribution sequence in the converter 100 of FIG. 1.

[0023] At the beginning of each switching cycle (i.e., the period of the clock signal V_CLK), the inductor L begins to charge in the charge interval, and the inductor current I_L is distributed to the positive/negative output voltages VGH/VGL in the discharge interval. The positive/negative output voltages VGH/VGL in the converter 100 can receive energy EGH and EGL respectively in each switching cycle, and the distributed energy proportions are determined by the first/second error signals V_EP/V_EN.

[0024] Specifically, at the beginning of each switching cycle, the converter 100 operates on (charge) path 1 with the first switch M₁ and the second switch M₂ turned on. The inductor current I_L passes through path 1 until the inductor signal V_SUM is higher than the sum signal V_{comp_sum}, which represents the total energy required to meet the positive/negative output voltages VGH/VGL. At this time, the second compare signal V_C2 will change from low to high, and the converter 100 will enter (V_GL) path 2 with the first switch M₁ turned off and the second switch M₂ turned on. Accordingly, the negative output voltage VGL obtains energy EGL through path 2, and the discharge slope is VGL/L (L represents inductance of the inductor L). When the inductor signal V_SUM intersects with the first error signal V_EP, the first compare signal V_C1 will change from high to low, and then the converter 100 will enter (VGH) path 3 with the first switch M₁ turned on and the second switch M₂ turned off. Accordingly, the positive output voltage VGH obtains energy EGH through path 3, and the discharge slope is (V_IN−VGH)/L, thereby completing the energy transfer control switching.

[0025] It is noted that the converter 100 of the embodiment does not adopt the active-energy-correction (AEC) technique as traditionally used. Generally speaking, the AEC technique requires an additional pair of extra amplifiers in associated with the pair of the first/second error amplifiers 11A/11B. The inputs of the extra amplifiers are connected to the inputs of associated error amplifiers respectively, but the outputs of the extra amplifiers are connected to the outputs of disassociated error amplifiers respectively. The AEC technique may improve the interactive voltage regulation phenomenon caused by a single load change. However, in some applications such as active-matrix organic light-emitting diode (AMOLED), the load currents usually vary simultaneously (or synchronously) and in the same way (commonly called synchronous load transient), which make the cross-regulation problem in the converter even more serious. As the converter 100 of the embodiment does not adopt the AEC technique, the converter 100 can alleviate the suffering on the output voltages when the load currents change simultaneously and in the same way.

[0026] According to one aspect of the embodiment, the converter 100 may include a tunable gain control circuit 16 coupled to receive the first error signal V_EP and configured to generate an amplified first error signal with a tunable gain K (i.e., ratio of the amplified first error signal to the first error signal V_EP), such that the amplified first error signal is equal to K*V_EP.

[0027] It is noted that, if the tunable gain control circuit 16 is not used (i.e., K=1), the synchronous load-drawing interactive voltage regulation will cause uneven distribution of positive and negative (voltage) energy, which will lead to uneven size of the transient state. In order to solve this problem, the tunable gain control circuit 16 with K being not equal to 1 is adopted in the embodiment that makes the total energy demand remain unchanged when the load currents change simultaneously and in the same way, and the distribution of positive and negative (voltage) energy can be changed according to the adjustment of K value, thereby changing the energy ratio obtained by the positive and negative output voltages VGH/VGL. Therefore, the embodiment can adjust the transient voltage by adjusting the K value according to specific application requirements.

[0028] FIG. 4 shows waveforms illustrating energy distribution not adopting the tunable gain control circuit 16 (i.e., K=1) and adopting the tunable gain control circuit 16 with tunable gain K (i.e., K≠1). Specifically, at time T_S, the load changes from light to heavy with synchronous load transient situation. For example, the load current IGH at the positive output voltage VGH and the load current IGL at the negative output voltage VGL synchronously increase at time T_S. At this time, the first error signal V_EP and the second error signal V_EN will increase to cope with the load change, which will also cause the sum signal V_{comp_sum} to increase, as shown in the waveform diagram between T_S-2 T_S. The bottom of FIG. 4 shows the energy distribution time. Without adopting the tunable gain control circuit 16 (i.e., K=1), it can be seen that the time for the negative output voltage VGL to obtain allocated energy after the load changes is much longer than that of the positive output voltage VGH, which will cause the positive output voltage VGH to have a larger transient voltage. By adopting the tunable gain control circuit 16 with tunable gain K (i.e., K≠1), we can control the time when the positive output voltage VGH and the negative output voltage VGL obtain energy whenever the transient occurs, so that we can adjust the energy obtained between the two at the moment of the transient. Taking FIG. 4 as an example, after adjusting the tunable gain K, we can increase the time for the positive output voltage VGH to obtain energy, and relatively reduce the time for the negative output voltage VGL, thereby achieving the effect of a more average transient voltage.

[0029] Although specific embodiments have been illustrated and described, it will be appreciated by those skilled in the art that various modifications may be made without departing from the scope of the present invention, which is intended to be limited solely by the appended claims.