Circuit and method for managing common mode noise in isolated resonant DC-DC power converters

[0001] This application claims benefit of U.S. Provisional Patent Application No. 61/936,535, filed Feb. 6, 2013, and which is hereby incorporated by reference.

[0002] A portion of the disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the reproduction of the patent document or the patent disclosure, as it appears in the U.S. Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.

[0003] The present invention relates generally to the field of electrical power conversion, particularly to isolated resonant converters required to provide low common mode noise.

[0004] Isolated DC/DC converters often experience common mode (CM) noise that is present between the primary and secondary terminals. The common mode noise is typically generated by unbalanced currents flowing through the inter-winding capacitances of the isolation transformer generated during switching operation of the converter.

[0005] One example of a prior art converter 10 is shown in FIG. 1. The converter includes an isolation transformer T with depicted inter-winding capacitances Ci1 and Ci2 representing lumped components of the real structure. The inter-winding capacitances typically define a capacitive coupling between the primary and secondary circuits of the converter. Because of the capacitive coupling, a primary center point voltage Vm can be used to predict common mode voltage Vcm present between the primary and secondary circuits. This can be predicted by means of experimental measurement or by circuit model simulation of the circuit.

[0006] For a converter 10 according to FIG. 1, the primary center point voltage Vm voltage is graphically represented as 21 on FIG. 2, where the voltage of an input source V1 is marked for reference. As shown on FIG. 2, the center point voltage Vm features low frequency components and voltage transients with higher dv/dt. The high dv/dt voltage transients cause high capacitive currents through the inter-winding capacitances Ci1/Ci2 which are difficult to damp. Therefore the center point voltage Vm and consequently the common mode voltage Vcm tend to oscillate at high frequency.

[0007] It can be demonstrated that if the primary center point voltage Vm is stable, then noise currents flowing through the inter-winding capacitances Ci1 and Ci2 cancel each other and the common mode voltage Vcm between the primary and secondary circuits is minimized.

[0008] One solution as has previously been known in the art is to decrease the common mode voltage of a DC/DC converter 30 having a topology as represented in FIG. 3. This topology is useful in applications where the resonant choke of the converter is represented by a leakage inductance of the isolation transformer. However, it does not offer a solution for applications where a discrete resonant choke is used.

[0009] Therefore, a solution which provides low common mode voltage and includes a discrete resonant choke is required.

[0010] According to one exemplary embodiment of an invention according to the present invention, a resonant DC/DC converter includes a primary circuit and a secondary circuit. The primary circuit has at least four switches configured as primary switches in a bridge configuration, an isolation transformer with at least one primary and one secondary winding, and a resonant tank having a resonant capacitor and a split resonant inductor with two separate windings. The secondary circuit is coupled to a secondary winding of the isolation transformer whereby the center voltage of the primary transformer winding is substantially free of stepwise voltage changes.

[0011] In an exemplary aspect of such an embodiment, the two separate windings of the split resonant inductor may be structurally identical or otherwise comprise substantially equivalent parasitic capacitances.

[0012] In another exemplary aspect, the split resonant inductor substantially shares a common path of magnetic flux.

[0013] In another exemplary aspect, the split resonant inductor may further be characterized by an m:n inductance ratio of substantially 1:1. Alternatively, the m:n inductance ratio may be different from 1:1, having a value provided to further optimize a common mode voltage between the primary and secondary circuits.

[0014] In another exemplary aspect, the split resonant inductor may be comprised of two independent inductors.

[0015] In another exemplary aspect, the resonant capacitor may be a single component, or in certain embodiments may be split into two separate components, wherein the split resonant inductor may further substantially share the common path of magnetic flux.

[0016] In another exemplary aspect, the secondary circuit may include a rectifier circuit coupled across the secondary isolation transformer winding and configured to produce a DC output to a load. In one embodiment, the rectifier circuit may include a plurality of synchronous rectifier switching elements arranged in a bridge configuration. In another embodiment, the rectifier circuit may include a plurality of synchronous rectifier switching elements arranged in a center-tap configuration.

[0017] In another exemplary aspect, the resonant circuit may be defined as including first and second impedance circuits coupled to nodes between the respective first and second pairs of switching elements. The impedance circuits include respective impedance values that are substantially identical, wherein synchronous switching of opposing pairs of switching elements in the inverter bridge produces a center point voltage of the isolation transformer that is substantially a DC voltage.

[0030] Throughout the specification and claims, the following terms take at least the meanings explicitly associated herein, unless the context dictates otherwise. The meanings identified below do not necessarily limit the terms, but merely provide illustrative examples for the terms. The meaning of “a,” “an,” and “the” may include plural references, and the meaning of “in” may include “in” and “on.” The phrase “in one embodiment,” as used herein does not necessarily refer to the same embodiment, although it may.

[0031] The term “coupled” means at least either a direct electrical connection between the connected items or an indirect connection through one or more passive or active intermediary devices.

[0032] The term “circuit” means at least either a single component or a multiplicity of components, either active and/or passive, that are coupled together to provide a desired function. Terms such as “wire,” “wiring,” “line,” “signal,” “conductor,” and “bus” may be used to refer to any known structure, construction, arrangement, technique, method and/or process for physically transferring a signal from one point in a circuit to another. Also, unless indicated otherwise from the context of its use herein, the terms “known,” “fixed,” “given,” “certain” and “predetermined” generally refer to a value, quantity, parameter, constraint, condition, state, process, procedure, method, practice, or combination thereof that is, in theory, variable, but is typically set in advance and not varied thereafter when in use.

[0033] The terms “switching element” and “switch” may be used interchangeably and may refer herein to at least: a variety of transistors as known in the art (including but not limited to FET, BJT, IGBT, JFET, etc.), a switching diode, a silicon controlled rectifier (SCR), a diode for alternating current (DIAC), a triode for alternating current (TRIAC), a mechanical single pole/double pole switch (SPDT), or electrical, solid state or reed relays. Where either a field effect transistor (FET) or a bipolar junction transistor (BJT) may be employed as an embodiment of a transistor, the scope of the terms “gate,” “drain,” and “source” includes “base,” “collector,” and “emitter,” respectively, and vice-versa.

[0034] The terms “power converter” and “converter” unless otherwise defined with respect to a particular element may be used interchangeably herein and with reference to at least DC-DC, DC-AC, AC-DC, buck, buck-boost, boost, half-bridge, full-bridge, H-bridge or various other forms of power conversion or inversion as known to one of skill in the art.

[0035] Terms such as “providing,” “processing,” “supplying,” “determining,” “calculating” or the like may refer at least to an action of a computer system, computer program, signal processor, logic or alternative analog or digital electronic device that may be transformative of signals represented as physical quantities, whether automatically or manually initiated.

[0036] The terms “controller,” “control circuit” and “control circuitry” as used herein may refer to, be embodied by or otherwise included within a machine, such as a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed and programmed to perform or cause the performance of the functions described herein. A general purpose processor can be a microprocessor, but in the alternative, the processor can be a controller, microcontroller, or state machine, combinations of the same, or the like. A processor can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0037] Referring generally to FIGS. 4-12, various embodiments of a power converter according to the present invention may now be described in greater detail. Where the various figures may describe embodiments sharing various common elements and features with other embodiments, similar elements and features are given the same reference numerals and redundant description thereof may be omitted below.

[0038] Referring first to FIG. 4, one exemplary embodiment 40 of a symmetrical resonant converter (SyRC) according to the present invention includes a full-bridge inverter stage with switching elements Q1-Q4, a primary circuit 12 disposed along a lateral branch 12 (e.g., including a primary winding of isolation transformer T, a split resonant choke Lr1/Lr2, a split resonant capacitor Cr1/Cr2) and a secondary circuit 14 (e.g., including or coupled to a secondary winding of isolation transformer T). The components in the lateral branch may define first and second impedance circuits, with the first impedance circuit in the example shown including the first split resonant inductor winding Lr1 and the first split resonant capacitance Cr1 and having an impedance value Z1, and with the second impedance circuit including the second split resonant inductor winding Lr2 and the second split resonant capacitance Cr2 and having an impedance value Z2.

[0039] Many forms of secondary circuits 14 may be used, such as for example that illustrated in FIG. 12. In the example shown, a rectifier circuit is coupled across the secondary winding of the isolation transformer T, which may include a bridge of synchronous rectifier switching elements Qsr1-Qsr4. A filtering capacitor Cf and a load R_L are coupled across an output of the rectifier circuit.

[0040] If the full-bridge inverter is controlled symmetrically, e.g. wherein diagonally opposed switching elements Q1 and Q4 are controlled for switching synchronously, and likewise diagonally opposed switching elements Q2 and Q3 are controlled for switching synchronously but with a 180 degrees shift with respect to Q1 and Q4, then the resultant switching voltages 51 and 52 may be characterized by the symmetrical waveforms depicted on FIG. 5. Assuming further that the respective impedance values Z1 and Z2 are equivalent, then the primary center point voltage Vm of the isolation transformer T is substantially a DC voltage 62 as depicted on FIG. 6. Consequently, the capacitive currents flowing through the inter-winding capacitances of the isolation transformer T will be minimized because there are no stepwise voltage changes, resulting in a low common mode noise present between the primary 12 and secondary 14 circuits.

[0041] Note that within switching transients, impedance values Z1 and Z2 are mainly defined or otherwise associated with the split inductor windings Lr1 and Lr2 because the impedances of resonant capacitors Cr1 and Cr2 are relatively, and generally substantially, lower. However, the parasitic capacitances of Lr1 and Lr2 may typically be kept substantially equal. Therefore, equivalent physical structures of chokes Lr1 and Lr2 are preferred to avoid unbalanced inter-winding capacitance currents.

[0042] Another embodiment of a DC-DC converter topology may be as shown in FIG. 7. This converter topology 70 includes a split resonant choke Lr1/Lr2 which utilizes the same magnetic core, i.e. the magnetic fluxes share the same path. This embodiment allows for a higher power density of the converter while still gaining benefits of the embodiment as previously described according to FIG. 4.

[0043] Taking into account that the voltage across the resonant capacitors Cr1 and Cr2 remains substantially unchanged during the switching transitions, any ratio between capacitance of Cr1 and capacitance of Cr2 can be chosen providing that Cr1*Cr2/(Cr1+Cr2) is kept constant. Therefore, capacitors Cr1 and Cr2 can be integrated into a single resonant capacitor. In this case, the center point voltage Vm is still free of voltage transients with higher dv/dt. However, the center point voltage Vm may be characterized by an AC voltage 61, as depicted on FIG. 6, having mainly a fundamental frequency component given by the switching frequency of the converter. Because the center point voltage Vm essentially governs the common mode voltage between the primary and secondary circuits, the common mode voltage features a similar shape 61 as well. If an application allows for such a low frequency common mode voltage, or if a common mode filter implementation is efficient to dampen low frequency common mode voltages, then the converter can be simplified and a single resonant capacitor can be positioned anywhere within the lateral branch of the converter. As a result, other embodiments of a power converter topology 80, 90, 100, 110 may be obtained as represented in FIGS. 8-11, respectively.

[0044] If an application requires a single resonant capacitor and if it is further required to decrease the RMS value of the common mode voltage between the primary and secondary circuits, then the chokes Lr1 and Lr2 can be intentionally designed with an inductance ratio other than 1:1. Another reason to do this is the eventual existence of asymmetry of the isolation transformer T characterized by unequal inter-winding capacitances. In each of these cases, the inductance ratio of Lr1 and Lr2 may be different than 1:1 and provides optimal common mode voltage in the respective application.

[0045] The previous detailed description has been provided for the purposes of illustration and description. Thus, although there have been described particular embodiments of a new and useful invention, it is not intended that such references be construed as limitations upon the scope of this invention except as set forth in the following claims.