Method and device for synthesizing panorama image using scanning charged-particle microscope

[0001] This invention relates to a method and a device for generating a panorama image that is robust against contamination due to charged-particle irradiation and the imaging shift and distortion of an image by splitting an imaging region into a plurality of local imaging regions, imaging the same, and stitching the picked-up images of the local imaging regions by image processing in order to obtain a wide-field and high-resolution image using a scanning charged-particle microscope.

[0002] In forming a wiring pattern on a semiconductor wafer, a method is adopted in which coating material called resist is applied on the semiconductor wafer, an exposure mask (a reticle) of a wiring pattern is superposed on the resist, a visible light ray, ultraviolet rays or an electron beam is applied thereto from above, the resist is photo-sensed (exposed) and developed to thereby form the wiring pattern on the semiconductor wafer, and with this wiring pattern of the resist as a mask, the semiconductor wafer is etched to thereby form the wiring pattern.

[0003] In inspecting the mask and the pattern shape on the wafer, a critical dimension scanning electron microscope: (CD-SEM), which is a scanning charged-particle microscope, is widely used. The coordinates for performing SEM imaging for evaluating the pattern shape are called an evaluation point, and hereinafter called EP (Evaluation Point) for short. In order to image the EP with a small imaging shift amount and also with high image quality, some or all of adjustment points out of an addressing point (hereinafter referred to as AP), an auto focus point (hereinafter referred to as AF), an auto stigma point (hereinafter referred to as AST) or an auto brightness and contrast point (hereinafter referred to as ABCC) are set as needed, and at the respective adjustment points, addressing, auto focusing, auto stigma adjustment and auto brightness and contrast adjustment are performed, and then the EP is imaged. As to the imaging shift amount in the above addressing, matching between an SEM image at the AP registered in advance as a registered template, whose coordinates are already known, and an SEM image actually observed in the imaging sequence is performed, a shift amount in the matching is taken as a shifting amount of the imaging position, and corrected. The evaluation point (EP), and the adjustment points (AP, AF, AST, ABCC) are collectively called the imaging point. The size and coordinates and the imaging conditions of the EP, the imaging conditions and adjusting methods of the respective adjustment points and the imaging order (or the adjusting sequence) of the respective imaging points, and the above registered template are managed as an imaging recipe, and the SEM images the EP according to the imaging recipe.

[0004] The recipe has been manually generated heretofore by an SEM operator, so the labor and time are required. Further, in order to decide the respective adjustment points and register the registered template in the recipe, it is necessary to actually image the wafer at a low power, resulting in that the generation of a recipe is one of the causes of lowering the operating ratio of the SEM apparatus. Further, with the development to the microstructure and the complicatedness of a pattern, the number of points requiring evaluation remarkably increases, so that the manual generation of the recipe is becoming unrealistic from a viewpoint of labor and generation time.

[0005] Therefore, concerning the imaging recipe, for example, a semiconductor inspection system is disclosed in which the AP is determined based on design data on a circuit pattern of a semiconductor described in the GDS II form, and further data in the AP is picked from the design data and registered as the registered template in the imaging recipe (Patent Literature 1: JP-A No. 2002-328015 official gazette). In that system, it is not necessary to image an actual wafer only for the purpose of deciding the AP and registering the registered template, so that the improvement in operating ratio of the SEM can be achieved. Further, the system has such a function that when an SEM image at the AP (an actual imaging template) is obtained in the actual imaging sequence, matching between the actual imaging template and the registered template of design data is performed, and an SEM image corresponding to the position of the registered template of the design data is re-registered as the registered template in the imaging recipe, and hereinafter the registered template of the re-registered SEM image is used for the addressing processing. Further, the system has a function of automatically detecting a characteristic pattern part from the design data, and registering the same as the AP.

[0006] As the EP, cited are a designation point from a user and a critical portion where device failure is liable to occur called a hot spot output from an EDA (Electronic Design Automation) tool or the like, and feedback such as shape correction for a mask pattern and an alteration of the semiconductor manufacturing process condition is performed based on the pattern dimensional values at these EPs to thereby achieve a high yield. The wiring pattern has been advanced to microstructure and high densification to meet the recent needs of high speed and high integration of the semiconductor device, and super-resolution exposure technique represented by Optical Proximity Correction (OPC) has been introduced. With this introduction, the mask pattern becomes complicated so that simulation prediction for a pattern shape transferred on a wafer and inspection for the actually transferred pattern shape become more important.

• [0007] [Patent Literature 1] JP-A No. 2002-328015 official gazette

[0008] Although it is necessary to input the pattern shape on the mask for simulation prediction of the pattern shape transferred on the wafer, in order to perform simulation tempering the optical proximity effect, it is necessary to input the pattern shape in a wide range to a certain extent. Although a method of inputting design data as the pattern shape is considered, there is a distance between the design data and the pattern shape actually generated on the mask, and this separation becomes a simulation error. Then, although it is considered to image a pattern generated on the mask by SEM and extract the shape, when imaging is performed at a low magnification to cover the wide range, the resolution of an image is deteriorated. On the contrary, when imaging is performed at a high magnification, although the resolution is improved, the visual field is narrowed. Therefore, it is considered that a wide-field imaging region (a wide range for performing SEM imaging at a high magnification is an evaluation point: EP) is split into a plurality of local imaging regions, and SEM imaged at a high magnification (high resolution), and the split images picked up at a high magnification (high resolution) of the plurality of local imaging regions are stitched by image processing to thereby generate a wide-field and high-resolution panorama image. The split local imaging regions at a high magnification (high resolution) are the split imaging regions of the EP, so the regions are hereinafter referred to as SEP (Segmental Evaluation Point). Generally, panorama image synthesis is well-known processing, and in contrast to the panorama synthesis of images picked up by a CCD camera or the like, for example, the panorama image synthesis processing for the semiconductor pattern using the SEM has peculiar problems.

[0009] One is a problem of adhesion of contamination on a sample due to the irradiation of an electron beam. That is, in the case of performing SEM imaging twice for the same place, in the second SEM image, influence of contamination is more strongly exerted to occasionally cause a phenomenon that in contrast to the first SEM image, the image is darkened or a line width of a pattern changes. Consequently, the problem is encountered that in the finally obtained panorama image, the degree of contamination varies from place to place, and the accuracy of pattern shape on the image deteriorates.

[0010] Further, in observing a fine semiconductor pattern, imaging should be performed at high magnification (high resolution) as much as tens of thousands of magnification to hundreds of thousands of magnification extending over a wide-field (wide range) imaging region (EP). Then imaging shift between the SEPs and very small distortion of an image are also problems in the panorama synthesis processing.

[0011] It is an object of the invention to provide a method and a device for synthesizing a panorama image using a scanning charged-particle microscope in order to solve the above problems, which may obtain a panorama image synthesis that is robust against contamination and the imaging shift and distortion of an image based on a split high-resolution SEP group in a wide-field imaging region EP to a fine semiconductor pattern.

[0012] In order to solve the problems, the invention has achieved a panorama image synthesis technique that is robust against contamination and the imaging shift and distortion of an image based on a split high-resolution SEP group in a wide range image (a wide-field image) using a scanning charged-particle microscope (SEM).

[0013] (1) That is, it is necessary to set an adjustment point in order to image the SEP with a small imaging shift amount and with high image quality, and since a plurality of SEPs adjoin each other in a panorama image, sometimes the adjustment point for a certain SEP cannot be arranged when overlapping of an imaging region with a second SEP is not allowed. However, when the above second SEP is imaged after imaging the adjustment point for a certain SEP overlapping the above second SEP, contamination due to imaging of the overlapping adjustment point occurs in the image of the second SEP, resulting in affecting the measurement accuracy of the observed pattern shape. On the other hand, various kinds of adjustment at the adjustment point are comparatively unlikely to be influenced by the contamination.

[0014] Accordingly, the invention is characterized in that when an adjustment point for a certain SEP has an overlapping region with a second SEP, the layout of adjustment points and the imaging order of the imaging points (the respective SEPs and the respective adjustment points) are optimized so that the adjustment point for the certain SEP is imaged after imaging the above second SEP and before imaging the certain SEP.

[0015] That is, the invention is characterized by including: an imaging recipe creating process, which includes a region deciding step of deciding a wide range (a wide-field) imaging region (evaluation point: EP) on a sample imaged using an SEM, a local region deciding step of splitting the wide-range (the wide-field) imaging region (EP) into a plurality of high magnification local imaging regions (SEP (Segmentation Evaluation Point)) and deciding the same, an adjustment point deciding step of deciding adjustment points for imaging each of the plurality of SEPs (some or all of an addressing point (AP), an auto focus point (AF), an auto stigma point (AST), an auto brightness and contrast point (ABCC), or a magnification adjustment point), and an imaging order deciding step of deciding the imaging order of the respective SEPs and the respective adjustment points, and creates the coordinates (layout) of the respective SEPs and the respective adjustment points and the imaging order of the respective SEPs and the respective adjustment points as an imaging recipe; an imaging process of sequentially imaging each of the plurality of SEPs on the sample using the SEM according to the imaging recipe created in the imaging recipe creating process; and a mosaic process of stitching an SEP image group sequentially imaged in the imaging process by image processing, and generating a panorama image, wherein in the image recipe creating process, when the layout of the adjustment point is decided in such a manner that the imaging region overlaps an optional SEP, in the imaging order deciding step, further the imaging sequence is created as the imaging recipe in such a manner that while the respective local imaging regions except the local imaging regions corresponding to the overlapping adjustment point meet the condition that imaging at the respective local imaging regions is performed immediately after adjusting at the adjustment point for the respective local imaging regions, at the local imaging regions corresponding to the overlapping adjustment point, imaging is performed immediately after adjusting at the overlapping adjustment point after imaging the optional local imaging region.

[0016] (2) Further, the invention is characterized in that some or all of (a) splitting into the plurality of SEPs (decision on the number, size and coordinates of SEPs), (b) decision on the layout of the respective adjustment points corresponding to the respective SEPs, and (c) decision on the imaging order of the imaging points (the respective SEPs and the respective adjustment points) described in the (1) are performed according to the design data on a circuit pattern formed on the sample.

[0017] In order to decide the items (a) to (c), it should be known that what pattern exists at least in the imaging region of the EP (Evaluation Point). Further it is considered to arrange the adjustment points in the periphery of the EP in a region where visual field can be moved by image shift. In that case, it is necessary to know the pattern information on the EP and its periphery. For example, it is considered that the pattern of the EP and its periphery is once imaged at low magnification to obtain a pattern array. However, it has the problems of low resolving power, requiring the imaging time, and causing some contamination. The invention is characterized in that the pattern information is acquired off-line (without an imaging device) using the design data. Further, as described above, in deciding the SEP and the imaging sequence (the coordinates and the imaging order of the imaging points; widely, the size, imaging conditions and adjustment method of the imaging points are also included), there are a number of items to be evaluated, so manual optimization requires much time. Therefore, the SEP and the imaging sequence can be automatically decided by analyzing the design data using software.

[0018] (3) Further the invention is characterized in that in deciding the SEP, a plurality of SEPs are decided so that there is an overlapping region between the adjoining SEPs, and an edge of a pattern which is a key to deciding the alignment amount between the SEPs or the distortion correction amount of an image is included in the overlapping region. Further the invention is characterized in that in evaluating whether or not the edge of the pattern is included in the overlapping region, an estimated imaging shift amount in imaging the SEP is input, and only the edge of the pattern, which is not out of the overlapping region even when an imaging shift for the estimated imaging shift amount occurs, is evaluated.

[0019] That is, in order to obtain a seamless panorama image by correcting the imaging shift occurring in imaging the SEP, the stitching processing (the mosaic processing) for the SEP images is performed using the pattern included in the overlapping region between the SEPs. Therefore, although the SEPs are set depending on whether or not the pattern suitable for the stitching processing exists in the overlapping region, the pattern, which should have been included in the overlapping region, is out of the overlapping region due to the imaging shift in imaging the SEPs, resulting in the risk of causing failure in the stitching processing. Therefore, in deciding the SEP, an estimated imaging shift amount is input in advance, and only the pattern, which is not out of the overlapping region even when the estimated imaging shift amount occurs, is evaluated to thereby achieve a panorama synthesis processing that is robust against the imaging shift.

[0020] (4) Further the invention is characterized in that in the SEP deciding step, the SEP is decided on the basis of the edge of a pattern included in the overlapping region between the SEPs, the layout of the respective adjustment points and the imaging order of the imaging points (the respective SEPs and the respective adjustment points).

[0021] Generally after deciding the SEP, which is a region to be imaged, the adjustment points for favorably imaging the SEP are set. A panorama image is, however, dense with a plurality of SEPs so that it is sometimes difficult to set the adjustment points not to cause contamination at the given SEPs. Therefore, it is characterized in that not first deciding the SEP but a plurality of SEPs are decided to fill up the EP while tempering whether the layout and combination for the imaging order of the adjustment points including the edge of a pattern advantageous to the stitching processing in the overlapping region and also not causing contamination exist.

[0022] (5) Further the invention is characterized in that the imaging positions of the plurality of local imaging regions (SEP) are distributed to the coordinates on a plurality of cells or a plurality of chips having the same pattern structure.

[0023] Since the overlapping region between the SEPs is imaged at least twice, the influence of contamination becomes greater especially in the second imaging. Further, as described above, the panorama image is dense with the plurality of SEPs, so that it is sometimes difficult to set the adjustment points not to cause contamination on the SEPs. Then, according to the invention, the imaging positions of the SEPs are distributed to the plurality of cells or chips and imaged by utilizing the repetition of a circuit pattern between the cells or the chips, thereby reducing the influence of contamination and also giving a number of alternatives in setting the SEPs and the adjustment points.

[0024] (6) Further the invention is characterized in that imaging of the local imaging regions (SEP) and generation of a panorama image are performed on the plurality of cells or the plurality of chips having the same pattern structure to thereby generate a plurality of panorama images.

[0025] Further the invention is characterized in that a contour line group is calculated from the obtained panorama image group, and an average contour line is calculated from the contour line group. The average contour line group may equalize shape variation due to edge roughness or the like so as to obtain contour line information with less variation.

[0026] (7) Further the invention is characterized in that the layout (the stitching positions) of the SEPs for generating each of the plurality of panorama images described in (6) varies with every panorama image.

[0027] Further, the invention is characterized in that a contour line group is calculated from the obtained panorama image group, and an average contour line is calculated from the contour line group. As to the accuracy of the contour line at the stitching position (the overlapping region) between the SEPs, there is a high risk of lowering the detection accuracy as compared with the contour at the other portions due to the problems of degree of contamination and the stitching accuracy. Since the average contour line is the average of a group of panorama images different in stitching position (overlapping region) between the SEPs, shape errors of the contour lines generated at the stitching parts are equalized so as to obtain contour line information with less variation. The average contour line generated in the (6) and (7) may use the average value of coordinates of the plurality of contour lines corresponding thereto, or after the contour lines having low reliability (for example, the contour lines calculated from the overlapping region) are excluded, the average is taken. There may be a variation in taking the average.

[0028] According to the invention, it is possible to obtain a panorama image synthesis that is robust against contamination and the imaging shift and distortion of an image. Further according to the invention, since the obtained panorama image has wide-field and high resolution, a pattern shape error in the stitching region between the SEPs can be restrained.

[0046] This invention provides a method and a device for synthesizing a panorama image using a scanning charged-particle microscope, which may obtain an image (a wide-field image) in a wide imaging region (EP) using a scanning charged-particle microscope (SEM) for observing a fine semiconductor pattern using a panorama image synthesis technique that is robust against contamination and the imaging shift and distortion of an image with high-resolution (high magnification as much as tens of thousands of times to hundreds of thousands of times). The embodiments of the invention will now be described concerning the case of application to the scanning electron microscope (SEM).

1. SEM

[0047] 1.1 SEM Components

[0048] FIG. 1 shows a block diagram of a configuration outline of the SEM for obtaining a secondary electron image (SE image) or a back scattered electron image (BSE image). The SE image and the BSE image are collectively called an SEM image. Further, the image obtained here includes part or whole of atop down image obtained by applying an electron beam to a measuring object from the vertical direction, or a tilt image obtained by applying an electron beam from the direction of an optional angle of inclination.

[0049] An electron optical system 102 includes an electron gun 103 in the interior, which generates an electron beam 104. The irradiating position of an electron beam and a diaphragm are controlled by a deflector 106 and an objective lens 108 so that after the electron beam 104 emitted from the electron gun 103 is narrowed down by a condenser lens 105, the electron beam is applied and focused to meet at an optional position on a semiconductor wafer 101 which is a sample placed on a stage 121. A secondary electron and a back scattered electron are emitted from the semiconductor wafer 101 to which the electron beam 104 is applied, and the secondary electron separated from the orbit of an irradiating electron beam by an E×B deflector 107 is detected by a secondary electron detector 109. On the other hand, the back scattered electron is detected by back scattered electron detectors 110 and 111. The back scattered electron detectors 110 and 111 are installed in the directions different from each other. The secondary electron and back scattered electron detected by the secondary electron detector 109 and the back scattered electron detectors 110 and 111 are converted to digital signals by A/D converters 112, 113, 114, input to a processing and control part 115, stored in an image memory 117 and subjected to image processing according to an intended purpose by a CPU 116.

[0050] FIG. 2 shows a method of imaging a signal amount of electrons emitted from the upside of the semiconductor wafer. The electron beam is, for example, as shown in FIG. 2(a), scanned in the x and y directions and radiated as indicated by 201 to 203 or 204 to 206. The scanning direction can be varied by changing the deflection direction of the electron beam. Places on the semiconductor wafer irradiated by the electron beams 201 to 203 scanned in the x-direction are respectively indicated by G1 to G3. Similarly places on the semiconductor wafer irradiated by the electron beams 204 to 206 scanned in the y-direction are respectively indicated by G4 to G6. The signal amounts of electrons emitted at the G1 to G6 are respectively brightness values of pixels H1 to H6 in an image 209 shown in FIG. 2(b) (suffixes 1 to 6 in G and H correspond to each other). The reference numeral 208 is a coordinate system indicating the x and y directions on an image. An image frame 209 can be obtained by scanning the interior of the visual field with the electron beam as described. Actually the interior of the visual field is scanned several times according to the same procedure, and the obtained image frames are added and averaged to thereby obtain an image at high S/N ratio. The number of added frames can be set optionally.

[0051] The processing and control part 115 in FIG. 1 is a computer system including the CPU 116 and the image memory 117, which performs the processing and control for sending a control signal to a stage controller 119 and a deflection control part 120 to image an imaging point based on an imaging recipe, or conducting various kinds of image processing to a picked-up image at an optional imaging point on the semiconductor wafer 101.

[0052] The imaging point here in this case includes adjustment points (including some or all of an addressing point (hereinafter referred to as AP), an auto focus point (hereinafter referred to as AF), an auto stigma point (hereinafter referred to as AST), an auto brightness and contrast point (hereinafter referred to as ABCC) and a magnification adjustment point), and a plurality of local imaging regions (hereinafter referred to as SEP) for splitting a wide-range imaging region (a wide range for performing SEM imaging at a high magnification is an evaluation point: EP) and SEM imaging at a high magnification (high resolution). The processing and control part 115 is connected to a processing terminal 118 (including input/output means such as a display, a keyboard and a mouse), and provided with a GUI (Graphic User Interface) for displaying an image or the like to a user, or receiving input from the user. The reference numeral 121 is an XY stage, which moves the semiconductor wafer 101 to enable picking-up of an image at an optional position of the semiconductor wafer. The change of the imaging position using the XY stage 121 is called stage shift, and for example, the change of the observation position by deflecting the electron beam using the deflector 106 is called image shift. Generally the stage shift has a wide movable range, but low positioning accuracy of the imaging position, and on the contrary, the image shift has a narrow movable range, but high positioning accuracy of the imaging position.

[0053] Although the embodiment including two detectors 110, 111 for the back scattered electron beam is shown in FIG. 1, it is possible to eliminate the detector for the back scattered electron beam, decrease the number of the detectors or increase the number of the detectors. As a method of obtaining a tilt image from a measuring object observed from an optional angle of inclination using the device shown in FIG. 1, cited are (1) a method in which the electron beam 104 irradiated from an electronic optical system 102 is deflected, the irradiation angle of the electron beam 104 is inclined to image an inclined image (e.g. JP-A No. 2000-348658 official gazette), (2) method in which the stage 121 itself for moving the semiconductor wafer is inclined (the stage is inclined at a tilt angle 122 in FIG. 1), and (3) a method in which the electronic optical system is mechanically inclined.

[0054] In an imaging recipe creating device 123, according to a method mentioned later, an imaging recipe for deciding a plurality of segmental evaluation points (SEP) obtained by splitting a wide region (a wide-field) evaluation point (EP) and SEM imaged at high magnification (high resolution) is created, and the SEM device is controlled based on the created imaging recipe to perform imaging. The size and coordinates of the SEP, imaging condition, an imaging sequence for imaging the SEPs (the coordinates and imaging order of imaging points; widely, including the size of the imaging point, imaging condition and an adjustment method) and information of a register template concerning the adjustment point such as AP are written in the imaging recipe. An image processor 124 conducts the panorama image synthesis processing using the plurality of imaged SEP images and the contour line extract processing for a circuit pattern from the panorama image. In the shape measurement and evaluation tool server 125, shape measurement and shape evaluation using the panorama image and the contour line are performed. The reference numerals 123, 124, 125 are connected to the processing terminal 126 (including input/output means such as a display, a keyboard and a mouse), and provided with a GUI (Graphic User Interface) for displays the processing result and the like to the user, or receiving input from the user. The reference numeral 127 is a storage, which stores a database of design layout information (hereinafter referred to as design data) of a semiconductor circuit pattern, and the information such as imaged SEP image, generated panorama image, contour line, shape measurement and evaluation result, and imaging recipe can be saved and shared in the database. The processing conducted in the 115, 123, 124 and 125 can be optionally combined and divided to two or more devices or integrated and processed.

[0055] The imaging recipe creating device 123 according to the invention includes: region deciding means for performing a region deciding step; segment evaluation point deciding means for performing a segment evaluation point deciding step; adjustment point deciding means for performing an adjustment point deciding step; and imaging sequence deciding means for performing an imaging sequence deciding step.

[0056] 1.2 System Configuration

[0057] An embodiment of system configuration according to the invention will be described using FIG. 3. In FIG. 3(a), the reference numeral 1101 is a mask pattern design device, 1102 is a mask pattern drawing device, 1103 is an exposure and development device of a mask pattern onto a wafer, 1104 is an etching device for the wafer, 1105 and 1107 are SEM devices described in FIG. 1 and FIG. 2, 1106 and 1108 are SEM control devices respectively controlling the SEM devices, 1109 is an EDA (Electronic Design Automation) tool server, 1110 is a database server, 1111 is a storage storing a database similarly to the 127, 1112 is an imaging recipe creating device similarly to the 123, 1113 is an image processor similarly to the 124, 1114 is a measurement and evaluation tool server for a generated pattern shape similarly to the 125, and these are capable of transmitting and receiving information through a network 1115. The storage 1111 is fitted to the database server 1110, thereby storing and referring some or all of (a) size and coordinates of the EP, (b) design data (mask design data (without/with OPC), wafer transfer pattern design data), (c) imaging recipe generation rule, (d) generated imaging recipe (including Sep and imaging sequence), (e) imaged and generated image (SEP image, panorama image), (f) contour line extracted from an image, (g) simulation pattern, and (h) measurement and evaluation result linking with type, by linking with manufacturing process, date and a data acquiring device and the like, or referring to the same. Although two SEM devices 1105, 1107 are connected to the network as the embodiment in this drawing, in the invention, the imaging recipe can be shared between optional two or more SEM devices by the database server 1111, and the two or more SEM devices can be operated by one time imaging recipe creation. Further, the database is shared by the two or more SEM devices, whereby the past success or failure in imaging or measurement and causes of failure can be accumulated quickly so that referring to this can contribute to favorable imaging recipe generation.

[0058] FIG. 3(b) is a diagram where the 1106, 1108, 1109, 11, 10, 1112 to 1114 in FIG. 3(a) are integrated into one device 1116 as one embodiment. As in the present embodiment, optional functions can be divided to optional two or more devices or integrated to conduct the processing.

[0059] 1.3. SEM Imaging Sequence

[0060] Concerning imaging the SEP using the SEM, an embodiment of a typical imaging sequence (the coordinates and the imaging order of imaging points) including imaging of the adjustment points (including some or all of AP, AF, AST, ABCC or magnification adjustment point) shown in FIG. 4(a) will be described.

[0061] First, in the step S41 of FIG. 4(a), a semiconductor wafer as a sample is mounted on the stage 121 of the SEM device. In the step S42, an origin shifting of the wafer and rotation of the wafer are corrected by observing a global alignment mark on the wafer.

[0062] In the step S43, the stage 121 is moved based on the processing and control of the processing and control part 115, the imaging position is moved to the AP to perform imaging, and a parameter of addressing is obtained to perform addressing based on the obtained parameter. Addressing will be described in here. In the case of observing the SEP, when the SEP is directly observed by stage shift, there is the risk that the imaging position is largely shifted depending on the positioning accuracy of the stage. Therefore in this embodiment, the AP, to which the coordinate values of the imaging point and template (pattern of an imaging point, the data form may be SEM image or design data) are once given in advance for positioning, is observed by stage shift. Since the template is registered in the imaging recipe, hereinafter it is referred to as a registered template. The AP is selected from the peripheral region (movable region by image shift) of the SEP. Further, since the AP is generally a low magnification visual field as compared with the SEP, the risk that all of patterns in the registered template are out of the visual field is low even for just a little shifting of the imaging position. Then the registered template of the AP is matched with the SEM image of the actually imaged AP, whereby the imaging shift amount of the imaging point at the AP can be estimated. The coordinate values of the AP and the SEP are registered in the database 127 and already known, so that the relative displacement vector between the AP and the SEP can be obtained, and also the imaging shift amount of the imaging point at the AP can be also estimated by the above matching. Thus, the relative displacement vector from the AP imaging position to be actually moved to the SEP can be found by subtracting the imaging shift amount from the above relative displacement amount. The SEP can be imaged with high coordinate accuracy by controlling a scanning area of an electron beam without moving the stage to shift the imaging area with high positional accuracy for the relative displacement vector.

[0063] Subsequently, in the step S44, the imaging position is moved to the AF by image shift based on the processing and control of the processing and control part 115 to perform imaging, and a parameter of auto focusing is obtained to perform auto focusing based on the obtained parameter. Although the auto focus processing for clearly imaging the SEP is performed in the step S44 in the flowchart of FIG. 4(a), it may be varied so that AF for similarly clearly imaging the AP is set before the step S43 and the auto focus processing using the AF is performed before imaging the AP or the like (the same will be said with AST and ABCC mentioned later).

[0064] Subsequently, in the step S45, the imaging position is moved to the AST by image shift to perform imaging based on the processing and control of the processing control part 115, and a parameter of an auto stigma adjustment (astigmatism) is obtained to perform auto stigma adjustment based on the obtained parameter.

[0065] Subsequently, in the step S46, the imaging position is moved to the ABCC by image shift to perform imaging based on the processing and control of the processing and control part 115, and a parameter of brightness and contrast adjustment is obtained to perform auto brightness and contrast adjustment based on the obtained parameter (in order to obtain a clear image having suitable brightness value and contrast in imaging the SEP, for example, a parameter such as a voltage value of a photomultiplier tube in the secondary electron detector 109 is adjusted, thereby adjusting so that the highest part and the lowest part of an image signal have full contrast or contrast close thereto). Then, in the step S47, the imaging point is moved to the SEP by image shift to perform imaging.

[0066] FIG. 4(b) illustrates one embodiment of layout of AP310, AF311, AST312 and ABCC313 on an image shift enabling region 308 from the SEP 309. The following variations may be caused: some or all of the steps S43, S44, S45, S46 are eliminated in some cases, the steps S43, S44, S45, S46 optionally exchange places with each other in the order, or some of the AP, AF, AST and ABCC overlap at the coordinates (e.g. the auto focus and auto stigma are performed at the same point).

2. Panorama Image Synthesis Processing Flow

[0067] The panorama image synthesis processing flow that is robust against contamination and the imaging shift and distortion of an image according to the invention will be described using FIG. 5.

[0068] 2.1 Data Input Step

[0069] First, the size and the coordinates of the EP and the design data on the semiconductor circuit pattern are input (the steps S51, S52, respectively). The EP is a wide-range imaging region to be obtained, and as to the coordinates of the EP, the coordinates of a hot spot (a danger point) where device failure is liable to occur, which is detected based on the result of exposure simulation or the like performed in the EDA (Electric Design Automation) tool 1109 are input in some cases, or the coordinates are input depending on a user's own decision (referring to the information on the EDA tool 1109 stored in the database 127 (1111) as needed) in some cases. Further, the user request specifications may be input from the processing terminal 126 and the like as needed (step S53). As the user request specification, the followings may be specified: the size and imaging magnification of the SEP having high resolution divided in the EP; the number of SEPs; distribution or not or combination of distribution of SEP imaging positions to cells or chips; and setting or not of AP/AF/AST/ABCC/magnification adjustment point as the adjustment points. A processing parameter may be input as needed (step S54). As the processing parameter, the following may be specified: stage/image shift estimated error; estimated imaging shift amount after addressing; overlapping region width; and edge amount within overlapping region required for panorama image synthesis processing. In this case, all of the information described as specified information in the step S53 and the step S54 is not necessarily specified.

[0070] 2.2 SEP/Imaging Sequence Estimating and Imaging Recipe Generation Step

[0071] The imaging recipe creating devices 123, 1112 (1116) decide the SEP (number, size, coordinates, distribution of SEP imaging positions to cells or chips), the imaging sequence (adjustment template (AP/AF/AST/ABCC), and an imaging order of imaging points (adjusting point and SEP on the basis of the information input in the steps S51, S52, S53, S54 using the terminal devices 126, 118 in the steps S55, S56 while deciding the information not specified in the step S53 and S54 as needed. In the step S55, in deciding the SEPs as shown in FIG. 6(d), for example, a plurality of SEPs (503-1) to (503-9) are decided so that there is an overlapping region between the adjoining SEPs and the edge of a pattern, which is a key to deciding the alignment amount between the adjoining SEPs or the distortion amount of an image, is included in the overlapping region.

[0072] Thus, whether or not the edge is included in the overlapping region is evaluated by inputting an estimated imaging shift amount in imaging the SEPs, and evaluating only the edge that is not out of the overlapping region even when the imaging shift occurs for the estimated imaging shift amount. That is, the pattern, which should have been included in the overlapping region, is out of the overlapping region due to the imaging shift in imaging the SEPs, resulting in the risk of failure in the stitching processing. Therefore, in the step S55, the imaging recipe creating devices 123, 1112 (1116) achieve the panorama synthesis processing that is robust against the imaging shift in the image processors 124, 1113 (1116) by inputting the estimated shifting amount in advance from the database 127 (1111) acquired from the processing and control part 115 of the SEM and stored and evaluating only the pattern which is not out of the overlapping region even when the estimated imaging shift amount occurs in deciding the SEPs. The imaging recipe creating devices 123, 1112 (1116) can estimate the estimated imaging shift amount on the basis of the stage/image shift estimated error and the estimated imaging shift amount after addressing input from the database 127 (1111) in the step S54, for example. The estimated imaging shift amount after addressing can be estimated on the basis of the AP image imaged in imaging the SEM.

[0073] Further, the imaging recipe creating devices 123, 1112 (1116) perform the steps S55, S56 not independently but interactively according to the edge of a pattern included in the overlapping region between the SEPs, the layout of the adjustment points and the imaging order of imaging points. That is, although normally it is considered to set the adjustment points for favorably imaging the SEPs after deciding the SEPs as the region to be imaged, the panorama image of the invention is dense with the plurality of SEPs, and it is often difficult to set the adjustment points not to cause any contamination at the given SEPs. Therefore, the imaging recipe creating devices 123, 1112 (1116) according to the invention are characterized in that the SEPs are not decided in the first, but as shown in the steps S55, S56, the plurality of SEPs are decided to fill up the EP while tempering whether the combination of the layout and the imaging order of the adjustment points including the edge of a pattern advantageous to the stitching processing in the overlapping region and also not causing contamination exists.

[0074] Further, the imaging recipe creating devices 123, 1112 (1116) according to the invention are characterized in that the imaging positions of the plurality of SEPs can be distributed to the coordinates on a plurality of cells or a plurality of chips having the same pattern structure on a sample. That is, since the overlapping region between the SEPs is imaged at least twice, the influence of contamination becomes greater especially in the second imaging. As in the invention, the panorama image is dense with the plurality of SEPs, so that it is sometimes difficult to set the adjustment points not to cause contamination on the SEPs. Then, the imaging recipe creating devices 123, 1112 (1116) according to the invention can reduce the influence of contamination and also give a number of alternatives in setting the SEPs and adjustment points by utilizing the repetition of a circuit pattern between the cells or the chips to distribute the imaging positions of the SEPs to the plurality of cells or chips and image the same.

[0075] Further, the image processors 124, 1113 (1116) according to the invention are characterized in that imaging of the local imaging regions (SEP) and generation of a panorama image are performed on the plurality of cells or the plurality of chips having the same pattern structure to thereby generate a plurality of panorama images. Further, the invention is characterized in that the layout (the stitching positions) of the SEPs constituting each of the plurality of panorama images can be set to vary with every panorama image (the advantages of generating the plurality of panorama images and varying the layout of the SEPs with each of the plurality of panorama images are mentioned in the description of contour line equalization (step S61) mentioned later).

[0076] Further, the imaging recipe creating devices 123, 1112 (1116) according to the invention are characterized in that some or all of splitting to the SEPs and decision on the imaging sequence (the layout of the imaging points and the imaging order of SEPs) in the steps S55 and S56 are performed based on the design data on the circuit pattern stored in the databases 127, 1111. It needs to be known what pattern exists at least within the EP imaging region in order that the imaging recipe creating devices 123, 1112 (1116) according to the invention decide the SEPs and the imaging sequence. Further, it is considered to arrange the adjustment points in the periphery of the EP within the visual field movable range. In that case, the pattern information on the EP and its periphery needs to be known. For example, it is considered that the pattern of the EP and its periphery is once imaged at low magnification, thereby obtaining the pattern array. However, it causes problems wherein resolution is low, the imaging time is required, and some contamination occurs. Therefore, the imaging recipe creating devices 123, 1112 (1116) according to the invention can obtain the pattern information off-line (dispensing with the imaging unit) by using the design data input in the step S52. Further, as described above, there are a lot of evaluation items to be considered in deciding the SEPs and the imaging sequence, and it takes much time to perform manual optimization. Therefore, the imaging recipe creating devices 123, 1112 (1116) according to the invention are characterized in that the input design data is analyzed by software to thereby automatically decide the SEPs and the imaging sequence.

[0077] The imaging recipe creating devices 123, 1112 (1116) according to the invention save as the imaging recipe the size and coordinates and the imaging condition of the SEPs, the size and coordinates, the imaging condition, the adjustment method and imaging order of various kinds of adjustment points for imaging the EP and the register template (step S57).

[0078] 2.3 Imaging & Panorama Image Synthesis/Contour Line Extract/Contour Line Equalizing Step

[0079] The plurality of SEPs are sequentially imaged based on the imaging recipe created in the step S57 using the SEM (step S58). The image processors 124, 1113 (1116) according to the invention stitch the SEP image groups imaged at the plurality of SEPs, respectively, by the image processing to thereby generate a panorama image in the step S59. The above stitching includes some or all of x and y direction alignment between the SEP images, distortion correction and brightness correction. In the step S60, the contour line of the pattern is extracted from the generated panorama image by the image processing. Further, when a plurality of panorama images are generated in the step S59, the contour line group is calculated from the plurality of panorama images, and the average contour line is calculated from the contour line group (step S61). The average contour line can equalize shape variation due to edge roughness or the like to obtain contour line information with less variation.

[0080] Further, the image processors 124, 1113 (1116) according to the invention set the layout (the stitching positions) of the SEPs constituting the plurality of panorama images to vary with every panorama image. Further, the image processors 124, 1113 (1116) according to the invention calculate the contour line group from the obtained panorama image group and calculate the average contour line from the contour line group. As to the accuracy of the contour line at the stitching position (the overlapping region) between the SEPs, there is a high risk that the detection accuracy is lowered as compared with the contours of the other parts due to the problems in the degree of contamination and the stitching accuracy. Then, since the average contour line is the average of panorama images groups different in stitching position (overlapping region) between the SEPs, shape errors of contour lines occurring at the stitching parts are equalized to obtain contour line information with less variation. As a method of generating the average contour line, it is varied as follows: the average value of coordinates of the plurality of corresponding contour lines may be used; or after the contour lines with low reliability (e.g. the contour line calculated from the overlapping region) is excluded, the contour lines are averaged. Since the plurality of panorama images are thus generated, the imaging recipe generation such as imaging of the SEP images at the plurality of cells or chips having the same pattern structure or variation in overlapping regions between the plurality of panorama images can be performed in the steps S55, S56, S57.

[0081] 2.4 Display/Image and Numerical Data Output & Alteration of Design and Manufacturing Condition

[0082] The image processors 124, 1113 (1116) can display the panorama image and the information on the contour line generated in the steps S59, S60, S61 on the GUI of the processing terminal 126 or the like or output the same as an image or numerical value data. The shape measurement and evaluation tool servers 125, 1114 (1116) can calculate a shape difference between the comparison pattern and the contour line, and display and output the same. As the comparison pattern, the design data on the pattern shape, the past picked-up image picked up for comparison, and simulation result of estimating a real pattern shape from a mask pattern by the EDA tool 1109 or the like can be used.

[0083] The shape measurement and evaluation tool servers 125, 1114 (1116) can alter the design and manufacturing conditions based on the panorama image or the contour line information obtained from the image processors 124, 1113 (1116). For example, in the case of a panorama image of a mask, the pattern shape generated on the mask can be obtained, and high-accuracy simulation estimation of the pattern shape transferred on the wafer taking the pattern shape as input can be achieved (step S64). The shape measurement and evaluation tool servers 125, 1114 (1116) can achieve calculation of a manufacturing error and feedback to the manufacturing condition by comparison between the pattern shape generated on the mask and the design data on the mask (step S65). The shape measurement and evaluation tool servers 125, 1114 (1116) can obtain the pattern shape generated on the wafer when a panorama image of the wafer is obtained from the image processors 124, 1113 (1116), and perform calculation of a manufacturing error, feedback to a manufacturing parameter such as exposure condition (step S66) and further alteration of a mask pattern for a shape error that cannot be corrected completely by alteration of the manufacturing parameter to achieve high yield. As to alteration of the mask pattern, only the OPC pattern is altered (OPC calibration) in some cases, or the layout itself of the circuit pattern is altered in some cases.

3. Details

[0084] The parts requiring detailed description in the processing flow shown in FIG. 5 will now be picked out and a supplementary explanation will be made for the parts.

[0085] 3.1 SEP/Imaging Sequence Generation

[0086] One embodiment of a panorama image in observing a mask with OPC will be described using FIG. 6. FIG. 6(a) is one embodiment in which part of the mask pattern without OPC is displayed, and FIG. 6(b) is a diagram showing one embodiment of a pattern in which OPC is conducted to FIG. 6(a). A correction pattern and an assist pattern commonly called Hammerhead, Serif, and SRAF (Sub Resolution Assist Feature) are added. Further, shape correction based on detailed simulation called model base OPC is often performed so that the pattern shape is complicated. It is necessary to verify that such an OPC pattern is suitably generated on the mask, or that the pattern as designed is transferred onto the wafer by the mask. When disadvantage occurs, it is necessary to further correct the OPC pattern. A dotted line 501 shows one embodiment of an EP range designated by a user. When the EP is a wide range, since it is difficult to obtain a high-resolution image by one time imaging, the imaging recipe creating devices 123, 1112 (1116) decide the SEPs so that the wide-range EP are split into a plurality of SEPs and SEM imaged. FIG. 6(c) shows one embodiment in which the plurality of SEPs are arranged like a grid for the wide-range EP. In the present embodiment, nine SEPs SEP502-1, SEP502-2, . . . SEP502-9 (hereinafter referred to as SEP502-1 to 502-9) are set like a grid to fill up the EP. In FIG. 6(c), hatching is applied to an overlapping region between the SEPs. However, even if the EP is simply split like a grid to set the SEPs, it is often difficult to stitch together the SEPs with high accuracy in the panorama image synthesis. At the SEP502-4, for example, a pattern changing in the y-direction (a pattern edge extending in the x-direction) is not included in the overlapping region, so that even minute y-direction imaging shift occurring in imaging the SEP502-4 cannot be detected. Then, one embodiment in which the positions of the SEPs are corrected so that a pattern changing both in the x-direction and the y-direction is included in the overlapping region of each SEP is shown in FIG. 6(d). Similarly nine SEPs SEP503-1 to 503-9 are arranged to fill up the EP, but any SEP includes a pattern changing both in the x-direction and in the y-direction in the overlapping region. Although only the positions are changed in the embodiment of FIG. 6(d) for FIG. 6(c), it is also possible to change the size of the SEP (change of visual field or magnification; these parameters can be changed in each SEP), and the number of SEPs can be changed (although SEP is 3×3 in FIG. 6(d), it can be set to 4×4). Further, it is not necessary that the layout is limited to such a grid.

[0087] The decision of the imaging sequence (the layout (coordinates) and the imaging order of the imaging points) for imaging the SEP503-1 to 503-9 performed in the step S56 and shown in FIG. 6(d) will next be described using FIG. 7 and FIG. 8. FIG. 7 is one embodiment in which in order to simplify the description, for example, nine AFs 603-1 to 603-9 (indicated in a long dotted-line frame) set corresponding to the SEP602-1 to 602-9 and for example, two APs 604-1 and 604-2 (indicated by a short dotted-line frame) set corresponding to the first SEP602-1 and the SEP 602-4 close to the last are set as the adjustment points for imaging the nine SEPs 602-1 to 602-9 set for obtaining a panorama image of the EP 601. The AF and AP are respectively selected by searching for patterns effective for auto focusing and addressing. As to the AF, for auto focusing, the AF is provided substantially corresponding to each SEP, and as to the AP, since positional shift due to stage shift is corrected, it is provided corresponding to the limited SEP.

[0088] FIG. 8(a) is a diagram showing a comparative example of an imaging sequence, in which the AF603-5 (the adjustment point for imaging the SEP602-5) overlapping the two SEP602-8 and SEP602-9 is imaged before imaging the SEPs 602-8 and 602-9, so that a great deal of contamination occurs at the SEP602-8 and 602-9. In the comparative example of the imaging sequence shown in FIG. 8(a), first, after moving by the stage shift so that the vertical entering position of an electron beam to a wafer is located at the coordinates 605-1 indicated by a cross mark, the visual field is moved to the AP604-1 by the image shift, and addressing is performed at the AP604-1 to thereby detect an imaging shift (the image shift after this is done for the displacement from which the imaging shift is subtracted). Subsequently, the visual field is moved to the AF603-1 by the image shift, and auto focusing is performed. Subsequently, the visual field is moved to the SEP602-1 by the image shift and the SEP602-1 is imaged. Hereinafter similarly auto focusing at the AF603-s and imaging at the SEP602-s are to be repeated with s=2 to 6 in order. Subsequently, after moving by the stage shift so that the vertical entering position of an electron beam to the wafer is located at the coordinates 605-2 indicated by a cross mark, the visual field is moved to the AP604-21 by the image shift, and addressing is performed at the AP604-22 to thereby detect an imaging shift (the image shift after this is done for the displacement from which the imaging shift is subtracted). Subsequently, the visual field is moved to the AF603-7 by the image shift, and auto focusing is performed. Subsequently, the visual field is moved to the SEP602-7 by the image shift and the SEP602-7 is imaged. Hereinafter similarly auto focusing at the AF603-s and imaging at the SEP602-s are to be repeated with s=8, 9 in order. The reason why the vertical entering position of the electron beam is moved to the coordinates 605-2 by the stage shift in the midway is that it is difficult to move the visual field to all of the imaging points (SEPs 602-1 to 602-9, AFs 603-1 to 603-9, APs 603-1, 603-2) by the image shift from the electron beam vertical entering position at a certain point.

[0089] In the comparative example of the imaging sequence shown in FIG. 8(a), however, the 603-5 (the adjustment point for imaging the SEP602-5) overlapping two SEP602-8 and 602-9 is imaged before imaging the SEP602-8 and 602-9, resulting in the problem that a great deal of contamination occurs at the SEPs 602-8 and 602-9. This results from the situation where the plurality of SEPs adjoin each other in the panorama image. For example, the adjustment point 603-5 for imaging the SEP602-5 cannot be arranged without overlapping adjacent SEPs 602-8 and 602-9. That is, the adjustment point 603-5 for imaging the SEP602-5 includes an adjustment pattern for imaging the SEP602-5, and also needs to approach the SEP602-5, so that it has to be arranged overlapping the other SEPs such as SEPs 602-8 and 602-9. Actually, the number of SEPs set for obtaining a panorama image of the EP601 increases, and naturally the number of the adjustment points also increases, so that the adjustment point has to be arranged overlapping the SEP.

[0090] FIG. 8(b) is a diagram showing one embodiment in which the imaging sequence is optimized according to the invention. Generally when the SEPs 602-8 and 602-9 are imaged after imaging the adjustment point 603-5 overlapping the SEPs 602-8 and 602-9, contamination occurs within the images of the SEP602-8 and 602-9, which badly influences the measurement accuracy for the observed pattern shape. On the contrary, various kinds of adjustments at the adjustment point 603-5 tend to be comparatively hardly influenced by the contamination. Then in the imaging sequence according to the invention shown in FIG. 8(b), neither auto focusing at the AF603-5 overlapping the SEPs 602-8 and 6029 performed after imaging the adjustment point 603-4 nor imaging at the SEP602-5 corresponding to the AF603-5 is performed, but auto focusing at the AF603-6 and imaging at the SEP602-6 are performed first. Auto focusing at the AF603-5 overlapping the SEPs 602-8 and 602-9 and imaging at the SEP602-5 corresponding to the AF603-5 are performed after completing the imaging all of the SEPs except the SEP602-5. As described above, this invention is characterized in that the imaging sequence is optimized so that when the layout of the adjustment point (AF603-5) is decided so that its imaging region overlaps SEPs 602-8 and 602-9, the SEP602-5 corresponding to the overlapping adjustment point (AF603-5) is imaged immediately after the adjustment at the overlapping adjustment point (AF603-5) after the SEPs 602-8 and 602-9 are imaged, while the SEPs 602-1 to 602-4, 602-6 to 602-9 except the SEP602-5 corresponding to the adjustment point (AF603-5) meet the condition that imaging at the respective SEPs 602-1 to 602-4, 602-6 to 602-9 is performed immediately after the adjustment at the adjustment points AP604-1, AF603-1 to AF603-6, AP604-2, AF603-7 to AF603-9 for the respective SEPs. Since the imaging regions of the overlapping adjustment point (AF603-5) and the SEP602-5 corresponding to the overlapping adjustment point (AF603-5) do not overlap each other, it is possible to prevent the occurrence of contamination within the image of the SEP602-5 and prevent any influence exerted on the measurement accuracy for the observed pattern shape.

[0091] That is, the invention is characterized in that in the imaging recipe generation for stitching an image group (SEP group) of local imaging regions split to a multiple for a wide-field imaging region (EP) by image processing to generate a panorama image, the layout of the adjustment points and the imaging sequence including the imaging order of the imaging points including the respective SEPs are optimized and decided so that when the layout of an adjustment point is decided so that the imaging region overlaps an optional SEP of the local imaging region group (the SEP group), while the SEPs except the SEP corresponding to the overlapping adjustment point meet the condition that imaging at the respective SEPs is performed immediately after the adjustment at the adjustment point for each of the respective SEPs, the SEP corresponding to the overlapping adjustment point is imaged immediately after adjustment at the overlapping adjustment point after imaging the optional SEP. That is, the invention is characterized in that in the imaging recipe generation for stitching an image group (SEP group) of local imaging regions split into a plurality for a wide-field imaging region (EP) by image processing to generate a panorama image, the layout of the adjustment point and the imaging sequence including the imaging order of the imaging points (the adjustment points and the local imaging regions) are optimized and decided so that when the layout of an adjustment point is decided so that the imaging region overlaps an optional local imaging region (an optional SEP), the overlapping adjustment point is imaged after imaging the optional local imaging region (the optional SEP).

[0092] Incidentally, although the imaging sequence in which two operations of addressing (AP) are respectively performed after the stage shift, and auto focusing (AF) is always performed before imaging each SEP is shown in the embodiment shown in FIG. 7 and FIG. 8(b), the number of times of stage shift, deletion and addition of the adjustment points, the timing of adjustment and the like may be altered freely. For example, the imaging sequence may be altered so that auto focusing (AF) is performed only once before the first imaging of the SEP, and the adjustment points such as AST and ABCC may be added to perform adjustment. Further, as to addressing adjustment (APs 604-1, 604-2), AP having higher power is set, and addressing may be performed not only after the stage shift, but also after image shift.

[0093] Although the description of the present embodiment deals with the optimization of imaging order in the imaging sequence, it is possible to perform the optimization including alterations in the electron beam vertical entering position, the size, coordinates and imaging conditions of the adjustment point and further the size, coordinates and imaging conditions of the SEP. The explanation of the imaging conditions will be supplemented. A probe current, an acceleration voltage, the scanning direction of an electron beam and the like are cited as the imaging conditions, and among them, the scanning direction of the electron beam will be described using FIGS. 9(a) and (b). In order to clearly image a target pattern edge, it is desirable to scan the electron beam in the direction orthogonal to the pattern edge. That is, when a pattern 607 exists extending in the y-direction within the SEP 606 as shown in FIG. 9(a), as the scanning direction of the electron beam, continuous scanning in the x-direction is desirable. As the scanning of the electron beam is typically shown by 608 in FIG. 9(a), it is considered that an image is obtained by continuously scanning the electron beam in the x-direction two or more times while discretely shifting in the y-direction (shifting in the y-direction is typically five times in the drawing). This is called x-direction electron beam scanning. Similarly, FIG. 9(b) is an example of y-direction electron beam scanning. The imaging condition including these electron beam scanning directions is also one of the optimization items in the imaging sequence. The optimization is considered, such as the change of imaging order to continuously image the SEPs uniform in the scanning direction, if possible, so that the scanning direction does not vary with every pattern as described above, or the scanning direction is not changed many times every time the SEP is imaged.

[0094] 3.2 Overlapping Region between SEPs

[0095] A method of calculating an evaluation value in an overlapping region between the adjoining SEPs performed by the image processors 124, 1113 (1116) according to the invention will be described using. FIG. 10. In the overlapping region having high evaluation value, the stitching processing between the SEPs (x and y direction alignment, distortion correction, brightness correction part or all) can be favorably conducted, so that a seamless panorama image can be generated. Therefore, the evaluation value can be one of criterion for judgment when the imaging recipe creating devices 123, 1112 (1116) according to the invention decide the SEP and the imaging sequence.

[0096] In order to align the SEP with each other in the x and y directions, it is desirable that the pattern edges extending in the x and y directions are included in an overlapping region 703 (a hatched region) between the SEP 701, 702 as shown in FIG. 10(a) to detect the imaging shift when imaging shift occurs in the x and y directions (mainly the edge extending in the x-direction is included in a pattern 704 and the edge extending in the y-direction is included in a pattern 705). An evaluation method is considered, in which a high evaluation value is thus given to an overlapping region where the edges extending in the x and y directions are enough included.

[0097] It is, however, sometimes difficult to set the SEPs so that patterns changing both in the x-direction and the y-direction are included in one overlapping region. Then, as shown in FIG. 10(b), as to the alignment for the SEP 706, the x-direction alignment is performed in an overlapping region of a SEP 708 (including a pattern 712 extending in the y-direction), and the y-direction alignment is performed in an overlapping region of a SEP 707 (including a pattern 710 extending in the x-direction) to thereby achieve alignment both in the x-direction and in the y-direction. Thus, an evaluation method is considered, in which a high evaluation value is given to an overlapping region where the alignment can be achieved using a plurality of overlapping regions.

[0098] In the case of correcting distortion of an image in the SEP image, it is desirable that patterns to be aligned are equally distributed in an overlapping region of the SEPs. FIG. 10(c) shows the picked-up images 713, 714 of the two adjoining SEPs. In the present embodiment, a big distortion occurs in both of the images. FIG. 10(d) shows the result of stitching together the picked-up images 713, 714. An overlapping region is a hatched region 721, and two patterns 715, 718 in FIG. 10(c) are stitched to form a pattern 722 in FIG. 10(d). The same processes are applied to the two patterns 716, 719 to form the pattern 723, and the two patterns 717, 720 to form the pattern 724. The reason why both the images 713 and 714 can be suitably subjected to distortion correction and stitched together as shown in FIG. 10(d) is that the patterns to be aligned are equally distributed in the overlapping region 721 (for example, it is probably difficult to correct distortion of the SEPs 706, 707 using only the overlapping region 709 in FIG. 10(b)). It is considered that the distribution of patterns is thus reflected in the evaluation value on the overlapping region.

[0099] Further, the present invention is characterized in that imaging shift is taken into consideration in evaluating a pattern included in an overlapping region. That is, when an imaging shift 802a in the x-direction and an imaging shift 802b in the y-direction occur as shown in FIG. 11(a), as to the specified SEP imaging position 801, the actual imaging position is 803 which is indicated by a dotted line frame. Therefore, when it is assumed that an overlapping region with another SEP exists within the hatched region in FIG. 11(a) and the stitching process is performed depending on patterns included in the overlapping region within the hatched region, the stitching process results in failure (because the pattern assumed to be used for the stitching process is out of the overlapping region due to the imaging shift). Then, the imaging recipe creating devices 123, 1112 (1116) according to the invention set an inhibit region 805 (indicated by a dotted line frame) having a width 804 from the periphery of an SEP 801 as shown in FIG. 11(b), so that the patterns in the space from the periphery of the SEP to the dotted line frame are not evaluated to thereby select an SEP that is robust against the imaging shift of the width 804. FIG. 11(b) shows another SEP 806, and the SEP 806 is also provided with an inhibit region 807, whereby a pattern evaluated as a key to the stitching processing between the SEPs 801, 806 is only the pattern included in the hatched region in FIG. 11(b). As a value of the width 804, an estimated imaging shift can be used. The vicinity of the periphery of the SEM image often becomes unstable, so that it cannot be used for measurement. Therefore, the vicinity of the periphery may be used as a value of the width 804. Further, a larger one between the estimated imaging shift amount and the vicinity of the periphery may be taken as a value of the width 804.

[0100] 3.3 Distribution of SEP to Cell/Chip

[0101] The imaging recipe creating devices 123, 1112 (1116) according to the invention is characterized by distributing the imaging positions of a plurality of SEPs in deciding (S55) the plurality of split SEPs to the coordinates on a plurality of cells or a plurality of chips having the same pattern on a sample in order to reduce the occurrence of contamination in an overlapping region between the SEPs. FIG. 12(a) shows nine SEPs 902-1 to 902-9 set for obtaining a panorama image of an EP 901. However, since the overlapping regions between the SEPs 902-1 to 902-9 are imaged at least twice, a great deal of contamination occurs. Then, the imaging positions of the SEPs 902-1 to 902-9 are, as shown in FIG. 12(b), respectively distributed on chips 904-1 to 904-9. Since the patterns of the same design are repeatedly created on the respective chips arranged on a wafer 903, imaging can be performed at positions corresponding to the respective SEPs in the respective chips in the imaging process, so that the occurrence of contamination in the overlapping regions can be reduced.

[0102] Further when it is taken into consideration that the workmanship of a pattern is occasionally different in a plane, it is desirable to perform the above distribution in a local range if possible. Then, according to the invention, instead of the chips, the imaging positions of the plurality of SEPs may be distributed to cells repeated in the chip. A combination of SEPs to be distributed may be varied. That is, according to the invention, the respective SEPs may be all distributed to different cells or chips as shown in FIG. 12(b), and the SEPs may be combined like a check to distribute the imaging positions as shown in FIGS. 13 (a), (b). In FIGS. 13(a), (b), in the imaging process, the SEPs 902-1, 902-3, 902-5, 902-7 and 902-9 are taken as one combination (set 1), and imaged at one cell or chip, and the other SEPs 902-2, 902-4, 902-6, 902-8 are taken as another combination (set 2), and imaged at another cell or chip different from the above one cell or chip. Imaging is thus performed, so that although a great deal of contamination occurs in the overlapping region between the SEPs included in the set 1 and in the overlapping region between the SEPs included in the set 2, the occurrence of contamination in the other overlapping regions can be restrained. This combination of sets of SEPs may be set optionally.

[0103] 3.4 Generation of Multiple Panorama Images

[0104] The image processors 124, 1113 (1116) according to the invention are characterized in that in the mosaic process, a panorama image is generated on a plurality of cells or a plurality of chips having the same pattern structure on a sample to generate a plurality of panorama images. As a result, as shown in FIG. 14, for example, at three chips 1002-1 to 1002-3, images are picked up to generate a panorama image, and three corresponding contour lines 1003-1 to 10003-3 can be obtained from the panorama image (the contour line is one pattern included in the panorama imaging region that is extracted for explanation). The respective contour lines somewhat vary in shape due to edge roughness or the like. Then, the three contour lines 1003-1 to 1003-3 are equalized to obtain a less varying contour line 1004.

[0105] Further, there is high risk that the accuracy of the contour line in the overlapping region between the SEPs is lowered in the detection accuracy as compared with the contour lines of the other parts due to problems in degree of contamination and stitching accuracy. Then, the image processors 124, 1113 (1116) according to the invention are characterized in that in the above generation of multiple panorama images, the stitching position of the constituting SEPs varies with every multiple panorama images. An embodiment of splitting for SEPs different in overlapping region is shown in FIGS. 15(a), (b). The same EP 1005 is split like SEPs 1006-1 to 1006-9 in FIG. 15(a), and like SEPs 1007-1 to 1007-9 in FIG. 15(b). Although an overlapping region in FIG. 15(a) and an overlapping region in FIG. 15(b) partly overlap each other, the overlapping area is small, so that a stitching error or the like can be reduced by equalization. FIG. 15(c) shows the condition where FIG. 15(a) and FIG. 15(b) are superposed one on the other at the corresponding coordinates. A region painted black in FIG. 15(c) is an overlapping region of the overlapping region of FIG. 15(a) and the overlapping region of FIG. 15(b).

[0106] Further, as shown in FIG. 15(d), it is possible to combine the distribution of SEPs described using FIG. 12 and FIG. 13 with the generation of multiple panorama images described using FIG. 14 and FIG. 15. That is, FIG. 15(d) is an embodiment in which nine SEPs constituting one panorama image are distributed to chips 1010-1 to 1010-9 and imaged, similar imaging is performed at chips 1011-1 to 1011-9 (concerning the 1010-a, 1011-b, at chips having suffixes a, b that are the same, the SEPs having the same relative positions at the chip coordinates are imaged), thereby generating two panorama images having the patterns of the same design.

5. GUI

[0107] FIG. 16 shows an embodiment of a GUI such as processing terminals 126 and 118 for setting or displaying input and output information according to the invention. Various kinds of information pieces written on one screen in a window 1201 in FIG. 16 can be divided into windows by an optional combination and displayed on a display or the like. The signs ** in FIG. 16 designate an optional numerical value (or a character string) and a range of a numerical value input or output to a system.

[0108] In a box 1204, the size, coordinates and imaging conditions of the EP are displayed. In a window 1205, the number, size and imaging conditions of SEPs, and a chip ID of the imaging position are displayed. In a window 1206, an imaging sequence is displayed. To be specific, the size, and coordinates of the imaging point, the imaging conditions, the chip ID, the imaging order and the like are displayed. In a window 1207, the deciding conditions of the SEP and the imaging sequence are displayed. To be specific, an estimated stage/image shift error, an estimated imaging shift amount after addressing, a width of an overlapping region, an edge amount in the overlapping region and the like are displayed. In check boxes in a window 1208, setting or not of an adjustment template, optimization or not of imaging order, distribution or not of SEP imaging positions to cells/chips and the like are displayed. Some or all of the setting items of the above 1204 to 1208 are set as needed, and a SEP decision button 1209 and an imaging sequence decision button 1210 are pressed to thereby decide the SEPs and the imaging sequence based on the set items. It is not necessary to designate all of the setting items in the above 1204 to 1208, the system decides the SEPs and the imaging sequence to meet the designated items. Concerning the items not designated, estimation and setting can be performed in the interior of the system as needed. Therefore, the boxes, the windows and the check boxes 1204 to 1208 serve as inputting means for parameters and also as display means for the parameters set in the interior of the system. The decided SEPs and imaging sequence can be visualized and displayed in the window 1202. The diagram in the window 1202 is the same as FIG. 6(a), so the description is eliminated.

[0109] Further it is possible to display a target pattern such as a panorama image generated in a window 1203, and overlay and display the target pattern and a comparative pattern. As the target pattern, a picked-up image (an SEP image/a panorama image), a contour line extracted from the image, an equalized contour line calculated using a plurality of panorama images and the like can be selected by a window 1211 and displayed. Further, as the comparative pattern, mask design data (without OPC/with OPC), wafer transfer pattern design data, simulation pattern and the like can be selected by a window 1212, and overlaid and displayed to the target pattern. Further, an image output button 1213, a contour line image output button 1214, and a contour line coordinates output button 1215 are pressed to thereby output the respective data.

[0110] The information displayed in the window 1203 of FIG. 16 is displayed to an enlarge scale in FIG. 17. FIG. 17(a) is an overlay display of a panorama image (a picked-up image) or a contour line 1302 (indicated by a solid line) in the case of observing an EP 1301 on a mask and design data 1303 on the mask (indicated by a dotted line). FIG. 17(b) is an overlay display of a panorama image (a picked-up image) or a contour line 1305 (indicated by a solid line) in the case of observing an EP 1304 on a wafer and design data 1306 on a pattern transferred onto the wafer (indicated by a dotted line).

[0111] Although the description of the above embodiment deals with the method of obtaining a wide range contour line information by generating a panorama image and then extracting the contour line of a circuit pattern from the panorama image, this is not restrictive in the invention. A contour line group may be extracted from the picked-up images of a plurality of SEPs, and then the contour line groups may be stitched to thereby obtain a wide range contour line information.

[0112] Further, although the description of the embodiment deals with the system using the SEM (Scanning Electron Microscope), this is not restrictive in the invention, but the invention may be applied to the scanning charged-particle microscope such as SIM (Scanning Ion Microscope) or STEM (Scanning Transmission Electron Microscope).

[0113] According to the described embodiment of the invention, the pattern shape generated on the mask can be obtained from the panorama image obtained by observing the mask, and the pattern shape is input to achieve high-accuracy simulation prediction for a pattern shape to be transferred onto the wafer. Further, according to the embodiment of the invention, calculation of a manufacturing error and feedback to the manufacturing condition are achieved by comparison between the pattern shape generated on the mask and the design data on the mask.

[0114] Further, according to the embodiment of the invention, the pattern shape generated on the wafer from the panorama image obtained by observing the wafer can be obtained, and compared with the design data on the generated pattern to thereby calculate a manufacturing error, feedback to a manufacturing parameter such as exposure condition, and further alter the mask pattern for the shape error that cannot be corrected perfectly by alteration of the manufacturing parameter, so that high yield can be achieved.

[0115] The super resolution exposure technology represented by optical proximity correction (OPC) has been introduced because of decrease in design margin caused by advance to the microstructure and high densification of the semiconductor device. A mask pattern becomes complicated with this introduction, so it is more important to simulate and estimate a pattern shape transferred onto a wafer and inspect an actually transferred pattern shape. This invention provides the method of obtaining a wide-field and high resolution image using the scanning charged-particle microscope. The design of a semiconductor device pattern and the feedback to a manufacturing process are enabled by inspecting the wide-field and high resolution image and the pattern shape using the image.

• [0116] 101 . . . Semiconductor wafer
• [0117] 102 . . . Electronic optical system
• [0118] 103 . . . Electron gun
• [0119] 104 . . . Electron beam (primary electron)
• [0120] 105 . . . Condenser lens
• [0121] 106 . . . Deflector
• [0122] 107 . . . E×B deflector
• [0123] 108 . . . Objective lens
• [0124] 109 . . . Secondary electron detector
• [0125] 110, 111 . . . Back scattered electron detector
• [0126] 112˜114 . . . A/D converter
• [0127] 115 . . . Processing and control part
• [0128] 116 . . . CPU
• [0129] 117 . . . Image memory
• [0130] 118, 126 . . . Processing terminal
• [0131] 119 . . . Stage controller
• [0132] 120 . . . Deflection control part
• [0133] 121 . . . Stage
• [0134] 122 . . . Stage tilt angle
• [0135] 123 . . . Imaging recipe creating device
• [0136] 124 . . . Image processor
• [0137] 125 . . . Shape measurement and evaluation tool server
• [0138] 127 . . . Database (storage)
• [0139] 201˜206 . . . Entering direction of converged electron beam
• [0140] 207 . . . Sample surface
• [0141] 208 . . . Image coordinate system
• [0142] 209 . . . Image
• [0143] 308 . . . Image shift movable range from SEP
• [0144] 309 . . . SEP
• [0145] 310 . . . AP
• [0146] 311 . . . AF
• [0147] 312 . . . AST
• [0148] 313 . . . ABCC
• [0149] 501 . . . EP
• [0150] 502-1˜502-9, 503-1˜503-9 . . . SEP
• [0151] 601, 606, 609 . . . EP
• [0152] 602-1˜602-9 . . . SEP
• [0153] 603-1-603-9 . . . AF
• [0154] 604-1, 604-2 . . . AP
• [0155] 605-1, 605-2 . . . Electron beam vertical entering position
• [0156] 607, 610 . . . Circuit pattern
• [0157] 611 . . . Electron beam scanning
• [0158] 701, 702, 706˜708, 713, 714 . . . EP
• [0159] 704, 705, 710, 712, 715˜720, 722˜724 . . . Circuit pattern
• [0160] 801, 806 . . . EP
• [0161] 802a, 802b . . . Imaging shift
• [0162] 803 . . . Actual EP imaging position
• [0163] 804 . . . Inhibit region width
• [0164] 805, 807 . . . Inhibit region
• [0165] 901 . . . EP
• [0166] 902-1˜902-9 . . . SEP
• [0167] 903 . . . Wafer
• [0168] 904-1˜-904-9 . . . Chip
• [0169] 1001, 1009 . . . Wafer
• [0170] 1002-1˜1002-3, 1010-1˜1010-3, 1011-1˜1011-3 . . . Chip
• [0171] 1003-1˜1003-3 . . . Contour line
• [0172] 1004 . . . Average contour line
• [0173] 1005 . . . EP
• [0174] 1006-1˜1006-9, 1007-1˜1007-9 . . . SEP
• [0175] 1101 . . . Mask pattern design device
• [0176] 1102 . . . Mask pattern drawing device
• [0177] 1103 . . . Exposure and developing device
• [0178] 1104 . . . Etching device
• [0179] 1105, 1007 . . . SEM device
• [0180] 1106, 1108 . . . SEM control device
• [0181] 1109 . . . EDA tool server
• [0182] 1110 . . . Database server
• [0183] 1111 . . . Database
• [0184] 1112 . . . Imaging recipe creating device
• [0185] 1113 . . . Image processor
• [0186] 1114 . . . Shape measurement and evaluation tool server
• [0187] 1115 . . . Network
• [0188] 1116 . . . EDA tool, database management, imaging recipe creation, image processing, shape measurement and evaluation tool, Integration server and arithmetic device for SEM control
• [0189] 1201 . . . GUI screen
• [0190] 1202 . . . SEP and imaging sequence display screen
• [0191] 1203 . . . Target pattern and comparison pattern display screen
• [0192] 1204 . . . EP size, coordinates and imaging condition information display box
• [0193] 1205 . . . SEP information display window
• [0194] 1206 . . . Imaging sequence display window
• [0195] 1207, 1208 . . . SEP/Imaging sequence deciding condition setting window
• [0196] 1209 . . . SEP deciding button
• [0197] 1210 . . . Imaging sequence deciding button
• [0198] 1211 . . . Target pattern display setting window
• [0199] 1212 . . . Comparison pattern display setting window
• [0200] 1213 . . . Image output button
• [0201] 1214 . . . Contour line image output button
• [0202] 1215 . . . Contour line coordinate output button
• [0203] 1301, 1304 . . . EP
• [0204] 1302 . . . Picked-up image on mask
• [0205] 1305 . . . Picked-up image on wafer
• [0206] 1303 . . . Design data on mask
• [0207] 1306 . . . Design data on wafer