Disk drive correcting high order gray code using track estimator and decoding low order track code separately

[0001] Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and embedded servo sectors. The embedded servo sectors comprise head positioning information (e.g., a track ID) which is read by the head and processed by a servo controller to control the velocity of the actuator arm as it seeks from track to track.

[0002] FIG. 1 shows a prior art format of a disk 2 comprising a plurality of concentric tracks 4 having embedded servo sectors 6₀-6_N. Each servo sector (e.g., servo sector 6₄) comprises a preamble 8 for synchronizing gain control and timing recovery, a sync mark 10 for synchronizing to a data field 12 comprising the coarse head positioning information (such as a Gray coded track ID), and servo bursts 14 which provide fine head positioning information.

[0003] As the head passes over a servo sector, the head positioning information is processed to estimate the radial location of the head. The servo controller may comprise a state estimator which processes the detected head position to estimate various states of the head, such as its position, velocity, and acceleration. The estimated states may be compared to target values in a seek profile, wherein the error between the estimated states and target states is processed to generate a control signal applied to the VCM in order to move the head in a direction and velocity that reduces the error.

[0004] If the disk surface comprises defective servo sectors (which may be detected during a manufacturing procedure), the associated wedges of user data may be relocated to spare data sectors, or the entire data track may be relocated to a spare data track. However, relocating data wedges and/or data tracks is undesirable since it reduces the overall capacity of the disk and may also impact performance when seeking to the spare data wedges or spare data tracks. The state estimator in the servo controller will typically filter out miss-detected servo sectors during seek operations; however, if multiple sequential servo sectors are miss-detected during a seek, it may degrade performance by increasing the settle time. In addition, if the servo controller encounters a miss-detected servo sector while tracking the centerline of a data track during an access operation, the operation may be aborted and retried (particularly during write operations) which impacts performance due to the slipped revolutions.

[0014] FIG. 2A shows a disk drive according to an embodiment of the present invention comprising a head 16 actuated over a disk 18 comprising a plurality of tracks 20 defined by a plurality of servo sectors (22₀-22_N). The disk drive further comprises control circuitry 24 operable to execute the flow diagram of FIG. 2B, wherein an estimated track ID (TID) is generated representing an estimated radial location of the head (step 26). A high order Gray code (GC) in a first servo sector (FIG. 2C) is detected (step 28), and errors in the high order Gray code are corrected using the estimated track ID to generate a corrected Gray code (step 30). The corrected Gray code is decoded into a first part of a detected track ID (step 32). A low order track code (TC) is detected in the first servo sector (step 34), and the low order track code is decoded into a second part of the detected track ID (step 36). The first part of the detected track ID is combined with the second part of the detected track ID (step 38).

[0015] In the embodiment of FIG. 2A, the control circuitry 24 processes a read signal 40 emanating from the head 16 to demodulate the servo sectors 22₀-22_N and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. The control circuitry 24 filters the PES using a suitable compensation filter to generate a control signal 42 applied to a voice coil motor (VCM) 44 which rotates an actuator arm 46 about a pivot in order to actuate the head 16 radially over the disk in a direction that reduces the PES. The servo sectors 22₀-22_N may comprise any suitable position information, such as a track address for coarse positioning and servo bursts for fine positioning.

[0016] FIG. 3 shows control circuitry according to an embodiment of the present invention including a read channel 48 that detects an estimated data sequence 50 from the read signal 40 generated as the head passes over a servo sector. The high order Gray code bits in the estimated data sequence 50 are corrected using a track ID estimator 52 to generate a corrected Gray code 54. A high order Gray code decoder 56 decodes the corrected Gray code 54 into a first part of a detected track ID 58. A low order track code decoder 60 decodes the low order track code bits in the estimated data sequence 50 into a second part of the detected track ID 62. The first part of the detected track ID 58 is combined with the second part of the detected track ID 62 to generate a detected track ID 64 representing a detected radial location of the head.

[0017] In one embodiment, during a seek operation a seek profile 68 is generated in response to a current track ID the head is over and a target track ID corresponding to an access command. The seek profile 68 comprises a reference state (e.g., position and or velocity). A control signal generator 66 processes the reference state and the detected track ID 64 to generate the control signal 46 applied to the VCM 44. The track ID estimator 52 processes the VCM control signal 46 in order to generate the estimated track ID representing an expected radial location of the head based on known parameters of the VCM servo system.

[0018] In the embodiments of the present invention, the high order Gray code represents the more significant bits of the track ID in a servo sector, and the low order track code represents the least significant bits of the track ID. Accordingly, the high order Gray code bits change at a much slower frequency than the low order track code bits as the head moves radially over the disk during a seek operation. This attribute makes errors in the high order Gray code readily correctable using the track ID estimator while achieving a high density of the Gray coded bits, whereas errors in the low order track code are more likely miscorrected using the track ID estimator. Therefore, a more accurate technique is employed to correct the low order track code while accepting a reduction in format efficiency. In one embodiment, the low order track code represents only a few bits of a servo sector track ID and therefore there is a minimal reduction in overall format efficiency while achieving a more accurate track ID detection algorithm.

[0019] FIG. 4A illustrates an embodiment of the present invention wherein the high order Gray code comprises a plurality of bits recorded at a first linear density, and the low order track code comprises a plurality of Gray coded bits recorded at a second linear density lower than the first linear density. In the example shown in FIG. 4A, the Gray coded bits in the low order track code are recorded at half the linear density than the Gray coded bits in the high order Gray code. Reducing the linear density of the low order track code reduces errors in detecting the Gray coded bits (e.g., by reducing inter-symbol interference). In addition, there is a minimal reduction in format efficiency since only a few of the least significant bits (three in the example of FIG. 4A) are recorded at a lower density.

[0020] In an alternative embodiment, the low order track code comprises a plurality of redundancy bits such that at least one bit error is corrected when decoding the low order track code into the second part of the detected track ID. In one embodiment, the low order track code comprises codewords having sufficient distance to enable correction of one or more of the detected bits. FIG. 4B illustrates an example of this embodiment wherein the three least significant bits of a track ID are encoded into a Gray codeword, and then each bit of the Gray codeword is encoded such that a “0” bit encodes into “000” and a “1” bit encodes into “111”. When decoding the detected low order track code, any single bit error within every three bits is corrected as illustrated in FIG. 4C. The code rate in this example is 1/3, but the overall reduction in format efficiency is not significant since only a few of the least significant bits of the track ID are encoded into the low order track code (three bits in the example of FIG. 4B). The remaining most significant bits of the track ID are encoded into the high order Gray code having a code rate of 1/1, wherein errors are corrected by the track ID estimator.

[0021] In the examples of FIGS. 4A and 4B, the higher order Gray code bits and the low order track code bits are shown as written without any gap between the two. In an alternative embodiment (not shown), the high order Gray code bits may be written to the disk, followed by a gap, followed by the low order track code bits. The gap may optionally include synchronization information, such as a preamble and a sync mark for synchronizing to the low order track code bits.

[0022] FIG. 5A illustrates an example algorithm for implementing the track ID estimator, wherein after generating an estimated track ID 70 (represented in binary (BIN)), a plurality of proximate track IDs are generated having values proximate the estimated track ID (e.g., track_ID−1 72A and track_ID+1 72B). The estimated track ID and the proximate track IDs are encoded 74 into a set of Gray codes 76A, 76B, 76C. At least one bit in the detected high order Gray code is then corrected in response to the set of Gray codes. For example, in one embodiment each Gray code in the set of Gray codes comprises N bits, and M bits out of the N bits comprise the same value 78. Errors in the high order Gray code are corrected by inverting at least one bit in the high order Gray code comprising a value that is different from the value of the corresponding bit in the M bits 80.

[0023] The algorithm described above with reference to FIG. 5A is illustrated in FIGS. 5B-5D. The first row of FIG. 5B illustrates an estimated track ID generated by the track ID estimator, and the next two rows show corresponding proximate track IDs. The fourth row shows a bit map of the common bits between the track IDs in the first three rows. The fifth row shows the estimated track ID with don't care bits representing the non-matching bits in the first three rows. The sixth row shows an example high order Gray code detected from the read signal, and the seventh row shows a bit in the detected high order Gray code that is different from the bits in row fifth row. The eighth row shows a bit map used to invert the different bit, and the ninth row shows the corresponding bit inverted in the detected high order Gray code, thereby correcting the one bit error.

[0024] FIG. 5C illustrates a number of detected high order Gray codes having a single bit error, and the possible track IDs that are decoded before correcting the single bit error and after correcting the single bit error (last row). FIG. 5D illustrates a number of detected high order Gray codes having two bit errors, and the possible track IDs that are decoded before correcting the two bit errors and after correcting the two bit errors (last row). Although in the above examples the track ID estimator generates two proximate track IDs (track_ID+1 and track_ID−1), any suitable number of proximate track IDs may be generated, where increasing the number of proximate track IDs increases the number of don't care bits.

[0025] An embodiment of the present invention may also comprise a method of writing a track ID in servo sectors of a disk drive to define a plurality of tracks on a disk. In one embodiment, the method comprises encoding a plurality of most significant bits of the track ID into a first plurality of high order Gray code bits, and writing the high order Gray code bits to the disk at a first linear density (FIG. 4A). The method further comprises encoding a plurality of least significant bits of the track ID into a second plurality of low order Gray code bits, and writing the second plurality of low order Gray code bits to the disk at a second linear density lower than the first linear density (FIG. 4A).

[0026] In another embodiment, the method of writing a track ID in servo sectors of a disk drive to define a plurality of tracks on a disk comprises encoding a plurality of most significant bits of the track ID into a plurality of high order Gray code bits, and writing the high order Gray code bits to the disk (FIG. 4B). The method further comprises encoding a plurality of least significant bits of the track ID into a plurality of low order track code bits, wherein the low order track code bits include a plurality of redundancy bits for correcting at least one bit error in the least significant bits of the track ID, and writing the plurality of low order track code bits to the disk (FIG. 4B).

[0027] Any suitable technique may be employed to write the track ID in the servo sectors of a disk drive. In one embodiment, an external servo writer or media writer may be employed to write the track ID in the servo sectors according to the embodiments of the present invention. Alternatively, the control circuitry within each production disk drive may write the track ID in the servo sectors during a self servo writing operation. In yet another embodiment, the track ID may be written in the servo sectors using a suitable stamping or patterning technique prior to inserting the disk into the disk drive.

[0028] Any suitable control circuitry may be employed to implement the flow diagrams in the embodiments of the present invention, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain steps described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.

[0029] In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the steps of the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.