Thermal interface material having a patterned carbon nanotube array and method for making the same

[0001] 1. Technical Field

[0002] The present disclosure relates to a thermal interface material and a method for fabricating the same, and particularly to a thermal interface material having a patterned carbon nanotube array and a method for fabricating the same.

[0003] 2. Description of Related Art

[0004] Many electronic components such as semiconductor chips are becoming progressively smaller with each new product release, while at the same time the heat dissipation requirements of these kinds of components are increasing due to their improved ability to provide more functionality. Commonly, a thermal interface material is utilized between an electronic component and a heat sink in order to fill air spaces therebetween and thereby promote efficient heat transfer.

[0005] Carbon nanotubes (CNTs) produced by means of arc discharge between graphite rods were first discovered and reported in an article by Sumio Iijima, entitled “Helical Microtubules of Graphitic Carbon” (Nature, Vol. 354, Nov. 7, 1991, pp. 56-58). An another article authored by Savas Berber, entitled “Unusually High Thermal Conductivity of Carbon Nanotubes” (page 4613, Vol. 84, Physical Review Letters 2000) discloses that a heat conduction coefficient of a carbon nanotube can be 6600 W/mK (watts/milliKelvin) at room temperature. That tends to make CNTs ideal candidates for thermal interface material.

[0006] A method for making the thermal interface material having a CNT array is by diffusing particles with a high heat conduction coefficient therein. The particles can be made of graphite, boron nitride, silicon oxide, alumina, silver, or other metals. However, the diffusing particles can not be uniformly dispersed into the CNT array, because the interspaces therein is small, and interfaces between some diffusing particles and CNTs in the CNT array is high. Therefore, the heat conduction coefficient of the thermal interface material is low and cannot adequately meet the heat dissipation requirements of modern electronic components.

[0007] Another method for making the thermal interface material having a CNT array is by injection molding. In this method, the CNT array is filled with a polymer material. However, the thermal interface material formed by injection molding is relatively thick. This increases a bulk of the thermal interface material, reduces its flexibility. Furthermore, because of the polymer material, the heat conducting efficiency of thermal interface material is low.

[0008] Therefore, a simple method for making a thermal interface material is desired, which is thin, and has a high heat conducting efficiency.

[0017] Referring to FIGS. 1A through 1E, one embodiment of a method for making a thermal interface material 100 having a patterned CNT array 14 is illustrated. The method includes the following steps:

[0018] (a) providing a patterned CNT array 14 on a substrate 10, the patterned CNT array 14 including a plurality of CNT arrays 142 and a plurality of first interspaces 144 defined between two adjacent CNT arrays 142;

[0019] (b) providing a container 20 and disposing the substrate 10 with the CNT arrays 142 into the container 20;

[0020] (c) providing a plurality of low melting point metallic nanoparticles 300 and filling the first interspaces 144 with the low melting point metallic nanoparticles 300;

[0021] (d) heating the low melting point metallic nanoparticles 300 in the container 20 to a liquid state, then combining them with the CNT arrays 142 to form a composite material 80 on the substrate 10;

[0022] (e) peeling off the composite material 80 from the substrate 10, and obtaining a thermal interface material 100.

[0023] Referring to FIGS. 2A through 2C, in step (a), the patterned CNT array 14 can be formed by the substeps of:

[0024] (a1) providing a substantially flat and smooth substrate 10;

[0025] (a2) forming a patterned catalyst layer 12 on the substrate 10, wherein the patterned catalyst layer 12 includes a plurality of catalyst sections 122 with an interval 124 formed between two adjacent catalyst sections 122;

[0026] (a3) annealing the substrate 10 with the patterned catalyst layer 12 at a temperature in a range from about 700° C. to about 900° C. in air for about 30 minutes to about 90 minutes;

[0027] (a4) heating the substrate 10 with the patterned catalyst layer 12 at a temperature in the approximate range from about 500° C. to about 740° C. in a furnace with a protective gas therein; and

[0028] (a5) supplying a carbon source gas in the furnace for about 5 minutes to about 30 minutes and growing the patterned CNT array 14 from the catalyst sections 122 on the substrate 10.

[0029] In step (a1), the substrate 10 can be a P-type silicon wafer, an N-type silicon wafer, or a silicon wafer with a film of silicon dioxide thereon. In one embodiment, a 4-inch P-type silicon wafer is used as the substrate 10.

[0030] In step (a2), the catalyst of the patterned catalyst layer 12 can be made of iron (Fe), cobalt (Co), nickel (Ni), or any alloy thereof. The intervals 124 correspond to the first interspaces 144. Widths of the intervals 124 are in a range from about 10 microns to about 500 microns.

[0031] In one embodiment, the whole substrate 10 is patterned with Fe films 5 nanometers (nm) thick formed by electron beam evaporation through shadow masks, containing squared openings with side lengths of about 10 to about 250 millimeters (mm) at pitch distances of about 50 mm to about 200 mm. Therefore, the patterned catalyst layer 12 including a plurality of the catalyst sections 122 and a plurality of the intervals 124, is formed on the substrate 10.

[0032] In step (a4), the protective gas can be made up of at least one of nitrogen (N₂), ammonia (NH₃), and a noble gas. In step (a5), the carbon source gas can be a hydrocarbon gas, such as ethylene (C₂H₄), methane (CH₄), acetylene (C₂H₂), ethane (C₂H₆), or any combination thereof.

[0033] In step (a5), a CNT array 142 can be grown upon each catalyst section 122, therefore the patterned CNT array 14 including a plurality of the CNT arrays 142 can be achieved on the substrate 10. The plurality of first interspaces 144 is defined between two adjacent CNT arrays 142. Widths of the first interspaces 144 are in a range from about 10 microns to about 500 microns.

[0034] Referring to FIG. 2C, FIG. 3 and FIG. 4, each CNT array 142 can be about 10 microns to about 1 millimeter high and include a plurality of carbon nanotubes substantially parallel to each other and substantially perpendicular to the substrate 10. The CNT arrays 142 are essentially free of impurities, such as carbonaceous or residual catalyst particles. A plurality of second interspaces 146 is defined between the adjacent carbon nanotubes in each CNT array 142. Widths of the second interspaces 146 are in a range from about 20 nm to about 500 nm.

[0035] It is to be understood that the area of the patterned CNT array 14 is in accordance with the area of the substrate 10. Thus, the area of the patterned CNT array 14 can be controlled by adjusting the area of the substrate 10.

[0036] In step (b), the container 20 can be made up of rigid materials with high melting points, such as metal or glass. Referring to FIG. 5, the container 20 includes a first board 21, a second board 22, a third board 23, a fourth board 24, and a basic board 25. The first board 21 is facing and substantially parallel to the third board 23. The second board 22 is facing and substantially parallel to the fourth board 24. The first board 21, the second board 22, the third board 23, and the fourth board 24 are substantially perpendicular to the basic board 25. The first board 21, the second board 22, the third board 23, the fourth board 24, and the basic board 25 together define a space 208.

[0037] In step (b), before disposing the substrate 10 into the container 20, a graphite paper 206 can be disposed in the space 208 of the container 20. In one embodiment, a graphite paper 206 (shown in FIG. 1B and FIG. 1C) is disposed in the space 208, then the substrate 10 with the patterned CNT array 14 is disposed on the graphite paper 206 above the basic board 25.

[0038] In step (c), the material of the low melting point metallic nanoparticles 300 can be indium (In), gallium (Ga), an alloy of antimony (Sb) and bismuth (Bi), an alloy of lead and tin, or any combination thereof. The melting point of the low melting point metallic nanoparticles 300 is below 200° C. The size of the low melting point metallic nanoparticles 300 is in a range from about 10 nanometers to about 2500 nanometers. The first interspaces 144 can be filled up to a level not above free ends of the carbon nanotubes of the CNT arrays 142 with the low melting point metallic nanoparticles 300.

[0039] Step (d) includes the following substeps of:

[0040] (d1) placing the container 20 having the CNT arrays 142 into a chamber, wherein the chamber is at 20-200° C. and filled with at least one inert gas;

[0041] (d2) increasing the temperature of the chamber at a rate of about 5° C. per minute, until the temperature of the chamber is about 150° C. to about 200° C.; and

[0042] (d3) holding the temperature from about 0.2 hours to about 1.5 hours, and melting the low melting point metallic nanoparticles 300 to a liquid state;

[0043] (d4) cooling the chamber to room temperature in an environment of inert gas, holding the room temperature (about 25° C.) for a while until the low melting point metallic nanoparticles 300 in the liquid state are solidified to a solid state low melting point metal matrix 30, and combined with the patterned CNT array 14 to form the composite material 80.

[0044] In step (d3), the liquid state low melting point metal can be dispersed in the first interspaces 144 and the second interspaces 146. The low melting point metallic nanoparticles 300 in a liquid state flow into the second interspaces 146 and the first interspaces 144 simultaneously, or from the first interspaces 144 into the second interspaces 146.

[0045] In step (d4), a thickness of the solid low melting point metal matrix 30 can be controlled by adjusting the quantity of the low melting point metallic nanoparticles 300. In one embodiment, the thickness of the solid melting point metal matrix 30 can be a less than the height of the carbon nanotubes of the patterned CNT array 14. Therefore one portion of the carbon nanotubes of the patterned CNT array 14 is exposed from the composite material 80.

[0046] In step (e), the composite material 80 includes the low melting point metal matrix 30 and the patterned CNT array 14. The low melting point metal matrix 30 is dispersed in the first interspaces 144. The low point metal matrix 30 is combined with the patterned CNT array 14 to form the composite material 80. The composite material 80 can be peeled off from the substrate 10. In one embodiment, a portion of the composite material 80 is peeled off from the substrate using a knife, thereby a thermal interface material 100 is gained.

[0047] Referring to FIG. 6, one embodiment of a thermal interface material 100, formed by the method described above, includes a low melting point metal matrix 30 and a patterned CNT array 14. The patterned CNT array 14 includes a plurality of CNT arrays 142 and a plurality of first interspaces 144. The patterned CNT array 14 is dispersed in the low melting point metal matrix 30. The first interspaces 144 are filled with the low melting point metal matrix 30.

[0048] Each CNT array 142 includes a plurality of carbon nanotubes substantially parallel to each other and substantially perpendicular to the substrate 30. The CNT arrays 142 can have a height of about 10 microns to about 1 millimeter. The first interspaces 144 are defined between the adjacent CNT arrays 142. Widths of the first interspaces 144 are in a range from about 10 microns to about 1 millimeter.

[0049] Referring to FIG. 7, the second interspaces 146 are defined between adjacent carbon nanotubes in each CNT array 142. The low melting point metal matrix 30 is also filled in the second interspaces 146. Widths of the second interspaces 142 are in a range from about 20 nm to about 500 nm.

[0050] The low point metal matrix 30 can be made of indium (In), gallium (Ga), an alloy of antimony (Sb) and bismuth (Bi), an alloy of lead and tin, or any combination thereof. A thickness of the low melting point metal matrix 30 can be in a range from about 10 microns to 1 about millimeter.

[0051] It may be understood that the thickness of the low melting point metal matrix 30 can be less or greater than the height of the carbon nanotubes of the patterned CNT array 14. In one embodiment, the thickness of the low melting point metal matrix 30 is less than the height of the carbon nanotubes of the patterned CNT array 14. Therefore, ends of the carbon nanotubes are exposed out of the thermal interface material 100. This ensures that the carbon nanotubes in the thermal interface material 100 thermally contact an electronic element and a heat sink directly.

[0052] In use, the thermal interface material 100 of the present embodiment can be disposed between an electronic component and a heat spreader. When ambient temperature is above the melting point of the thermal interface material 100, the low melting point metallic matrix 30 changes to a liquid capable of filling the gaps between the electronic component and the heat spreader, and as such, reduces the thermal contact resistance therebetween. The patterned CNT array 14 includes a plurality of first interspaces 144, the low melting point metal matrix 30 is uniformly filled in the first interspaces 144, and the thermal interface material 100 has a higher thermal conductivity. Further, the method for fabricating the thermal interface material 100 is simple and can be applied in mass production at a low cost.

[0053] It is also to be understood that the above description and the claims drawn to a method may include some indication in reference to certain steps. However, the indication used is only to be viewed for identification purposes and not as a suggestion as to an order for the steps.

[0054] Finally, it is to be understood that the above-described embodiments are intended to illustrate rather than limit the disclosure. Variations may be made to the embodiments without departing from the spirit of the disclosure as claimed. The above-described embodiments illustrate the scope of the disclosure but do not restrict the scope of the disclosure.