RFID system and RFID tag thereof

[0001] This Application claims priority of Taiwan Patent Application No. 097118886, filed on May 22, 2008, the entirety of which is incorporated by reference herein.

[0002] 1. Field of the Invention

[0003] The present invention relates to an RFID tag, and in particular relates to an RFID tag having a temperature detecting function.

[0004] 2. Description of the Related Art

[0005] RFID (Radio Frequency Identification) technology is popularly utilized in logistics management to track, monitor and manage storage. A passive RFID tag is popular for its low cost and small volume, wherein a reader emits a tag request signal to induce the RFID tag to generate a tag signal.

[0006] However, some goods need to be stored under a particular temperature environment, such as frozen foods or red wines, and conventional RFID tags do not provide a temperature detection function. Conventionally, a passive RFID tag requires minimal electricity, and does not generate a temperature detecting signal.

[0007] A detailed description is given in the following embodiments with reference to the accompanying drawings.

[0008] An RFID tag is provided. The RFID tag comprises an emitting module, a temperature detecting circuit and a tag chip. The temperature detecting circuit produces a time signal according to a surrounding temperature, wherein the time signal changes with the surrounding temperature. The tag chip is electrically connected to the temperature detecting circuit and the emitting module, wherein the time signal is transmitted via the emitting module.

[0009] Because a conventional passive RFID tag does not have sufficient electricity to directly provide a temperature detection function, in the embodiment of the invention, the RFID tag provides a time signal containing a temperature message. The reader receives the time signal, and decodes the temperature message, and generates a temperature signal. The passive RFID tag of the invention, thus, can monitor temperature.

[0019] The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.

[0020] FIGS. 1a and 1b show an RFID tag 10 and a reader 30 of an RFID system of an embodiment of the invention. The RFID tag 10 comprises a tag antenna 11, a tag chip 12, a diode 14, a capacitor 13, an emitting module 15 and a temperature detecting circuit 20. The diode 14 and the capacitor 13 rectify and filter an induced current generated by the tag antenna 11 to provide electricity to the tag chip 12 and the temperature detecting circuit 20. In one embodiment, the diode 14 and the capacitor 13 are incorporated in the tag chip 12. In one embodiment, the temperature detecting circuit 20 is also incorporated in the tag chip 12. The reader 30 comprises a reader antenna 31, a control circuit 32, a microprocessor 33 and a transforming circuit 40.

[0021] When the control circuit 32 emits a temperature request signal via the reader antenna 31, the tag antenna 11 receives the temperature request signal, and the temperature request signal induces the tag chip 12 controlling the temperature detecting circuit 20 to generate a time signal according to a surrounding temperature. The tag chip 12 controls the emitting module 15 emitting the time signal. Next, the time signal is received by the reader antenna 31, processed by the microprocessor 33, and enters the transforming circuit 40. The transforming circuit 40 transforms the time signal into a temperature signal.

[0022] Because a conventional passive RFID tag does not have sufficient electricity to directly provide a temperature detection function, in the embodiment of the invention, the RFID tag provides a time signal containing a temperature message. The reader receives the time signal, and decodes the temperature message, and generates a temperature signal. The passive RFID tag of the invention, thus, can monitor temperature.

[0023] When the control circuit 32 emits a tag request signal via the reader antenna 31, the tag antenna 11 receives the tag request signal, and the tag request signal induces the tag chip 12 to generate a tag signal. The tag chip 12 controls the emitting module 15 emitting the tag signal. The tag signal is received by the reader antenna 31, processed by the microprocessor 33, and read by the control circuit 32.

[0024] FIG. 2 shows the temperature detecting circuit 20 of the embodiment of the invention, comprising a temperature retardation unit 21, a reference unit 22 and a comparison unit 23. The comparison unit 23 is electrically connected to the temperature retardation unit 21 and reference unit 22. The tag chip 12 is electrically connected to the temperature retardation unit 21, the reference unit 22 and the comparison unit 23. With reference to FIGS. 3a and 3b, when the tag chip 12 sends a pulse signal V_i into the temperature retardation unit 21 and the reference unit 22, the temperature retardation unit 21 generates a retardation signal V_c according to the pulse signal V_i, the reference unit 22 generates a reference signal V_i according to the pulse signal V_i, and the comparison unit 23 generates the time signal V_p according to the retardation signal V_c and the reference signal V_i. The time signal V_p has a time period, the time period changes with the surrounding temperature.

[0025] With reference to FIG. 2, the temperature retardation unit 21 comprises a field effect transistor 211, a capacitor 212 and a first NOT gate 213, the capacitor 212 and the first NOT gate 213 are electrically connected to the field effect transistor 211. When the pulse signal V_i enters the temperature retardation unit 21, the field effect transistor 211 is cut-off, the tag chip 12 provides an input current I_o to the capacitor 212 to linear charge the capacitor 212. An input voltage V_c is thus provided to the first NOT gate 213. The temperature retardation unit 21 outputs the retardation signal V_c when the input voltage V_c exceeds a threshold voltage of the first NOT gate 213. With reference to FIGS. 3a and 3b, the conductivity of the field effect transistor 211 varies with the surrounding temperature, input currents (I_o1 and i_o2) are therefore influenced, and the timing is changed when the high potential is changed to the low potential of the retardation signal V_c. The time periods (T₁ and T₂) of the time signal V_p is thus changed with the surrounding temperature.

[0026] The reference unit 22 comprises a second NOT gate 221, and the pulse signal V_i enters the second NOT gate 221 to be transformed into the reference signal V_i. The comparison unit 23 comprises a NAND gate 231, and the NAND gate 231 outputs the time signal V_p according to the reference signal V_i and the retardation signal V_c.

[0027] FIG. 4 shows a temperature detecting circuit 20′ of another embodiment of the invention, comprising a temperature retardation unit 21′, a reference unit 22′ and a comparison unit 23′. The comparison unit 23′ is electrically connected to the temperature retardation unit 21′ and reference unit 22′. The tag chip 12′0 is electrically connected to the temperature retardation unit 21′, the reference unit 22′ and the comparison unit 23′. With reference to FIG. 5, when the tag chip 12 sends a pulse signal V_i into the temperature retardation unit 21′ and the reference unit 22′, the temperature retardation unit 21′ generates a retardation signal V_c according to the pulse signal V_i, the reference unit 22′ generates a reference signal V_i according to the pulse signal V_i, and the comparison unit 23 generates the time signal V_p according to the retardation signal V_c and the reference signal V_i. The time signal V_p has a time period, and the time period changes with the surrounding temperature.

[0028] The temperature retardation unit 21′ comprises a bipolar transistor 211′, a capacitor 212′ and a NOT gate 213. The capacitor 212′ and the NOT gate 213′ are electrically connected to the bipolar transistor 211′. When the pulse signal V_i enters the temperature retardation unit 21′, the bipolar transistor 211′ is switched on, the pulse signal V_i provides an input current to the capacitor 212′ to linear charge the capacitor 212′. An input voltage V_c is provided to the NOT gate 213′. The temperature retardation unit 21′ outputs the retardation signal V_c when the input voltage V_c exceeds a threshold voltage of the NOT gate 231′. The comparison unit 23′ comprises a NAND gate 231′, and the NAND gate 231′ outputs the time signal V_p according to the reference signal V_i and the retardation signal V_c.

[0029] In the embodiment of the invention, the temperature detecting circuit is realized by the field effect transistor and the bipolar transistor. However, the invention is not limited thereto. The temperature detecting circuit of the invention can also be realized by other electronic elements or designs.

[0030] With reference to FIG. 6, the transforming circuit 40 comprises a logical unit 41, a decaying unit 42 and a counter 43. The logical unit 41 is electrically connected to the decaying unit 42, the decaying unit 42 is electrically connected to the counter 43, the time signal passes the logical unit 41 into the decaying unit 42, the decaying unit 42 reduces the time period of the time signal to generate a feedback signal, the feedback signal is fed back into the logical unit 41, and the counter 43 outputs the temperature signal according to a number of times the feedback signal is fed back.

[0031] The decaying unit 42 comprises a plurality of NAND gates 421, and the NAND gates 421 are serially connected to reduce the time period of the time signal and the feedback signal.

[0032] The logical unit 41 comprises an AND gate 411 and an OR gate 412, the AND gate 411 is electrically connected to the OR gate 412. The time signal passes the AND gate 412 entering the decaying unit 42. The feedback signal enters the logical unit 41 from the decaying unit 42, enters the AND gate 411, and the AND gate 411 compares the feedback signal with a reference potential V_r. If the time period of the feedback signal is not zero, the feedback signal enters the OR gate 412 to be re-fed into the decaying unit 42. If the time period of the feedback signal is zero, the AND gate 411 and the OR gate 412 are disabled.

[0033] FIGS. 7a-7d show a time signal decay process. With reference to FIG. 7a, when the time signal enters the transforming circuit, the time signal has an initial time period Ts. With reference to FIG. 7b, the time signal enters the decaying unit, and the decaying unit reduces the time period of the time signal to generate the feedback signal. The feedback signal has a time period (Ts-Tc), which is achieved by subtracting the timing reference delay line Tc from the initial time period Ts. With reference to FIG. 7c, after the feedback signal is re-fed into the decaying unit, the feedback signal has the time period (Ts-2Tc). With reference to FIG. 7d, after the feedback signal is re-fed into the decaying unit for several times, the time period of the feedback signal is reduced to zero, and the AND gate 411 and the OR gate 412 are disabled.

[0034] In the embodiment of the invention, the temperature detection function is realized by a passive RFID tag. However, the invention is not limited thereto. The design of the invention can also be realized on an active RFID tag with energy saving advantages.

[0035] In the embodiment of the invention, the transforming circuit is realized by the logical unit, the decaying unit and the counter. However, the invention is not limited thereto. The transforming circuit can also be realized by other circuit designs.

[0036] While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.