Writing high frequency pattern over a DC background to detect skip track erasure for a disk drive

[0001] Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and servo sectors. The servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the velocity of the actuator arm as it seeks from track to track.

[0002] When manufacturing a family of disk drives, the head/disk subsystem is typically tested to verify that a particular vendor's head will meet certain design criteria. For example, a vendor's head may be tested to measure a phenomena referred to as Wide-Area Track Erasure (WTE) due to inadequate shielding of the write element. The WTE effect is typically measured by DC erasing a large band of tracks (such as 8,000 tracks), writing a low frequency signal (25 MHz) to a target track within the band of tracks, and then measuring the signal noise in the adjacent tracks. However, there are phenomena other than WTE that need to be measured when evaluating the suitability of a particular vendor's head, or when selecting an operating write current for a particular vendor's head.

[0009] FIG. 1A shows a disk drive according to an embodiment of the present invention comprising a disk 2, and a head 4 actuated over the disk 2. The disk drive further comprises control circuitry 6 for executing the flow diagram of FIG. 1B to detect a skip track erasure event for the head 4 and disk 2. N tracks are DC erased (step 8), and a periodic pattern is written to the disk at a target track within the DC erased tracks (step 10), wherein the periodic pattern is substantially comprised of a high frequency component greater than 450 MHz. After writing the periodic pattern to the target track at least twice, at least two of the DC erased tracks other than the target track are read to generate respective read signals (step 12). The read signals are processed to detect a skip track erasure event (step 14).

[0010] In the embodiment of FIG. 1A, the disk 2 comprises a plurality of data tracks 16 defined by a plurality of embedded servo sectors 18₀-18_N. The control circuitry 6 processes the read signal 20 emanating from the head 4 to demodulate the servo sectors 18₀-18_N and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target data track. The control circuitry 6 filters the PES using a suitable compensation filter to generate a control signal 22 applied to a voice coil motor (VCM) 24 which rotates an actuator arm 26 about a pivot in order to actuate the head 4 radially over the disk in a direction that reduces the PES.

[0011] In one embodiment, the control circuitry 6 writes the periodic pattern to the data sectors of the target track (step 10), and then reads the data sectors. In an alternative embodiment, the control circuitry 6 writes the periodic pattern to the data wedges between consecutive servo sectors (e.g., between servo sectors 18₂ and 18₃). In one embodiment, the servo sectors 18₀-18_N are processed to locate the beginning and end of each data sector or data wedge within the target track.

[0012] Any suitable periodic pattern may be written to the target track, and in one embodiment, the periodic pattern comprises a square wave with a frequency greater than 450 MHz. Other suitable periodic patterns may be employed, such as a square wave having a variable duty cycle or a variable frequency.

[0013] FIG. 2A illustrates an embodiment of the present invention wherein a suitable number of tracks (N>1) are DC erased, for example, by applying a DC current to the head 4 while performing a write operation to the tracks. However, the N tracks may be DC erased using any suitable technique, such as a magnetic printing technique wherein the entire surface of the disk is DC erased. Although eleven tracks are DC erased in the embodiment shown in FIG. 2A, any suitable number of tracks may be DC erased.

[0014] After DC erasing the N tracks, the periodic pattern is written to a target track within the N tracks, and in the embodiment of FIG. 2A, the periodic pattern is written to the middle track. The periodic pattern is written to the target track at least twice, and in one embodiment, the periodic pattern is written a suitable number of times to detect a skip track erasure event which may range from two to several thousand times. In one embodiment, the number of times the periodic pattern is written to the target track is determined by evaluating a number of heads and disks which are known to exhibit skip track erasure. Once an appropriate number for writing the periodic pattern is determined, a number of heads and disks are tested using the same number. In yet another embodiment, the threshold for detecting a skip track erasure event may be selected relative to the number of times the periodic pattern is written to the target track, wherein the threshold is typically increased as the number of writes increases.

[0015] FIG. 2B illustrates an example of read signal noise exceeding a threshold due to a skip track erasure event. The read signal noise due to adjacent track erasure is shown on each side of the target track, whereas the read signal noise due to a skip track erasure event occurs multiple tracks away from the target track (two and three tracks in the example of FIG. 2B). Accordingly, a skip track erasure event typically occurs multiple tracks away from the target track, but not as far as a Wide-Area Track Erasure which is typically detected by writing a low frequency pattern to the disk (25 MHz).

[0016] FIG. 3 is a flow diagram according to an embodiment of the present invention wherein the read signal noise is measured across the entire range of N tracks (step 28). The read signal generated by reading each track is compared to a threshold (step 30), and a skip track erasure event is detected (step 32) if the read signal noise exceeds the threshold at any track other than the tracks immediate adjacent to the target track.

[0017] The read signal noise may be measured in any suitable manner. In one embodiment, a noise power in the read signal is measured by measuring a root mean square (RMS) value of the read signal. In another embodiment, the noise power in the read signal is measured by computing a discrete time Fourier transform of the read signal and evaluating the resulting frequency spectrum. In yet another embodiment, the noise power is measured by filtering the read signal with a suitable analog or discrete-time filter.

[0018] In the embodiment of FIG. 1A, each production disk drive may perform the flow diagrams described herein in order to evaluate the head and disk. For example, each production disk drive may attempt to detect when a particular head or disk exhibits skip track erasure so that the disk drive is either discarded or reworked. In yet another embodiment, each production disk drive may calibrate a write current setting (e.g., an amplitude or overshoot setting) in order to reduce the occurrence or magnitude of skip track erasure. In the embodiment where a disk drive detects skip track erasure, the tracks that are DC erased and the target track are defined by the servo sectors 18₀-18_N as shown in FIG. 1A.

[0019] In an alternative embodiment shown in FIG. 4, the flow diagrams disclosed herein are implemented by a spin stand. In this embodiment, a number of heads and/or disks from a particular vendor may be tested with the spin stand to measure the susceptibility to skip track erasure. If a vendor's head or disk design fails the skip track erasure test, the vendor may be told to rework the part or a different vendor may be selected. The spin stand of FIG. 4 comprises suitable control circuitry 34 which generates control signals 36 applied to a suitable actuator 38, which may include a piezoelectric actuator. The head 4 to be tested is coupled to the actuator 38, for example, using a suspension which biases the head 4 toward the disk surface. The actuator 38 may also comprise a precise position sensor, such as a capacitance sensor, for detecting the radial location of the head 4 rather than detecting the radial location from embedded servo sectors 18₀-18_N that may eventually be written to the disk 2. Therefore, in this embodiment the “tracks” are defined relative to the resolution of the position sensor, and since the disk 2 need not comprise embedded servo sectors 18₀-18_N, the periodic pattern may be written along the entire circumferential length of the track.

[0020] Any suitable control circuitry may be employed to implement the flow diagrams in the embodiments of the present invention, such as any suitable integrated circuit or circuits, which may include a microprocessor executing the steps of a control program. In the embodiment where the control circuitry is implemented within a disk drive, it may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain steps described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.

[0021] In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the steps of the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk 2 and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.