Circuit and method to improve energy harvesting efficiency in piezoelectric harvesters

[0001] This application claims priority from provisional application Ser. No. 61/098,873 filed Sep. 22, 2008, which is incorporated herein by reference in its entirety.

[0002] This invention was made with governmental support under Grant Number W15P7T-08-C-P408, awarded by the US Air Force. The government has certain rights in the invention.

[0003] The invention is related to the field of energy harvesting, and in particular to improving energy harvesting efficiency of piezoelectric harvesters.

[0004] Energy harvesting is an area of growing importance to reduce the dependence of handheld, portable and implantable electronics on batteries. Harvesting ambient vibration energy through piezoelectric means is a popular energy harvesting technique which can supply 100's of μW of available power. A piezoelectric element converts mechanical energy in the form of vibrations into electrical energy and vice-versa. It can be modeled as a current source in parallel with a complex impedance.

[0005] Ambient mechanical vibrations produce an AC current in the piezoelectric element which must be rectified to get a DC voltage output. Conventional rectifiers use a full-bridge rectifier 2 or a voltage doubler 10 circuit as shown in FIGS. 1 and 2. The problem with a simple full-bridge strategy is that most of the available power of the harvester 4 is just wasted in charging and discharging the input capacitor.

[0006] A piezoelectric harvester is usually represented electrically as a current source in parallel with a capacitor (C_P) and resistor (R_P). The current source provides current proportional to the input vibration amplitude. For the sake of the following analysis, the input vibrations are assumed to be sinusoidal in nature and hence the current is represented as:
I_HAR=I_p sin ωt  (1)
Some of the prior art in extracting electrical power from piezoelectric harvesters 2, 10 is shown in FIGS. 1 and 2. FIG. 1 shows a full-bridge rectifier and FIG. 2 shows a rectifier 10 which also acts as a voltage doubler. The analysis also assumes ideal diodes 6, 14. The electrical power that is extractable from the full-bridge rectifier using the circuit shown in FIG. 1 is given by:

[0007] $\begin{array}{cc}{P}_{\mathrm{RECT}}=\frac{2V_{\mathrm{RECT}}}{\pi }\left(I_p-V_{\mathrm{RECT}}\omega C_p\right)& \left(2\right)\end{array}$
where V_RECT is the rectified output voltage of the full-bridge rectifier 2. The extracted power varies with the output voltage and reaches a maximum at

[0008] $\begin{array}{cc}{V}_{\mathrm{RECT},\max }=\frac{I_p}{2\omega C_p}& \left(3\right)\end{array}$
where the maximum power extractable is

[0009] $\begin{array}{cc}{P}_{\mathrm{RECT},\max }=\frac{I_p^2}{2\pi \omega C_p}& \left(4\right)\end{array}$
For the voltage doubler case, while the maximum power extractable remains the same, the output voltage (V_RECT) at which this is achieved is twice the value as given by eq. (3).

[0010] The main limitation of the full-bridge rectifier 2 is that, most of the current available from the harvester 4 does not go into the output at high voltages. This is because, the current first has to go into the capacitor C_p to charge it up to V_RECT before the current can go into the output. This happens every time current changes direction from positive to negative and vice-versa. In each of those occasions, the voltage across C_p has to change from +V_RECT to −V_RECT or from −V_RECT to +V_RECT. This loss in charge due to charging and discharging of C_p limits the maximum power that can be extracted using the full-bridge rectifier.

[0011] Following the rectifier, additional DC-DC converters are required to regulate the output of the rectifier to its maximum power point and to efficiently transfer the energy obtained to the load circuits. These converters can be inductor-based to achieve high efficiency.

[0012] According to one aspect of the invention, there is provided an energy harvester circuit. The energy harvester circuit includes a harvesting module for extracting energy from an ambient source. A bias flip module manages the manner in which voltage across the harvesting module transitions when input current to the harvesting module changes direction so as to allow a majority of the charge available from the harvesting module to be extracted. A voltage transitioning module is shared amongst one or more DC-DC converters for efficient energy management.

[0013] According to another aspect of the invention, there is provided a method of performing energy harvesting. The method includes providing a harvesting module for extracting energy from an ambient source. Also, the method includes implementing a bias flip module to manage the manner in which voltage across the harvesting module transitions when input current to the harvesting module changes direction so as to allow a majority of the charge available from the harvesting module to be extracted. Furthermore, the method includes implementing a voltage transitioning module that is shared amongst one or more DC-DC converters for efficiency energy management.

[0023] The invention provides a circuit technique to improve the energy harvesting efficiency of piezoelectric harvesters. The circuit uses a bias-flip rectifier technique which improves multi-fold, the power extraction capability as compared to conventional full-bridge rectifiers and voltage doublers. The bias-flip rectifier uses an inductor which can be shared with a multiplicity of DC-DC converters on the same energy processing circuit through an arbiter which controls access to the inductor. The circuit can be used in energy harvesting scenarios as a battery life-time enhancer or to completely eliminate the battery altogether. The invention is not limited to piezoelectric harvesters and can be used in general with any input having similar electrical characteristics to a piezoelectric harvester.

[0024] FIG. 3 shows a schematic of an exemplary embodiment of the bias-flip rectifier circuit 20 in accordance with the invention. The circuit 20 includes a regular full-bridge rectifier, having the diode arrangement 24, with the addition of an inductor (L_BF) and a switch Φ_BF.

[0025] The inductor (L_BF) operates by flipping in a very efficient manner using the switch Φ_BF, the voltage across C_p from +V_RECT to −V_RECT and vice-versa when the input current changes direction. This way the majority of the charge available from the harvester 22 can go into the output capacitor (C_REF) without having to charge and discharge C_p.

[0026] All practical piezoelectric harvesters have a parallel resistance R_p. This resistance limits the maximum power achievable. From maximum power transfer theory, this maximum power limit is,

[0027] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{max\_the}}=\frac{I_p^2{R}_p}{8}& \left(6\right)\end{array}$
In the presence of the resistor R_p, the power available from a full-bridge rectifier is limited to

[0028] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{BR}}\approx \frac{2V_{\mathrm{RECT}}}{\pi }\left(I_p-V_{\mathrm{RECT}}\omega C_p-\frac{\pi V_{\mathrm{RECT}}}{2R_p}\right)& \left(7\right)\end{array}$
which can be re-written as,

[0029] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{BR}}\approx \frac{2V_{\mathrm{RECT}}}{\pi }\left(I_p-V_{\mathrm{RECT}}\omega C_p\left(1+\pi /2Q\right)\right)& \left(8\right)\end{array}$
where Q=ωR_pC_p, is the quality factor of the input piezoelectric harvester. This leads to maximum extractable power of,

[0030] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{max\_BR}}=\frac{I_p^2}{2\pi \omega C_p\left(1+\pi /2Q\right)}& \left(9\right)\end{array}$
For the bias-flip rectifier 20 of FIG. 3, the presence of R_p limits the power extractable to

[0031] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{BF}}\approx \frac{2V_{\mathrm{RECT}}}{\pi }\left(I_p-\frac{\pi \omega C_p{V}_{\mathrm{RECT}}}{2Q}\right)& \left(10\right)\end{array}$
which reaches a maximum of

[0032] $\begin{array}{cc}{P}_{\mathrm{RECT},\mathrm{max\_BF}}=\frac{I_p^{2}Q}{{\pi }^2\omega C_p}& \left(11\right)\end{array}$
It can be thus seen that, the bias-flip rectifier improves upon the maximum power extractable by a factor of

[0033] $\begin{array}{cc}\frac{P_{\mathrm{RECT},\mathrm{max\_BF}}}{P_{\mathrm{RECT},\mathrm{max\_BR}}}=\left(1+\frac{2Q}{\pi }\right)& \left(12\right)\end{array}$

[0034] For a commercial piezoelectric harvester with a Q of 12.8, the bias-flip rectifier 20 can theoretically provide an improvement of 9.15× in extractable power. However, the parasitic resistances associated with inductive charge transfer and the overhead power involved in controlling the bias-flip rectifier circuitry limit the improvement of the extractable power to 6-8×.

[0035] The ratio of the power extractable by the bias-flip rectifier 20 compared to the maximum power extractable as predicted by the maximum power transfer theory is given by,

[0036] $\begin{array}{cc}\frac{P_{\mathrm{RECT},\mathrm{max\_BF}}}{P_{\mathrm{RECT},\mathrm{max\_the}}}=\frac{8}{{\pi }^2}=0.81& \left(13\right)\end{array}$

[0037] In systems where it is prohibitive to use an inductor to improve power output or when the series resistance of the piezoelectric harvester is high, a switch-only rectifier scheme can be used. FIG. 4 shows a schematic of an exemplary embodiment of the switch-only rectifier circuit 78 in accordance with the invention. The circuit 78 includes a regular full-bridge rectifier, having the diode arrangement 82, with the addition of a switch Φ_SO.

[0038] The switch Φ_SO helps in discharging the voltage across C_p from ±V_RECT to ground when the input current changes direction. This way the charge lost in the full-bridge and voltage doubler cases can be reduced by half. This helps in increasing the power output from the harvester 80 by 2× compared to a full-bridge rectifier or voltage doubler.

[0039] FIG. 5 shows an exemplary circuit architecture 30 which uses a bias-flip rectifier 34. The output of the rectifier 34 is fed to a main DC-DC converter 36 whose output V_DD,1 is an energy buffer. The energy buffer can be a battery or a large storage capacitor C_MAIN. This output V_DD,1 can then feed a multiplicity of DC-DC converters DCDC_—2-DCDC_N each of which can cater to its own load circuitry V_DD,2−V_DD,N. Depending on the system being built, there can be many different DC-DC converters (buck/boost) DCDC_—2-DCDC_N downstream or the system 30 might just have the main DC-DC converter 36. These DC-DC converters will themselves employ inductors.

[0040] The bias-flip rectifier can help improve the power extracted from piezoelectric harvesters by 6-8×. However, it requires the use of an inductor. In the proposed implementation here, this inductor can be the same one used in the many different DC-DC converters present in the system using the arbiter as shown in FIG. 5.

[0041] FIG. 6 shows a circuit architecture 40 with a bias-flip rectifier system 42. The output voltage of the rectifier V_RECT needs to be regulated at its optimum point for maximal power transfer. A buck DC-DC converter 44 is used to regulate V_RECT and efficiently pass on the energy V_STO obtained to a storage capacitor C_STO or a rechargeable battery. A boost DC-DC converter 48 is used to generate a high voltage V_HIGH (˜5V) which is used to power the switches of the bias-flip rectifier 42. Both the buck and boost DC-DC converters 44,48 employ an inductor-based architecture for improved efficiency. The arbiter block 46 is used to control access to the shared inductor (L_SHARE) which is shared between the bias-flip rectifier 42, buck and boost DC-DC converters 44, 48, as shown in FIG. 7.

[0042] Thus, effectively, the inductor (L_SHARE) can be time shared between the rectifier 42 and the many different DC-DC converters 44, 46. This is done with the help of the arbiter block 46 as shown in more detail in FIG. 6. The arbiter receives requests (ACK_RECT, REQ-RECT, ACK_BUCK, REQ_BUCK, ACK_BOOST, REQ_BOOST) for usage of the inductor (L_SHARE) from the rectifier 42 and the different DC-DC converters 44, 48. It then allocates the inductor (L_SHARE) to the requestor if the inductor (L_SHARE) is unoccupied or enters the request into a queue if the inductor (L_SHARE) is occupied. The inductor (L_SHARE) can be allocated to the different requestors using a FIFO approach or based on a priority scheme as needed. This inductor (L_SHARE) sharing approach requires the use of only one inductor for the entire system thereby minimizing area, volume and cost.

[0043] FIG. 8 shows an exemplary circuit architecture 56 including a bias-flip rectifier 60 having an inductor L_BF that is connected in parallel with the PE harvester 58. The switches M1 and M2 are turned ON for a brief time when the PE current I_P crosses zero in either direction. When the switches M1 and M2 are ON, the inductor L_BF; helps in flipping the voltage V_BF across C_P. The series resistance along the L_BF C_P resonant path limits the magnitude of this voltage inversion. After the switches close, the PE current I_P needs to supply a smaller amount of charge to C_P to bring it up to ±V_RECT. This significantly improves the power extractable from the harvester 58. The output power that can be obtained with the bias-flip rectifier can be given by Eq. 10.

[0044] The bias-flip switches M1 and M2 are turned ON when the current from the harvester 58 crosses zero. At this point one of the voltages V_HAR—P or V_HAR—N is close to V_RECT and the other one is close to zero. Let the maximum gate overdrive allowed by the technology in use be V_HIGH. For most efficient charge transfer through the inductor L_BF, the gate overdrive of the bias-flip switches M1 and M2 needs to be V_HIGH. The gate-drive circuitry shown in FIGS. 9A-9B accomplishes this while maintaining the bias-flip switches M1 and M2 within breakdown limits.

[0045] In particular, FIG. 9A shows a circuit 66 that drives the bias flip transistor switch M1 of FIG. 7. The circuit 66 includes switches 68 that are closed at a respective pulse Φ₁, and switches 70 that are closed at a respective state Φ₂. FIG. 9B shows a circuit 70 that drives the bias flip transistor switch M2 of FIG. 7. The circuit 72 includes switches 74 that are closed at a respective pulse phase Φ₁ and switches 76 that are closed at a respective pulse phase Φ₂.

[0046] The gate-drive circuitries 66, 72 include a capacitor C_GD which can be implemented on-chip. During phase Φ₁ when the bias-flip switches M1 and M2 are OFF, the capacitor C_GD gets charged to V_HIGH and the gate voltages of both the bias-flip M1 and M2 switches are brought to ground. When I_P crosses zero the bias-flipping takes place, phase Φ₂ begins, where the voltage across C_GD remains almost the same, but the voltage referenced to ground at V_G—TOP and V_G—BOT becomes (V_HIGH+V_HAR—P) and (V_HIGH+V_HAR—N) respectively. This turns ON the bias-flip switches M1 and M2 and keeps them ON till the flipping of voltage across C_p has taken place. After this, phase Φ₂ ends and the bias-flip switches M1 and M2 are turned OFF. The voltage V_HIGH can be obtained using a boost DC-DC converter using the same shared inductor controlled by the arbiter. This simple scheme can be implemented on-chip and prevents the bias-flip switches from breaking down due to high voltage.

[0047] Although the present invention has been shown and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.