US 7,941,392 B2Grant
Scheduling system and method in a hierarchical temporal memory based system
Issue Date:2011-05-10
•5 Claims
•44 Drawing Sheets
Abstract
According to one aspect of one or more embodiments of the present invention, a system comprises: an HTM network executable at least in part on multiple node processing units (NPUs). In one embodiment the NPUs include one or more nodes, each of which can be executed by its NPU. In one embodiment, the present invention includes a technique for coordinating and scheduling HTM computation across one or more CPUs which (1) enables concurrent computation (2) does not require a central point of control (e.g. a controller entity that “orchestrates” the computation), (3) does not require global synchronization, (4) in some embodiments ensures that the same results are achieved whether the nodes are executed in parallel or serially.
Metadata
Assignee
- Numenta, Inc.
Inventor
- William Cooper Saphir
Application Information
Application Number:US 11/713,157
Filing Date:2007-02-28
Priority Date:2007-02-28
Art Unit:2129
Classifications
IPC:
G06F9/44G06N7/00
Patent Drawings (44 sheets)
Description
Field of the Invention
[0001] The present invention is directed toward the field of Hierarchical Temporal Memory (HTM) systems and more particularly to scheduling in HTM systems.
Related Applications
[0002] This application is related to U.S. patent application Ser. No. 11/351,437 filed on Feb. 10, 2006, U.S. patent application Ser. No. 11/622,458 filed on Jan. 11, 2007, U.S. patent application Ser. No. 11/622,447 filed on Jan. 11, 2007, U.S. patent application Ser. No. 11/622,448 filed on Jan. 11, 2007, U.S. patent application Ser. No. 11/622,457 filed on Jan. 11, 2007, U.S. patent application Ser. No. 11/622,454 filed on Jan. 11, 2007, U.S. patent application Ser. No. 11/622,456 filed on Jan. 11, 2007, and U.S. patent application Ser. No. 11/622,455 filed on Jan. 11, 2007 which are incorporated by reference herein in their entirety.
Background
[0003] Generally, a “machine” is a system or device that performs or assists in the performance of at least one task. Completing a task often requires the machine to collect, process, and/or output information, possibly in the form of work. For example, a vehicle may have a machine (e.g., a computer) that is designed to continuously collect data from a particular part of the vehicle and responsively notify the driver in case of detected adverse vehicle or driving conditions. However, such a machine is not “intelligent” in that it is designed to operate according to a strict set of rules and instructions predefined in the machine. In other words, a non-intelligent machine is designed to operate deterministically; should, for example, the machine receive an input that is outside the set of inputs it is designed to recognize, the machine is likely to, if at all, generate an output or perform work in a manner that is not helpfully responsive to the novel input.
[0004] In an attempt to greatly expand the range of tasks performable by machines, designers have endeavored to build machines that are “intelligent,” i.e., more human- or brain-like in the way they operate and perform tasks, regardless of whether the results of the tasks are tangible. This objective of designing and building intelligent machines necessarily requires that such machines be able to “learn” and, in some cases, is predicated on a believed structure and operation of the human brain. “Machine learning” refers to the ability of a machine to autonomously infer and continuously self-improve through experience, analytical observation, and/or other means.
[0005] Machine learning has generally been thought of and attempted to be implemented in one of two contexts: artificial intelligence and neural networks. Artificial intelligence, at least conventionally, is not concerned with the workings of the human brain and is instead dependent on algorithmic solutions (e.g., a computer program) to replicate particular human acts and/or behaviors. A machine designed according to conventional artificial intelligence principles may be, for example, one that through programming is able to consider all possible moves and effects thereof in a game of chess between itself and a human.
[0006] Neural networks attempt to mimic certain human brain behavior by using individual processing elements that are interconnected by adjustable connections. The individual processing elements in a neural network are intended to represent neurons in the human brain, and the connections in the neural network are intended to represent synapses between the neurons. Each individual processing element has a transfer function, typically non-linear, that generates an output value based on the input values applied to the individual processing element. Initially, a neural network is “trained” with a known set of inputs and associated outputs. Such training builds and associates strengths with connections between the individual processing elements of the neural network. Once trained, a neural network presented with a novel input set may generate an appropriate output based on the connection characteristics of the neural network.
[0007] Some systems have multiple processing elements whose execution needs to be coordinated and scheduled to ensure data dependency requirements are satisfied. Conventional solutions to this scheduling problem utilize a central coordinator that schedules each processing element to ensure that data dependency requirements are met, or a Bulk Synchronous Parallel execution model that requires global synchronization.
Summary
[0008] According to one aspect of one or more embodiments of the present invention, a system comprises: an HTM network executable at least in part on multiple node processing units (NPUs). In one embodiment each NPU includes one or mode nodes, each of which can be executed by its NPU. In one embodiment, the present invention coordinates and schedules NPUs without the need for a central point of control or a clock. The present invention is a data driven scheduler where each NPU coordinates the execution of its nodes with its immediate upstream and downstream neighbors without the use of a centralized scheduler or controller.
[0009] Other aspects of the invention will be apparent from the following description and the appended claims.
Brief Description of Drawings
[0010] FIG. 1 shows a flow of data between an object and a human.
[0011] FIG. 2 shows an HTM in accordance with an embodiment of the present invention.
[0012] FIG. 3 shows a node in accordance with an embodiment of the present invention.
[0013] FIG. 4 shows a flow process in accordance with an embodiment of the present invention.
[0014] FIG. 5 shows an operation of a sequence learner in accordance with an embodiment of the present invention.
[0015] FIG. 6 shows a flow process in accordance with an embodiment of the present invention.
[0016] FIGS. 7A-7E show representations in accordance with an embodiment of the present invention.
[0017] FIG. 8 shows a representation in accordance with an embodiment of the present invention.
[0018] FIG. 9 shows a representation in accordance with an embodiment of the present invention.
[0019] FIG. 10 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0020] FIG. 11 shows a flow process in accordance with an embodiment of the present invention.
[0021] FIG. 12 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0022] FIG. 13 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0023] FIG. 14 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0024] FIG. 15 shows a flow process in accordance with an embodiment of the present invention.
[0025] FIG. 16 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0026] FIG. 17 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0027] FIG. 18 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0028] FIG. 19 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0029] FIG. 20 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0030] FIG. 21 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0031] FIG. 22 shows an inheritance diagram in accordance with an embodiment of the present invention.
[0032] FIG. 23 shows a flow process in accordance with an embodiment of the present invention.
[0033] FIG. 24 shows a flow process in accordance with an embodiment of the present invention.
[0034] FIG. 25 shows a flow process in accordance with an embodiment of the present invention.
[0035] FIG. 26 shows at least a portion of an HTM-based system in accordance with an embodiment of the present invention.
[0036] FIG. 27 shows a computer system in accordance with an embodiment of the present invention.
[0037] FIG. 28 shows a flow process for a scheduling technique in accordance with an embodiment of the present invention.
[0038] FIGS. 29 a-d show an example of a scheduling technique for a phase scheduling technique for multiple node processing units in accordance with an embodiment of the present invention.
[0039] FIGS. 30 a-j show an example of a pipeline scheduling technique in accordance with an embodiment of the present invention.
Detailed Description
[0040] In the following description of embodiments of the present invention, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail to avoid unnecessarily complicating the description.
[0041] Humans understand and perceive the world in which they live as a collection—or more specifically, a hierarchy—of objects. An “object” is at least partially defined as having some persistent structure over space and/or time. For example, an object may be a car, a person, a building, an idea, a word, a song, or information flowing in a network.
[0042] Moreover, referring to FIG. 1 , an object in the world 10 may also be referred to as a “cause” in that the object causes particular data to be sensed, via senses 12, by a human 14. For example, the smell (sensed input data) of a rose (object/cause) results in the recognition/perception of the rose. In another example, the image (sensed input data) of a dog (object/cause) falling upon a human eye results in the recognition/perception of the dog. Even as sensed input data caused by an object change over space and time, humans want to stably perceive the object because the cause of the changing sensed input data, i.e., the object itself, is unchanging. For example, the image (sensed input data) of a dog (object/cause) falling upon the human eye may change with changing light conditions and/or as the human moves; yet, however, the human is able to form and maintain a stable perception of the dog.
[0043] In embodiments of the present invention, learning causes and associating novel input with learned causes are achieved using what may be referred to as a “hierarchical temporal memory” (HTM). An HTM is a hierarchical network of interconnected nodes that individually and collectively (i) learn, over space and time, one or more causes of sensed input data and (ii) determine, dependent on learned causes, likely causes of novel sensed input data. HTMs, in accordance with one or more embodiments of the present invention, are further described below with reference to FIGS. 2-27 .
HTM Structure
[0044] An HTM has several levels of nodes. For example, as shown in FIG. 2 , HTM 20 has three levels L1, L2, L3, with level L1 being the lowest level, level L3 being the highest level, and level L2 being between levels L1 and L3. Level L1 has nodes 22, 24, 26, 28; level L2 has nodes 30, 32, and level L3 has node 34. The nodes 22, 24, 26, 28, 30, 32, 34 are hierarchically connected in a tree-like structure such that each node may have several children nodes (i.e., nodes connected at a lower level) and one parent node (i.e., node connected at a higher level). Each node 22, 24, 26, 28, 30, 32, 34 may have or be associated with a capacity to store and process information. For example, each node 22, 24, 26, 28, 30, 32, 34 may store sensed input data (e.g., sequences of patterns) associated with particular causes. Further, each node 22, 24, 26, 28, 30, 32, 34 may be arranged to (i) propagate information “forward” (i.e., “up” an HTM hierarchy) to any connected parent node and/or (ii) propagate information “back” (i.e., “down an HTM hierarchy) to any connected children nodes.
[0045] Inputs to the HTM 20 from, for example, a sensory system, are supplied to the level L1 nodes 22, 24, 26, 28. A sensory system through which sensed input data is supplied to level L1 nodes 22, 24, 26, 28 may relate to commonly thought-of human senses (e.g., touch, sight, sound) or other human or non-human senses.
[0046] The range of sensed input data that each of the level L1 nodes 22, 24, 26, 28 is arranged to receive is a subset of an entire input space. For example, if an 8×8 image represents an entire input space, each level L1 node 22, 24, 26, 28 may receive sensed input data from a particular 4×4 section of the 8×8 image. Each level L2 node 30, 32, by being a parent of more than one level L1 node 22, 24, 26, 28, covers more of the entire input space than does each individual level L1 node 22, 24, 26, 28. It follows that in FIG. 2 , the level L3 node 34 covers the entire input space by receiving, in some form, the sensed input data received by all of the level L1 nodes 22, 24, 26, 28. Moreover, in one or more embodiments of the present invention, the ranges of sensed input data received by two or more nodes 22, 24, 26, 28, 30, 32, 34 may overlap.
[0047] While HTM 20 in FIG. 2 is shown and described as having three levels, an HTM in accordance with one or more embodiments of the present invention may have any number of levels. Moreover, the hierarchical structure of an HTM may be different than that shown in FIG. 2 . For example, an HTM may be structured such that one or more parent nodes have three children nodes as opposed to two children nodes like that shown in FIG. 2 . Further, in one or more embodiments of the present invention, an HTM may be structured such that a parent node in one level of the HTM has a different number of children nodes than a parent node in the same or another level of the HTM. Further, in one or more embodiments of the present invention, an HTM may be structured such that a parent node receives input from children nodes in multiple levels of the HTM. In general, those skilled in the art will note that there are various and numerous ways to structure an HTM other than as shown in FIG. 2 .
[0048] Any entity that uses or is otherwise dependent on an HTM as, for example, described above with reference to FIG. 2 and below with reference to FIGS. 3-27 , may be referred to as an “HTM-based” system. Thus, for example, an HTM-based system may be a machine that uses an HTM, either implemented in hardware or software, in performing or assisting in the performance of a task.
Learning Causes
[0049] In embodiments of the present invention, an HTM discovers one or more causes in its world from sensory input data received by the HTM. In other words, an HTM does not necessarily have a sense particular to each of the types of causes being sensed; instead, an HTM may discover from raw sensed input data that causes such as cars and words exist. In such a manner, an HTM is able to learn and form representations of causes existing in its world.
[0050] As described above, an “object” has persistent structure. The persistent structure causes persistent patterns to be sensed by an HTM. Each sensed input pattern has a spatial attribute. In other words, each sensed input pattern may be thought of as being represented as a particular set of bits. In general, a node in an HTM “learns,” i.e., stores and associates with a common cause, sensed input patterns by determining “coincidences” of sensed input patterns in its input. Determining coincidences of sensed input patterns involves determining which sensed input patterns are active at the same time at a rate statistically greater than what would be expected based on mere chance. For example, if an HTM node having one hundred inputs has seven inputs that become active together at some statistically significant rate, then the HTM node learns the sensed input patterns at those seven inputs.
[0051] Further, in one or more embodiments of the present invention, it may not be necessary for an HTM node to learn all sensed input patterns occurring together at some statistically significant rate. Instead, an HTM node may store the x most common sensed input patterns found in its input. These learned sensed input patterns may be referred to as “quantization points” of the HTM node.
[0052] In addition to an HTM node learning commonly occurring sensed input patterns as described above, the HTM node learns common sequences of those learned sensed input patterns. A particular sequence of learned sensed input patterns may be learned by recognizing that the sequence occurs at a rate statistically greater than what would be expected based on mere chance. For example, if of fifty sensed input patterns learned by an HTM node, three occur in a particular order at some statistically significant rate, then the HTM node may learn that sequence of sensed input patterns.
[0053] Further, in one or more embodiments of the present invention, it may not be necessary for an HTM node to learn all sequences occurring at some statistically significant rate. Instead, an HTM node may store the x most frequent sequences found in its input.
[0054] In one or more embodiments of the present invention, the sequences learned by an HTM node may each be represented by a variable. As each learned sequence is associated with a particular cause, each variable accordingly represents a different cause. The HTM node may pass each of its variables up to a parent node via a vector containing probabilities as to the likelihood that each of its learned sequences is active at its input at a given time. The parent node may then (i) determine coincidences of its sensed input patterns (i.e., the variables received from its child node), (ii) learn sensed input patterns as described above, and (iii) learn sequences of learned sensed input patterns (i.e., learn sequences of variables representing sequences learned by its child node).
Sequence Learning
[0055] As described above, sequence learning involves learning frequently occurring sequences of elements and outputting a probability that a given input vector of elements is part of a learned sequence for each of its learned sequences. FIG. 3 shows a node 40 having a sequence learning functionality. The node 40 has a coincidence detector 42 and a sequence learner 44. The coincidence detector 42 receives some input 46. Generally, the coincidence detector 42 identifies coincidences among its input. At each time-step, the coincidence detector 42 outputs a distribution P(e−t|y), where P(e−t|y) represents the probability of observing e− (evidence from a lower level) at time t when in state y. The distribution P(e−t|y) is a vector in which each entry corresponds to a different y, where y represents some state of a world to which node 40 is exposed. Thus, for example, at time t, the first entry in P(e−t|y) is P(e−t|y1), the second entry is P(e−t|y2), and so forth.
[0056] Based on the distributions outputted over time by the coincidence detector 42, the sequence learner 44 outputs a distribution P(e−t|S), where P(e−t|S) represents the probability of observing e− (evidence from a lower level) at time t over learned sequences S. Thus, each entry in the distribution P(e−t|S) corresponds to a different learned sequence Si. In one or more embodiments of the present invention, the learned sequences themselves may not be communicated outside of the sequence learner 44. Further, those skilled in the art will note that the sequence learner 44, has a behavior (i.e., outputting distributions over learned sequences) that may be independent of a type and/or topology of network of which the sequence learner 44 is part.
[0057] As described above, y represents some state of a world. Those skilled in the art will note that the statistical nature of the world is such that these states are likely to occur in particular sequences over time. As shown in FIG. 4 , to learn sequences in its world, a sequence learner (e.g., 44 in FIG. 3 ) identifies sequences and updates them over time ST50. Further, the sequence learner is arranged to collect statistics on its learned sequences ST52 and then, based on its learned sequences and statistics thereof, compute probability distributions (as described above) ST54.
[0058] In one or more embodiments of the present invention, a sequence learner may have a particular number noutputs of outputs. Although the sequence learner may identify more sequences than it has outputs, only noutputs may be represented at the output of the sequence learner. In other words, every sequence identified by the sequence learner may not be uniquely represented at the output of the sequence learner. Thus, it follows that the sequence learner may be arranged to allocate, or “map,” its limited number of outputs among a larger number of identified sequences. In one or more embodiments of the present invention, such mapping may be motivated by one or more of the following priorities: desiring frequently occurring sequences; desiring differentiated sequences (in an effort to, for example, not waste outputs on sequences that are substantially similar); and desiring a minimum disruption to the meanings associated with the outputs (in an effort to, for example, enable stable learning at a higher level).
[0059] In regard to identifying frequently occurring sequences, at any given time t, a sequence learner may have to calculate the probability that a particular sequence of elements has been received over time up until time t. For example, to determine the probability that the sequence ‘y4y2y3’ has occurred over the last three samples (i.e., over the last three time steps), a sequence learner may multiply P(e−t-2|y4), P(e−t-1|y2), and P(e−t|y3) as shown in FIG. 5 . The product of such a multiplication operation represents a “soft” count of the probability of having observed ‘y4y2y3’. Thus, because at every time t, each input state has some probability associated with it (e.g., in FIG. 5 , at any time t, each of input states y1-y4 has an associated probability), for every time t, there is some probability that any one of the possible sequences has been observed.
[0060] Further, in one or more embodiments of the present invention, instead of keeping a “soft” count as described above, a count of the actual number of times a sequence has occurred—a “hard” count—may be kept dependent on having a particular state of input vectors.
[0061] Those skilled in the art will note that there may be a combinatorial explosion of possible sequences received by a sequence learner over time. Thus, in one or more embodiments of the present invention, the sequence learner may consider a certain number of input states in each input sample, where that certain number is parameterized by some value para. Such treatment may narrow the number of possible updates to a base of para instead of a base of the number ninputs of inputs to the sequence learner.
[0062] Further, in one or more embodiments of the present invention, a search space of a sequence learner may be reduced, or otherwise controlled, by considering only those sequences of a given length that have been identified as potentially frequent from observations of shorter sequences. For example, the sequence learner may count likely 2-sequences (i.e., sequences of 2 elements) over a certain number window[2] of input samples. The resulting frequent 2-sequences may be used to generate candidate 3-sequences (i.e., sequences of 3 elements), whereupon, only these candidate 3-sequences are counted over a certain number window[3] of input samples. This process may continue until reaching a number MaxL representing the maximum length sequence to be considered by the sequence learner. In one or more other embodiments of the present invention, the sequence learner may have a different stopping point. For example, the sequence learner may use the statistics of its input to determine the maximum sequence length to consider.
[0063] Determining likely sequences as described above may be dependent on a “coherence time,” which is the time over which the statistics of inputs remain constant. For an “on-line” sequence learner (i.e., one that does not loop back over previous inputs), the time required to generate likely sequences up to some maximum length may have to be less than the coherence time. If the time required to identify sequences of a certain length becomes longer than the coherence time, then in one or more embodiments of the present invention, “batch” processing, instead of on-line processing, may be used. Batch processing may involve identifying k-sequences (i.e., sequences of length k) by looping back over the same input used to identify the k−1-sequences (i.e., sequences of length k−1).
[0064] In one or more embodiments of the present invention, as sequences of certain length are identified, a sequence learner may keep the associated counts in a table st_table. There may be a separate st_table for each sequence length. For example, after counting 3-sequences, a table st_table{3} may be as follows:
[0065]
| Count | Sequence | |
|---|---|---|
| 103.92 | 121 | |
| 8.67 | 224 | |
| 82.50 | 231 | |
| 167.02 | 312 | |
| 220.45 | 423 | |
| 14.32 | 412 | |
[0066] FIG. 6 shows a flow process for building a table st_table in accordance with an embodiment of the present invention. In regard to building table st_table{k}, for each k-sequence received in an input to a sequence learner, if a certain number window[k] of input samples has not yet been sampled ST60, the table st_table{k} is searched for the k-sequence ST62, ST64. If the k-sequence is already identified by table st_table{k}, then the corresponding count is appropriately incremented by the soft count for the k-sequence ST66, ST68. Otherwise, if the k-sequence is not listed in table st_table{k}, then that k-sequence is added to table st_table{k} with its corresponding soft count ST66, ST70. Upon receiving window[k] input samples ST60, the least common k-sequences may be removed ST72, i.e., all but the top x sequences may be removed, where x represents a maximum number of sequences that may be kept in table st_table{k} after counting sequences of length k. The resulting table st_table{k} may then be used to generate candidate sequences for table st_table{k+1} (generating candidate sequences further described below) ST73, whereupon the process shown in FIG. 6 may be repeated for table st_table{k+1}. Further, in one or more embodiments of the present invention, the process shown in FIG. 6 may not be performed for every k-sequence.
[0067] Further, in one or more embodiments of the present invention, it may be desirable to refine counts on k-length sequences at multiple points in time after an initial counting procedure. In such embodiments, in an effort to give greater weight to recent counts without abandoning all previous observations, a table lt_table of long-term counts may be created and used.
[0068] As described above, in one or more embodiments of the present invention, a sequence learner may only consider those sequences of a given length that have been identified as potentially frequent from observations of shorter sequences. In other words, for example, if Si is a frequent 3-sequence, then it is likely that each subsequence of Si of length 2 is also frequent. Conversely, if a 2-sequence is infrequent, then it is unlikely that any of its 3-length super-sequences are frequent. Thus, the sequence learner may consider only those 3-sequences of which each 2-length subsequence is frequent.
[0069] In one or more embodiments of the present invention, a sequence learner may determine candidate k-sequences from a set of frequent k−1-sequences using, for example, a “join” operation. Candidate k-sequences are those for which the first k−1 samples and the last k−1 samples are frequent. For each frequent k−1-sequence Si in a table st_table{k−1}, a join operation may search for a k−1-sequence Sj in table st_table{k−1}, where the first k−2 elements of Sj are the same as the last k−2 elements of Si. If such an Sj exists, the concatenation of Si and the last element of Sj is added to the list of candidate k-sequences in a table st_table{k}. For example, consider the following tables st_table{3} and st_table{4}, which show the results after a join operation on table st_table{3}.
[0070]
To illustrate how a join operation may work on table st_table{3}, the following description is provided. Taking the 3-sequence ‘121,’ the join operation searches table st_table{3} for a 3-sequence whose first 2 elements match the last two elements of the taken ‘121’ 3-sequence. Because there are no 3-sequences that meet this condition with respect to the taken ‘121’ 3-sequence, the join operation may next take, for example, the 3-sequence ‘312.’ For this taken sequence, the join operation finds that the first two elements of the ‘121’ 3-sequence matches the last two elements of the taken ‘312’ sequence. Thus, the join operation then concatenates the taken ‘312’ 3-sequence with the last element in the found ‘121’ 3-sequence to yield a candidate 4-sequence of ‘3121’ in table st_table{4}. Further, those skilled in the art will note that in one or more embodiments of the present invention, one or more operations other than a join operation may be used to generate candidate k-sequences.
| Count | 3-Sequence | Count | 4-Sequence | |
|---|---|---|---|---|
| 103.92 | 121 | →JOIN→ | 0 | 2312 |
 |  | 0 | 3121 | |
| 82.50 | 231 | 0 | 4231 | |
| 167.02 | 312 | |||
| 220.45 | 423 | |||
 |  | |||
To illustrate how a join operation may work on table st_table{3}, the following description is provided. Taking the 3-sequence ‘121,’ the join operation searches table st_table{3} for a 3-sequence whose first 2 elements match the last two elements of the taken ‘121’ 3-sequence. Because there are no 3-sequences that meet this condition with respect to the taken ‘121’ 3-sequence, the join operation may next take, for example, the 3-sequence ‘312.’ For this taken sequence, the join operation finds that the first two elements of the ‘121’ 3-sequence matches the last two elements of the taken ‘312’ sequence. Thus, the join operation then concatenates the taken ‘312’ 3-sequence with the last element in the found ‘121’ 3-sequence to yield a candidate 4-sequence of ‘3121’ in table st_table{4}. Further, those skilled in the art will note that in one or more embodiments of the present invention, one or more operations other than a join operation may be used to generate candidate k-sequences.
[0071] As described above, in one or more embodiments of the present invention, each output of a sequence learner represents a particular learned sequence. Considering that the sequence learner is continuously identifying the most likely sequences to represent at its outputs, old sequences may need to be replaced by newer sequences that are more frequent. If there are multiple old sequences that are less frequent than a new sequence, the sequence learner may replace one or more of the multiple old sequences based on some criteria. For example, the sequence learner may first remove any old sequences having a length of 1.
[0072] Further, the sequence learner may, for example, remove an old sequence based on its similarity to a new sequence. The similarity of sequences may be determined based on some distance metric. For example, the sequence learner may determine the similarities of sequences using some minimum Hamming distance metric. The Hamming distance may be defined as the number of single-entry changes needed to be made to one sequence to reach another sequence, including changes to “empty” slots either before or after the sequence (but not both). For example, if an old sequence is ‘11234’, and the new sequence is ‘1235’, the Hamming distance is 1.
[0073] Further, in one or more embodiments of the present invention, a distance metric may consider all possible shifts of one sequence relative to the other. For those element indices that overlap in a given shift, ‘0’ may be counted if the elements match, and ‘1’ may be counted if the elements do not match. This number is added to the number of elements that do not align with any element of the other sequence. For example, if an old sequence is ‘1234’, and the new sequence is ‘345’, the result of the distance metric may be determined as 2. Those skilled in the art will note that various distance metrics may be created and/or used to determine the similarity between two sequences.
[0074] Further, in one or more embodiments of the present invention, a sequence learner may, for example, remove an old sequence based on the count (i.e., occurrence frequency) of the old sequence. More particularly, old sequences with lower counts may be replaced before old sequences with higher counts.
[0075] Further, in one or more embodiments of the present invention, a sequence learner may limit how different old and new sequences can be before an old sequence is replaced. In other words, if an old sequence is relatively very different than a new sequence, the sequence learner may prevent that old sequence from being replaced by the new sequence. Such control may promote stable learning at higher levels.
[0076] If a sequence learner replaces an old sequence with a new sequence, then, in one or more embodiments of the present invention, counts associated with subsequences of the old sequence may be removed from a corresponding table st_table.
[0077] In one or more embodiments of the present invention, as sequences are identified and represented at an output of a sequence learner, the sequence learner may collect statistics on the represented sequences. For example, the sequence learner may identify the a priori probability of a particular sequence and/or the transition probability between sequences.
[0078] At any time t, a sequence learner identifies the most likely sequences to represent at its output as described above. As described above, the sequence learner is further arranged to compute the probability of actually being in each of the represented sequences given the inputs received over time by the sequence learner.
[0079] By learning sequences as described above, a node in an HTM may coalesce both space and time when learning causes. Thus, for example, while a lower level child node learns causes based on patterns and sequences thereof sensed over its input space, a higher level parent node is able to learn higher level causes by coalescing both space and time over a larger input space. In other words, as information ascends through the hierarchy of an HTM, higher level nodes learn causes that cover larger areas of input space and longer periods of time than lower level nodes. For example, one or more nodes in a lowest level of an HTM may learn causes associated with a price of a particular stock, whereas one or more nodes in a higher level of the HTM may learn causes associated with overall stock market fluctuations.
[0080] In one or more embodiments of the present invention, computing the output probability over a learned sequence may be dependent on Γ(gamma). Γ may be denoted as a matrix indexed by two variables, S and I, where S corresponds to output sequences (e.g., S1=‘y4y2y3’, S2=‘y1y2y1’, S3=‘y3y1’, S4=‘y2y2y1y4’), and where I corresponds to the index within each sequence (e.g., S1[I]=y4 when I=1). Γ(S, I) may be represented as shown in FIG. 7A .
[0081] At any point in time, each entry (Si, Im) in a gamma matrix represents the probability that the current input vector corresponds to the Imth element of sequence Si. Each gamma may be determined based solely on the previous gamma and the input vector. Further, even though the result may depend on the input history of all past inputs, only the result from the previous time-step may need to be considered as the result of the previous time-step implicitly contains all relevant information from all previous time-steps. Once gamma is determined, the total probability of sequence Si may be determined as the sum across the ith row of the gamma matrix (normalized by the prior probability of the sequence).
[0082] In one or more embodiments of the present invention, an overall sequence probability in terms of gamma may be represented as follows:
[0083]
[0084] Further, for example, in the case where a given sequence is observed in its entirety, the expression for β may be reduced to the following:
[0085]
[0086] Those skilled in the art will note that the description above and below in regard to computing (and initializing) gamma represents only an example of how a sequence learner may calculate output probabilities. Now considering, for example, the four sequences given above (i.e., {S1, S2, S3, S4}, where S1=‘y4y2y3’, S2=‘y1y2Y1’, S3=‘y3y1’, S4=‘y2y2y1y4’), the first two sums in the expression for gamma iterate through every possible combination of previous and current elements. Consider one of those combinations, yt-1=y2 and yt=y1. In other words, the previous input vector (though it contains a probability for every element yi) represents a cause of y2, and the current input vector represents y1. The expression for β (beta) may evaluate to a non-zero value for those entries in gamma that correspond to the elements y2 and y1 and time t−1 and t, respectively. These may be referred to as “active cells” in the gamma matrix as further shown in FIG. 7B .
[0087] Those skilled in the art will note that it may not be enough for a cell to be active at time t to satisfy non-zero conditions given in beta. For those cells that are not in the first column (I!=1), an active cell at time t may follow an active cell at time t−1 in the same sequence. For the example being used (namely, with respect to the four sequences {S1, S2, S3, S4} given above), there may be only one out of the four time-t active cells for which this condition holds, the cell being circled (at the head of the arrow) as shown in FIG. 7C . Because this is an internal (I!=1) case, the beta function may simply multiply the value stored in the circled t−1 cell by one.
[0088] Further, those skilled in the art will note that beta may just be one function in the expression for beta given above. There may also be a need to multiply the value in the circled t−1 cell (at the non-headed of the arrow) shown in FIG. 7C by P(et|yt=y1), which is equivalent to the circled value in the input vector shown in FIG. 8 .
[0089] Accordingly, the value added to the circled cell at time t is the value in the circled cell from time t−1 multiplied by the value in the input vector indicated shown in FIG. 8 (and multiplied by 1). This may be for only one case of previous and current elements (yt-1=y2 and yt=y1). Iterations may be carried through every combination of previous and current elements, performing similar calculations, and the results are cumulatively added to the gamma matrix at time t.
[0090] A further iteration may be considered—the iteration dealing with the case relating to the first column (I=1). To visualize this, those skilled in the art may assume they are dealing with the case of yt-1=y4 and yt=y1. The current element is the same, but now there may be an assumption that the previous element was y4 instead of y2. The active cells are shown in FIG. 7D .
[0091] In such a case, there are no active cells at time t that follow an active cell of the same sequence at time t−1. However, as shown in FIG. 7E , there is a first-column (I=1) cell at time t and a final-element cell at time t−1. Although this fails to satisfy the conditions for beta=1, it does satisfy the conditions for beta=A0, where A0 represents the (constant) transition probability between sequences (noting that the general case may be represented as A0(Si,Sj)). Those skilled in the art will note that the circled t−1 cell (at the non-headed end of arrow) shown in FIG. 7E need not be in the last column (I=4), but may be the last element of a given sequence. Still referring to FIG. 7E , the value in the cell circled at time t−1 would be multiplied by A0 and multiplied by the value corresponding to y4 in the input vector, and the product would be added to the value stored in the circled cell at time t.
[0092] In summary, in one or more embodiments of the present invention, for each combination of previous and current elements, a sequence learner may determine which active cells satisfy the conditions for either beta=1 or beta=A0. The sequence learner may multiply the legal values from time t−1 by the beta and then multiply by the corresponding value from the input vector. The result across all combinations of previous and current elements is then summed to reach a final gamma.
[0093] As described above, in one or more embodiments of the present invention, each gamma is defined in terms of the previous gamma. With respect to determining the first gamma, those skilled in the art will note that the first observed element, yt=0=ya, may correspond to any index in a sequence with equal likelihood. In one or more embodiments of the present invention, the number of occurrences of ya across all sequences may be determined as follows:
[0094]
The probability of an element in a sequence is 1 over this sum if that element is a ya and zero otherwise:
The probability of an element in a sequence is 1 over this sum if that element is a ya and zero otherwise:
[0095]
[0096] For example, referring to FIG. 9 , consider the first iteration of the sum, where yi=y1. There are 4 cells in the gamma matrix that correspond to y1. Each of these cells may be populated by ¼ multiplied by the first entry in the input vector, P(et|y1). This operation may then be repeated for yi=y2, and so forth.
[0097] Further, in one or more embodiments of the present invention, it may be necessary, or otherwise desirable, to initialize a gamma at times other than at time t=0. For example, in some cases, a sequence learner may perform calculations that yield no useful results regarding the sequence to which an input vector belongs. Thus, when a sequence learner has an output probability that meets one or more certain characteristics (e.g., the output distribution is uniform), gamma may be re-initialized as described above by treating the first input vector as a new input at time t=0.
[0098] Those skilled in the art will note that in one or more embodiments of the present invention, gamma will become small over time. Even when high-probability elements correspond to legal paths along learned sequences, there may be some energy in the input that does not correspond to legal paths and is therefore not passed along to the output probabilities. Further, each transition multiplies by a factor of A0<1, which may diminish the input. However, the accuracy of the sequence learner may not be affected if, for example, the probabilities in a gamma matrix (examples described above) are normalized to 1. Thus, in one or more embodiments of the present invention, the output distribution of a sequence learner may simply be normalized to render accurate probabilities. Further, in one or more embodiments of the present invention, should it be desirable to prevent gamma from diminishing to numbers over time that are “too small,” gamma may be periodically normalized. Gamma may be normalized, for example, by dividing each entry in the matrix by a sum total of the entire matrix.
[0099] Those skilled in the art will note that the description above in regard to computing (and initializing) gamma represents only an example of how a sequence learner may calculate output probabilities. In one or more other embodiments of the present invention, a sequence learner may use one or more different operations or techniques to calculate output probabilities.
[0100] Further, in one or more embodiments of the present invention, a sequence learner may output a probability for an input sequence as opposed to for each input element. For example, if the sequence ‘123’ is received over time, the sequence learner may output a probability upon receiving the last element, i.e., ‘3’, in the sequence as opposed to outputting a probability for each element ‘1’, ‘2’, and ‘3’. A determination as to when a particular sequence ends and when to output the corresponding probability may depend on one or more various criteria. For example, in one or more embodiments of the present invention, if a transition probability (e.g., A0 described above) meets a certain threshold, a sequence learner may then output a probability for the sequence received over time until meeting the threshold. Further, in one or more embodiments of the present invention, a sequence learner may output a probability if a transition probability peaks (i.e., a fast rise followed by a fast fall, or vice-versa). Further, in one or more embodiments of the present invention, a sequence learner may output a probability if a correlation between distributions indicates that a new sequence has occurred. Further, in one or more embodiments of the present invention, a sequence learner may track a change in a “motion” (i.e., computations) of the sequence learner and then output a probability when there is a change inconsistent with the tracked motion.
Pooling
[0101] As described above, learning causes in an HTM-based system may involve learning patterns and sequences of patterns. In general, patterns and sequences that occur frequently are stored and assigned to the same causes. For example, groups of patterns that occur frequently at some statistically significant rate may be assigned to the same cause. In the case of sequences, sequences that occur frequently at some statistically significant rate may be assigned to the same cause. Accordingly, learning causes may effectively entail mapping many patterns and/or sequences to a single cause. Such assigning of multiple patterns and/or sequences to a single cause may be referred to as “pooling.”
[0102] In one or more embodiments of the present invention, pooling may be dependent on “spatial” similarities between two or more patterns (noting that a pattern may actually represent a sequence from a lower level). In such embodiments, an HTM node may compare a spatial property of a received sensed input pattern with that of a learned sensed input pattern (or “quantization” point). If the two patterns are “similar enough” (i.e., have enough “overlap”), then the received sensed input pattern may be assigned to the same cause as that of the quantization point. For example, if a quantization point is equal to ‘10010110’, then a received sensed input pattern of ‘10011110’ may be assigned to the same cause as that of the quantization point due to there being a difference of only bit between the two patterns. Those skilled in the art will note that the amount of similarity needed to perform such “spatial” pooling may vary within and/or among HTM-based systems.
[0103] Further, in one or more embodiments of the present invention, pooling may involve assigning patterns that occur in order to the same cause. For example, if an HTM node receives pattern A followed by pattern B followed by pattern D, then patterns A, B, and D may be assigned to the same cause as there is some likelihood that this sequence of patterns was caused by the same object. Accordingly, such “temporal” pooling enables the mapping of patterns, some or all of which may have no significant spatial overlap, to a single cause.
[0104] Further, in one or more embodiments of the present invention, pooling may involve learning the timing between received input patterns. For example, an HTM node that learns a sequence of patterns A, B, and C may also learn the timing between the patterns in the sequence. Sequences having such timing are assigned to the same cause. In such a manner, an HTM node, and an HTM in general, may assign sequences to a cause based on rhythm (i.e., the timing relationship from one element in a sequence to the next element in the sequence) and/or tempo (i.e., the overall speed of the sequence).
[0105] Further, in one or more embodiments of the present invention, pooling may involve controlling an HTM node to assign two or more patterns to the same cause. For example, a higher level HTM node may send a signal to a lower level HTM node directing the lower level HTM node to assign two or more patterns received by the lower level HTM node to the same cause. These two or more patterns may have no spatial overlap or temporal relationship.
[0106] Determining Causes of Novel Input
[0107] After an HTM has learned, or while the HTM is continuing to learn, one or more causes in its world, the HTM may determine causes of novel input using what may be referred to as “inference.” In general, presented with novel sensed input data, an HTM may infer which of its learned causes is/are the source of the novel sensed input data based on statistical comparisons of learned patterns and sequences thereof with patterns and sequences thereof in the novel sensed input data.
[0108] When an HTM node receives a new sensed input pattern, the HTM node assigns probabilities as to the likelihood that the new sensed input pattern matches each of its learned sensed input patterns. The HTM node then combines this probability distribution (may be normalized) with previous state information to assign probabilities as to the likelihood that the new sensed input pattern is part of each of the learned sequences of the HTM node. Then, as described above, the distribution over the set of sequences learned by the HTM node is passed to a higher level node.
[0109] Those skilled in the art will note that the distribution passed by an HTM node is derived from a “belief” as to the likelihood that each learned cause is the cause of sensed input patterns at the input of the HTM node. A “belief” also includes those messages that are derived from or based on the belief. For example, an HTM node having learned five causes may deterministically assign percentages to each of the five learned causes as being the cause of sensed input patterns. The distribution of percentages (or “belief” as described above) may be normalized (or unnormalized) and passed to a parent node. The parent node may then determine coincidences among the distributions sent from its child nodes, and then, based on its learned sensed input patterns and sequences thereof, pass to a yet higher level node its own belief as to the likelihood that each of its learned causes is the cause of sensed input patterns at its input. In other words, a parent node forms its own “higher level” belief as to the cause of the sensed input patterns at least partly based on some statistical convergence of the beliefs passed from its child nodes.
[0110] Further, in one or more embodiments of the present invention, inferring causes may occur during learning. Further, in one or more embodiments of the present invention, learning by an HTM may be disabled, in which case, inference may continue to occur.
[0111] As described above, one or more causes of sensed input patterns may be determined by an HTM through a series of inference steps ascending through the hierarchy of the HTM. Further, in one or more embodiments of the present invention, one or more causes of sensed input patterns may be determined based on information descending through the hierarchy of the HTM. In general, by combining its memory of likely sequences of sensed input patterns with current input (i.e., beliefs from lower level nodes), a node in an HTM may have the ability to “predict” (i.e., make “predictions” as to) what is likely to happen next.
[0112] When a node in an HTM generates a prediction of what is likely to happen next, the prediction, or “prior probability,” biases lower level nodes in the HTM to infer the predicted causes. This may be achieved by a higher level node passing a probability distribution over its learned sensed input patterns (as opposed to over its learned sequences) to a lower level node. This probability distribution may be used by the lower level node as an expectation as to the next sensed input pattern. For example, if an HTM is processing text or spoken language, the HTM may automatically predict what sounds, words, and ideas are likely to occur next. Such a process may help the HTM understand noisy or missing data. In other words, for example, if an ambiguous sound arrived, the HTM may likely interpret the sound based on what the HTM was expecting. In general, prediction may influence the inference process by biasing at least part of an HTM to settle on one or more expected beliefs. Moreover, in one or more embodiments of the present invention, a prediction may be fed back from a higher level node in an HTM to a lower level node in the HTM as a substitute (at least in part) for sensory input data to the lower level node.
[0113] Further, in one or more embodiments of the present invention, one or more prior probabilities may be set manually in addition to or instead of having prior probabilities set via prediction. In other words, an HTM may be manually controlled to anticipate a particular cause or set of causes.
Belief Propagation
[0114] As described above, in one or more embodiments of the present invention, inferring causes of sensed input patterns involves passing beliefs from lower level nodes to higher level nodes. In FIG. 10 , such “belief propagation” is shown in HTM 80 (beliefs indicated with arrows; nodes shown, but not labeled). Generally, as described above, a belief is a vector of values, where each value represents a different cause. A current belief of a node may be a distribution of several causes being at least partially active at the same time. Further, the values in the belief vector may be normalized so that a stronger likelihood of one cause represented in the vector will diminish the likelihood of other causes represented in the vector. Further, those skilled in the art will note that a meaning of a value representing a cause in a belief vector may not vary depending on what other causes represented in the belief vector are active.
[0115] As described above with reference to FIG. 2 , an HTM is a hierarchy of connected nodes. Each node may be thought as having a belief. In one or more embodiments of the present invention, a belief at one node may influence a belief at another node dependent on, for example, whether the nodes are connected via a conditional probability table (CPT).
[0116] A CPT is a matrix of numbers, where each column of the matrix corresponds to the individual beliefs from one node, and where each row of the matrix corresponds to the individual beliefs from another node. Thus, those skilled in the art will note that by multiplying a vector representing a belief in a source node by an appropriate CPT results in a vector in the dimension and “language” of beliefs of a destination node. For example, in an HTM-based system designed for operation in a “weather” domain, a lower level node may form a belief about air temperature and have values representing the likelihood of the following causes: “hot”; “warm”; “mild”; “cold”; and “freezing”. A higher level node may form a belief about precipitation and have values representing the likelihood of the following causes: “sunny”; “rain”; “sleet”; and “snow”. Thus, using a CPT, the belief about air temperature in the lower level node may inform the belief about precipitation in the higher level node (and vice-versa). In other words, multiplying the vector representing the belief about air temperature in the lower level node by the CPT results in a vector representing the appropriate belief about precipitation in the higher level node.
[0117] Accordingly, in one or more embodiments of the present invention, belief propagation allows an HTM to infer causes such that each node in the HTM represents a belief that is maximally or optimally consistent with its input. Those skilled in the art will note that performing inference in such a manner results in ambiguities being resolved as beliefs ascend through the HTM. For example, in an HTM (or part thereof) having a parent node and two child nodes, if (i) the first child node believes with 80% certainty that it is seeing a “dog” and with 20% certainty that it is seeing a “cat” and (ii) the second child node believes with 80% certainty that it is hearing a “pig” and with 20% certainty that it is hearing a “cat,” then the parent node may decide with relatively high certainty that a “cat” is present and not a “dog” or “pig.” The parent node effectively settled on “cat” because this belief is the only one that is consistent with its inputs, despite the fact the “cat” image and the “cat” sound were not the most likely beliefs of its child nodes.
[0118] Further, as described above, a higher level node in an HTM may pass a “prediction” to a lower level node in the HTM. The “prediction” is a “belief” in that it contains values representing the likelihoods of different causes. The vector representing the belief in the higher level node may be multiplied by an appropriate CPT to inform a belief in the lower level node. Thus, in effect, a higher level node in an HTM uses its learned sequences combined with recent state information (i.e., the current input to the higher level node) to (i) predict what its next belief should be and (ii) then pass the expectation down to one or more lower level nodes in the HTM.
[0119] FIG. 11 shows a flow process in accordance with an embodiment of the present invention. Particularly, FIG. 11 shows in summary the steps of belief propagation described above. Initially, a current node in the HTM receives input (in the form of sensed input patterns or beliefs from lower level nodes) ST82. Based on the received input and any beliefs passed down from a higher level node, the current node forms/adjusts its belief as to the likelihood of causes at its input distributed over its learned causes ST84. This belief is then passed to higher level and/or lower level nodes to inform beliefs at those nodes ST86.
Spatial Attention
[0120] To facilitate a determination of causes of input patterns sensed by an HTM, the HTM may “focus” the determination. An HTM provided with the ability to focus when determining causes of sensed input patterns may be referred to as having “attention.” For example, in one or more embodiments of the present invention, an HTM may have the capacity to focus on a subset of an entire input space. An HTM having such a capacity may be referred to as having “spatial attention.”
[0121] FIG. 12 shows a portion of an HTM 90 having spatial attention in accordance with an embodiment of the present invention. The portion of HTM 90 shown in FIG. 12 has level L1 nodes 92, 94 and level L2 node 96. Level L1 node 92 has an input range of i1-ix, and level L1 node 94 has an input range of ix+1-iy. Accordingly, level L2 node 96 has an input range of i1-iy.
[0122] As shown in FIG. 12 , level L1 nodes 92, 94 are connected to level L2 node 96 by connections 98, 100. Connections 98, 100 are referred to as being “permanent” in that data/information is always allowed to flow from level L1 nodes 92, 94 to level L2 node 96 over connections 98, 100.
[0123] Further, level L1 nodes 92, 94 may be connected to level L2 node 96 by connections 102, 104. Connections 102, 104 are routed through a relay module 106. Those skilled in the art will note that the depiction of relay module 106 in FIG. 12 is only a representation. In other words, although relay module 106 is shown in FIG. 12 as being positioned between level L1 nodes 92, 94 and level L2 node 96, in one or more other embodiments of the present invention, relay module 106 may be positioned elsewhere (either in software or hardware).
[0124] In the case, for example, that level L2 node 96 is “not paying attention” to level L1 node 92 due to the state of relay module 106, if level L1 node 92 experiences an unexpected event at its input, level L1 node 92 may send a “strong” signal to relay module 96 over connection 108 in order to cause relay module 106 to allow data/information to flow from level L1 node 92 to level L2 node 96 over connection 102. Further, in the case, for example, that level L2 node 96 is “not paying attention” to level L1 node 94 due to the state of relay module 106, if level L1 node 94 experiences an unexpected event at its input, level L1 node 94 may send a “strong” signal to relay module 106 over connection 100 in order to cause relay module 106 to allow data/information to flow from level L1 node 94 to level L2 node 96 over connection 104.
[0125] Further, in the case, for example, that level L2 node 96 is “not paying attention” to level L1 node 92 due to the state of relay module 106, if level L2 node 96 needs to pay attention to the input space of level L1 node 92, level L2 node 96 may send a “strong” signal to relay module 106 over connection 112 in order to cause relay module 106 to allow data/information to flow from level L1 node 92 to level L2 node 96 over connection 102. Further, in the case, for example, that level L2 node 96 is “not paying attention” to level L1 node 94 due to the state of relay module 106, if level L2 node 96 needs to pay attention to the input space of level L1 node 94, level L2 node 96 may send a “strong” signal to relay module 106 over connection 114 in order to cause relay module 106 to allow data/information to flow from level L1 node 94 to level L2 node 96 over connection 104.
[0126] Further, the flow of data/information over connections 102, 104 may be dependent on the assertion of signals to relay module 106 over connections 116, 118. As shown in FIG. 12 , connections 116, 118 do not originate from level L1 nodes 92, 94 or level L2 node 96. Instead, for example, in one or more embodiments of the present invention, signals over connections 116, 118 may be controlled by a control module (not shown). Generally, in one or more embodiments of the present invention, signals over connections 116, 118 may originate from any portion of an HTM-based system not shown in FIG. 12 .
[0127] As described above, relay module 106 provides a means to switch “on” and “off” connections between lower and higher level nodes. This has the effect of limiting or increasing what an HTM perceives.
[0128] Further, in one or more embodiments of the present invention, relay module 106, instead of switching “on” and “off” data/information flow over connections 102, 104, may otherwise modify or set the value of data/information flowing over connections 102, 104. For example, relay module 106 may modify a probability distribution sent from level L1 node 92 over connection 102.
[0129] Category Attention
[0130] In one or more embodiments of the present invention, an HTM, possibly in addition to having spatial attention, may have what may be referred to as “category attention.” An HTM having category attention may focus the HTM on a particular category of causes/objects. FIG. 13 shows a portion of an HTM 120 in accordance with an embodiment of the present invention. In FIG. 13 , the levels and nodes (shown, but not labeled) are similar to that shown and described above with reference to FIG. 2 . Further, HTM 120 is provided with, or at least connected to, a category attention module 122. The category attention module 122 may be singly or multiply connected (possible connections indicated in FIG. 13 with dashed lines) to any of the nodes in HTM 120.
[0131] Category attention module 122 allows for the control of categories of causes (e.g., by selecting one or more contexts) that may be considered by a node connected to the category attention module 122. Thus, for example, if HTM 120 expects to receive inputs of category “CAT,” category attention module 122 may assert a signal to the only node in level L3 so as to effectively switch “off” the consideration of non-“CAT” categories (e.g., category “DOG”). In other words, category attention module 122 may be used to select a context for what at least a portion of HTM 120 perceives. In one or more other embodiments of the present invention, category attention module 122 may assert a context that is not to be perceived by at least a portion of HTM 120. For example, category attention module 122 may assert context “DOG,” whereby all contexts other than “DOG” may be perceived by HTM 120.
Directed Behavior
[0132] As described above, an HTM in accordance with embodiments of the present invention is able to learn and form representations of causes in its world and then later predict causes as the HTM senses novel input. In essence, an HTM that has learned how causes in its world behave over time has created a model of its world. In one or more embodiments of the present invention, the ability of an HTM to predict causes over time may be used to direct behavior as described below with reference to FIGS. 14 and 15 .
[0133] FIG. 14 shows a portion of an HTM-based system 130 in accordance with an embodiment of the present invention. The HTM-based system 130 has an HTM 146 formed of levels L1, L2, L3, where level L1 has nodes 132, 134, 136, 138, level L2 has nodes 140, 142, and level L3 has node 144. The HTM 146 receives sensed input data, learns and forms representations of causes of the sensed input data, and then infers and predicts causes of novel sensed input data based on its learned causes and representations thereof.
[0134] The HTM-based system 130 further includes a motor behavior and control module 148. The motor behavior and control module 148 has “built-in” or preprogrammed behaviors, which are essentially primitive behaviors that exist independent of the HTM 146. As the HTM 146 discovers and learns causes in its world, the HTM 146 learns to represent the built-in behaviors just as the HTM 146 learns to represent the behavior of objects in its world outside of the HTM-based system 130. Those skilled in the art will note that from the perspective of the HTM 146, the built-in behaviors of the HTM-based system 130 are simply causes in its world. The HTM 146 discovers these causes, forms representations of them, and learns to predict their activity.
[0135] Those skilled in the art will note that in one or more embodiments of the present invention, the motor behavior and control module 148 may be part of or associated with a robot. However, in one or more other embodiments of the present invention, the motor behavior and control module 148 may not be part of or associated with a robot. Instead, for example, the motor behavior and control module 148 may simply provide some mechanism for movement of the HTM-based system 130.
[0136] As described above, HTM 146 learns and forms representations of the built-in behaviors of the HTM-based system 130 as carried out by the motor behavior and control module 148. Next, through an associative memory mechanism, the representations of the built-in behaviors learned by the HTM 146 may be paired with the corresponding mechanisms in the motor behavior and control module 148. For example, in one or more embodiments of the present invention, a node in HTM 146 having a learned representation of a particular built-in behavior (or a part thereof depending on a position of the node in the HTM 146) may send one or more signals to the motor behavior and control module 148 to determine which mechanisms in the motor behavior and control module 58 are active during the occurrence of the particular built-in behavior. Thus, representations of built-in behavior carried out by the HTM-based system 130 are learned by the HTM 146 and then may be associated with the corresponding mechanisms in the motor behavior and control module 148.
[0137] Those skilled in the art will note that in one or more embodiments of the present invention, the learned representations of the built-in behaviors in the HTM 146 may be associated or correlated with the mechanisms creating the built-in behaviors in the motor behavior and control module 148 based on an implementation representing some form of Hebbian learning.
[0138] After the association of a learned behavioral representation in the HTM 146 with a corresponding behavioral mechanism in the motor behavior and control module 148, when the HTM 146 next predicts that behavior, it may actually cause the behavior to occur. For example, using an analogue to human behavior, breathing is considered a built-in, or innate, behavior. A newborn human breathes without having to first learn how to breathe (similar to, for example, eye blinking and movement away from pain). Over time, the human associates learned representations of breathing with the actual muscles that cause breathing. Based on this determined association, the human may then control his/her breathing by, for example, purposefully deciding when to breathe in and/or breathe out. In a similar manner, returning to the context of the HTM-based system 130, the HTM 146, once having learned a representation of a particular behavior (e.g., movement of a robot limb) caused by the HTM-based system 130 and associating the learned representation with a corresponding behavioral mechanism (e.g., the motor responsible for causing movement of the robot limb), may cause, via prediction, the particular behavior to occur.
[0139] FIG. 15 shows a flow process in accordance with an embodiment of the present invention. In ST150, an HTM-based system generates some sort of behavior. The HTM in the HTM-based system observes the behavior ST152, and subsequently over time, the HTM learns causes and forms representations of the observed behavior ST154. Nodes in lower levels of the HTM learn causes and form representations of smaller parts of the behavior relative to that learned and formed by nodes in higher levels of the HTM. For example, in the context of a robot capable of walking in a human-like way, lower level nodes in the HTM may learn causes and form representations of particular toe or knee movements, whereas larger level nodes in the HTM may learn causes and form representations of entire leg, hip, and torso movements.
[0140] Once the HTM learns causes and forms representations of the observed behavior in ST154, each of the nodes in the HTM associates learned causes with corresponding behavioral mechanisms in the HTM-based system ST156. For example, in the context of the robot capable of walking in a human-like way, lower level nodes in the HTM may associate representations of particular toe and knee movements with the mechanisms in the HTM-based system that cause these movements, whereas higher level nodes in the HTM may associate representations of entire leg, hip, and torso movements with the mechanisms in the HTM-based system that cause these larger, or higher-level, movements.
[0141] After determining associations between learned behavioral representations and their corresponding behavioral mechanisms in ST156, the HTM, based on information propagated to and/or through the HTM, may predict and cause particular behaviors to occur ST158. Those skilled in the art will note that in such a manner, an HTM may string together complex sequences of learned built-in behaviors to create novel, complex, and/or goal-oriented behavior.
[0142] Further, in one or more embodiments of the present invention, an HTM-based system may be controlled so as to switch “off” the ability of an HTM to cause one or more particular behaviors. This may be achieved by use of a control module that is capable of selectively switching “off” or damping particular signals from nodes in the HTM to a motor behavior and control component of the HTM-based system.
Architecture
[0143] In one or more embodiments of the present invention, at least part of an HTM network may be provided as a software platform. The HTM network may run on various computer architectures. For example, as shown in FIG. 16 , an HTM network (nodes shown, but not labeled) 160 may run on a single central processing unit (CPU) 162.
[0144] Further, as shown in FIG. 17 , in one or more embodiments of the present invention, an HTM network (nodes shown, but not labeled) 164 may run across several CPUs 166, 168, 170. The CPUs 166, 168, 170 may either be part of a single system (e.g., a single server) or multiple systems. For example, an HTM network may be created in software across several multiprocessor servers, where such a group of servers may be referred to as a “cluster.” The servers in a cluster may be heterogeneous, i.e., the servers may have differing configurations/specifications (e.g., clock speeds, memory size, number of processors per server). Further, the servers may be connected via Ethernet or one or more other networking protocols such as, for example, Infiniband, Myrinet, or over a memory bus. Further, the servers may run any operating system (OS) (e.g., Windows, Linux). In general, each of the servers in a cluster may be responsible for running some portion of an HTM network. The portion of the HTM network dedicated to each server may vary from server to server depending on, for example, the configuration/specification of each server.
[0145] Further, in one or more embodiments of the present invention, the CPUs over which an HTM network runs may be located at a single location (e.g., at a datacenter) or at locations remote from one another.
[0146] As described above, in one or more embodiments of the present invention, at least part of an HTM network may be provided as a software platform. The software executables for creating and running the HTM network may be referred to as being part of a “runtime engine.” As shown in FIG. 18 , a runtime engine 172 of an HTM-based system includes, in addition to the executables for running an HTM network 174, a Supervisor entity 176. In one or more embodiments of the present invention, the Supervisor entity 176 is responsible for, among other things, starting and stopping the HTM network 174 and communicating with external applications (i.e., “tools”) 180, 182, 184, each of which are further described below. However, although the Supervisor entity 176 may be used to start and stop the HTM network 174, it may not be necessary for the Supervisor entity 176 to be running while the HTM network 174 is in operation.
[0147] As shown in FIG. 18 , the Supervisor entity 176 is associated with a net list 178. The Supervisor entity 176 uses a description in the net list 178 to configure the HTM network 174. For example, a description in the net list 178 may specify the distribution of nodes across a given set of CPUs. However, in one or more other embodiments of the present invention, the Supervisor entity 176 may configure an HTM network dynamically if, for example, certain information is not contained in the net list 178. Further, in one or more embodiments of the present invention, the Supervisor entity 176 may read a net list from a date file. Further, in one or more embodiments of the present invention, a net list may be specified interactively by a user using one or more tools 180, 182, 184.
[0148] Further, in one or more embodiments of the present invention, the Supervisor entity 176 may perform global network actions, distribute nodes across CPUs, and/or coordinate CPU activity/behavior. Further, in one or more embodiments of the present invention, the Supervisor entity 176 may enforce licensing restrictions such as those relating to, for example, the number of usable CPUs, license expiration dates, number of user limitations, and/or the ability to load third-party “plug-ins.”
[0149] Further, in one or more embodiments of the present invention, the Supervisor entity 176 may check for software updates on some regular basis. In such embodiments, if there is a software update available, the Supervisor entity 176 may, for example, install the software update and restart the HTM network 174. Further, in one or more embodiments of the present invention, the Supervisor entity 176 may determine and/or select the order in which portions of the HTM network 174 are to be updated.
[0150] Further, in one or more embodiments of the present invention, the Supervisor entity 176 may communicate with one or more CPUs (not shown in FIG. 18 ) running the HTM network 174 using, for example, a private or internal application program interface (API). Further, in one or more embodiments of the present invention, the Supervisor entity 176 and the one or more CPUs (not shown in FIG. 18 ) running the HTM network 174 may all be on the same local area network (LAN).
[0151] Further, in one or more embodiments of the present invention, the Supervisor entity 176 may run on a CPU separate from one or more CPUs (not shown in FIG. 18 ) running the HTM network 174. However, in one or more other embodiments of the present invention, the Supervisor entity 176 may run on a CPU that runs all or part of the HTM network 174.
[0152] FIG. 19 shows at least a portion of an HTM-based system that runs an HTM network 186 on a single CPU 188. In such embodiments of the present invention, an instance of Supervisor entity 190, along with a net list 192, may run on CPU 188. Further, as shown in FIG. 19 , a runtime engine 194 may be composed of the software executables for the HTM network 186, the Supervisor entity 190, and the net list 192.
[0153] FIG. 20 shows at least a portion of an HTM-based system that runs an HTM network 220 on multiple CPUs 222, 224, 226. The CPUs 222, 224, 226 may all be part of the same server (thereby, sharing resources of that server) or they may be distributed over two or more servers. An instance of Supervisor entity 228, along with a net list 230, may run on a separate CPU 232. In such embodiments of the present invention, the Supervisor entity 228 may communicate (across, for example, a switch 234) with instances of “node processing units” (NPUs) 236, 238, 240 running on each of the CPUs 222, 224, 226. Each NPU 236, 238, 240 may be a software component that is responsible for running and/or scheduling a portion (i.e., a “sub-net”) of the HTM network 220 running on the CPU 222, 224, 226 to which the NPU 236, 238, 240 is respectively allocated. At an initial stage, each NPU 236, 238, 240 may receive information from the Supervisor entity 228 describing all or part of the HTM network 220, including information relating to the portion of the HTM network 220 that each NPU 236, 238, 240 will manage. Further, each NPU 236, 238, 240 may be responsible for allocating the memory needed for the nodes, links, and other data structures for the portion of the HTM network 220 for which it is responsible. Further, each NPU 236, 238, 240 may run and/or schedule a portion of the HTM network 220 in some timing relation to at least one other NPU 236, 238, 240.
[0154] Further, in one or more embodiments of the present invention, each NPU 236, 238, 240 may maintain a local net list. A local net list may be used by an NPU to determine when to update one or more nodes, where “updating” a node may include executing an operation of the node and then updating the state of the node. An NPU may perform such updating based on, for example, one or more timestamps of previous updates of one or more nodes, one or more values (e.g., beliefs) of one or more nodes, priorities of one or more nodes, and/or a set of rules for updating nodes.
[0155] To “schedule” an HTM computation means to determine the timing of the invocation of compute methods on the nodes in the network. The present invention includes a technique for scheduling HTM computation across one or more CPUs which (1) enables concurrent computation (2) does not require a central point of control (e.g. a controller entity that “orchestrates” the computation), (3) does not require global synchronization, (4) in some embodiments ensures that the same results are achieved whether the nodes are executed in parallel or serially. In one embodiment the scheduler can be used in the example shown in FIG. 20 where various NPUs 236, 238, 240 include nodes that need to be scheduled in a manner that ensures that accurate data is input to each node so that data dependency requirements are satisfied. Conventional solutions to this scheduling problem utilize a central coordinator that orchestrates each computation to ensure that data dependency requirements are met, or a Bulk Synchronous Parallel execution model that requires global synchronization. A central coordinator introduces overhead that reduces performance. Global synchronization causes NPUs to be unnecessarily idle by forcing all NPUs to wait on the slowest NPU. While global synchronization can be appropriate for problems with static or slowly varying load balance, it may be overly restrictive when the balance of workload across NPUs is rapidly changing, as often happens in HTMs. In contrast, the present invention has no centralized point of control and only local, data-driven synchronization.
[0156] In various embodiments, an NPU, e.g., 236, 238, 240, may include a single node or multiple nodes. A first node is directly dependent upon a second node if the output of the second node is an input to the first node. It is important to have all dependencies completed before invoking a compute operation on a node. In this example, in order to properly execute, a compute operation on the second node needs to be invoked before a compute operation on the first node, so that the output of the second node can be used by the compute operation of the first node. In situations where the first and second nodes are controlled by a single NPU 236, 238, 240, this scheduling can be accomplished by the NPU 236, 238, 240. However, if the first and second node are controlled by different NPUs then the data driven scheduling system and method of the present invention ensures that the dependency requirements are satisfied without requiring the use of a central controller or timer, or global synchronization among the NPUs.
[0157] FIG. 28 shows a flow process for a local synchronization technique in accordance with an embodiment of the present invention. This synchronization technique is used together with a method for managing output buffers and a method for selecting nodes for computation. Together, the synchronization technique, output buffer management method and node selection method form a scheduling method in accordance with an embodiment of the present invention.
[0158] Within each NPU is a scheduler unit (scheduler) that schedules the nodes controlled by the NPU and coordinates directly with other NPUs. The scheduler can be a subprogram that is executed by the NPU and can be in the form of software, firmware, or hardware, or other computer readable media or structures capable of storing electronic instructions, including ASICs, EPROM, EEPROMS, for example. In one embodiment the scheduler makes all scheduling decisions and coordinates communication with other NPUs, but the actual node computation and inter-NPU communication is performed by the NPU itself, acting at the request of the scheduler. In another embodiment, the scheduler also initiates node computation and inter-NPU communication. Those skilled in the art will realize that the boundary between these functions is arbitrary. For ease of discussion, these actions will be described in some cases as being performed by the scheduler and in other cases by the NPU, but it should be understood that either entity could perform these actions without departing from the scope of the present invention.
[0159] An NPU communicates with other NPUs that either (a) receive an output from one of its nodes or (b) output a signal which is an input to one of its nodes. These other NPUs are also referred to as (a) directly downstream NPUs or (b) directly upstream NPUs. With respect to a first NPU, a second NPU may be a downstream NPU, an upstream NPU, both an upstream and a downstream NPU, or neither.
[0160] The data communicated with other NPUs includes node outputs, the Done and Ready messages described below, and any other data associated with the protocol. Such communication may be performed over a network, or may require no explicit action on the part of the NPU, for example, when the data resides in memory that is directly accessible by another NPU. For ease of discussion, messages transmission and reception will be described with reference to the NPU generally but it is understood that these messages can be created, sent and received in a variety of ways without departing from the scope of the present invention.
[0161] A supervisor 190 may send a “run” command to each NPU 236, 238, 240 to initiate HTM computation. However, the supervisor 190 does not control the scheduling and merely initiates HTM network computation, which is performed autonomously by the NPUs 236, 238, 240. The supervisor 190 may also send commands requesting that the NPUs 236, 238, 240 enable or disable execution for one or more nodes.
[0162] The “run” command sent by the supervisor 190 may include a request for a specific scheduling technique, e.g., phase-based scheduling or pipeline scheduling, among others.
[0163] FIGS. 29 a-d show an example of a phase-based scheduling technique in accordance with an embodiment of the present invention. Three characteristics of phase-based scheduling, described in detail below, are 1) assignment of one or more non-negative integer phases to each node. 2) simple assignment of the output of each node to a single buffer and 3) the epoch synchronization technique shown in FIG. 28 . The technique is performed independently by each NPU, typically in parallel.
[0164] In the example illustrated in FIG. 29 , two NPUs, NP1 and NP2, each include nodes at different levels of the HTM hierarchy. In this example, NP1 includes five nodes (nodes 2902, 2904a, 2904b, 2904c and 2906a), and NP2 includes four nodes (2904d, 2904e, 2906b and 2908). In one embodiment, each node has been assigned a non-negative integer “phase” by the network designer, such that if the nodes are computed in order of their phase, data dependency requirements are satisfied. Node 2902 is at phase one, nodes 2904 are at phase two, nodes 2906 are at phase three, and node 2908 is at phase four. Those skilled in the art will note that in some networks the phases can be assigned automatically, without explicit assignment by a network designer. In networks with “feedback”, each node may be assigned more than one phase, and a node's compute operation is called once for each phase.
[0165] As described below, the phase-based scheduling technique guarantees that within a single NPU, nodes are always computed in order of phase. In this example, on NP1 node 2902 (phase 1) is computed before nodes 2904a, 2904b, 2904c (phase 2), which are computed before node 2906a (phase 3). On NP2, nodes 2904d and 2904e (phase 2) computed before node 2906b (phase 3), which is computed before node 2908 (phase 4). Nodes at the same phase, for example node nodes 2904a, 2904b, 2904c, may be computed in any order. Furthermore, as described below, synchronization between NPUs ensures that nodes assigned to later phases are computed after nodes assigned to earlier phases if required by data dependencies. In this example, NP1 node 2902 (phase 1) is computed before NP2 nodes 2904d, 2904e (phase 2), NP1 node 2904c (phase 2) is computed before NP2 node 2906b (phase 3), NP1 node 2906a (phase 3) is computed before NP2 node 2908 (phase 4).
[0166] When implementing the phase-based scheduling technique, the NPU associates with each node a buffer that stores the output of the compute operation for that node. In FIG. 29 , the buffer is illustrated as being part of the node, however, this is not necessary and the buffer can be any memory location. In one embodiment the buffer is in a memory location from which the controlling NPU has fast access. In other embodiments each node may be associated with more than one buffer. In this example, node processor unit NP1 is an “upstream” node processor from the perspective of NP2 since outputs from nodes in NP1, i.e., node 2a (2906a) and node 1c (2904c), are inputs to nodes in NP2, i.e., node 3 (2908) and node 2b (2906b) respectively. Similarly, NP2 is a “downstream” node processor from the perspective of NP1.
[0167] The output of each node is automatically mirrored to each downstream NPU that requires the output of that node. In one embodiment, the NPU accomplishes mirroring by sending a message to each NPU that requires the output. In another embodiment, one or more downstream NPUs may directly access the output, if the underlying hardware supports such direct access (e.g. using cache-coherent shared memory, or remote direct memory access (RDMA)). In this example, the outputs of NP1 nodes 2902, 2904c and 2906a are mirrored in NP2.
[0168] A local synchronization protocol is used to ensure that data dependencies across NPUs are satisfied. The synchronization protocol is illustrated in FIG. 28 , and is described below in references to FIGS. 29 a-29d. The synchronization produced by this protocol is pairwise, between NPUs that are directly upstream and/or downstream from one another. Depending on the network being computed and the assignment of network nodes to NPUs, the synchronization is generally not global. That is, it does not require all NPUs to reach the synchronization point before any NPU can continue. Those skilled in the art will notice that this is in contrast to existing related techniques which either require global synchronization (e.g. Bulk Synchronous Parallel computation) or always have bi-directional data exchange between pairs of processes.
[0169] Goals of the synchronization technique or protocol include ensuring that an NPU does not compute a node before all of the node's inputs are ready (have valid data) and that an NPU does not send outputs to another node (or NPU) before the other node (or NPU) is ready to receive those outputs.
[0170] During network initialization, each NPU computes a list of “upstream” and “downstream” node processors. As described above, a “downstream” node processor controls nodes whose inputs are computed on the local node. An “upstream” node processor controls nodes whose outputs are used as inputs on the local node. Another node processor may be upstream or downstream, both, or neither. In one embodiment, each NPU informs its Scheduler of the list of upstream and downstream NPs through a scheduler callback.
[0171] The supervisor initiates network computation by sending a “run” command to each NPU, requesting, for example, that each NPU run for a certain number of network iterations, N_iter. Prior to issuing a run command, the supervisor requests from each NPU the maximum and minimum phases for currently enabled nodes. With the “run” command, the supervisor sends the global maximum phase p_gmax, and global minimum phase p_gmin to each NPU so that each has the same maximum and minimum phase for the current computation. In this example, all nodes are enabled, so the global minimum phase is 1 and the global maximum phase is 4. Setting a maximum and minimum phase based on currently enabled nodes eliminates unnecessary synchronization that would occur, for example, during training, when some phases may not be enabled.
[0172] Upon receipt of the “run” command, each NPU initializes the “current epoch” to zero, or to a value specified by the supervisor. The phase scheduler computes a total number of epochs, N_epoch, to compute, as:
N_epoch=N—iter*(p—gmax−p—gmin+1)
N_epoch=N—iter*(p—gmax−p—gmin+1)
[0173] Each NPU then independently performs the computation illustrated in FIG. 28 . The computation in FIG. 28 is described below, first both in general terms and with the example in FIG. 29 from the point of view of NP1, and then using the same example from the point of view of NP2.
[0174] As the first step in FIG. 28 , the Scheduler increments 2802 the current epoch. An epoch is an internal period and represents one phase of a full network iteration for the phase scheduler and an entire network iteration for the pipeline scheduling technique (described below). The “current phase” p_c for the phase scheduler is defined as:
p—c=[(e—c−1)modulo(p_max−p_min+1)]+1
where
p—c=[(e—c−1)modulo(p_max−p_min+1)]+1
where
[0175] p_c=current phase
[0176] e_c=current epoch
[0177] p_max=global maximum phase
[0178] p_min=global minimum phase
In the current example, the current epoch is incremented to one for the first epoch.
[0179] After incrementing 2802 the current epoch each NPU sends 2804 a “Ready” message to all upstream NPUs indicating that the NPU is ready to receive data. In the example illustrated in FIG. 29 , NP2 will send a “Ready” message to NP1. There are no NPUs that are upstream from NP1 so for NP1 no message is sent in step 2804. The NPU waits 2806 for a “Ready” message from all downstream NPUs. In the current example, NP1 waits to receive the “Ready” signal from NP2
[0180] During the course of an epoch, the phase scheduler considers as a candidate for computation every node on the local NPU that has been assigned a phase equal to the current phase. The scheduler determines 2807 whether there are additional nodes with the current phase that have not been considered for computation. If there are, the process continues with step 2808, otherwise the process continues with step 2820. If there are additional nodes in the epoch 2807 that have not been considered, the scheduler selects 2808 a new node. In the current example, the initial epoch is epoch one and the phase for epoch one is one. The only node assigned to phase one is node 1 (2902), so node 2902 is selected by the NP1 scheduler. The scheduler determines 2810 whether the node is enabled. A node can be disabled by a user or by an application (tool), for example. A node may also be disabled or enabled automatically by the scheduler, as described below in the description of the pipeline scheduler.
[0181] If the node is enabled 2810 then the NPU invokes 2812 the compute operation on the node. The output is stored in the buffer associated with the selected node (2902). The NPU makes the output of the node available to any downstream NPUs that require the output of that node. In this example, NP1 makes the output of node 2902 available to NP2. In one embodiment, NP1 sends a message containing a copy of the output of the node, and NP2 places the data into a buffer associated with a “remote node” data structure. The remote node data structure on NP2 is similar to a data structure for a node, but it is identified as not belonging to the NPU on which it resides, and has no compute operation. Various techniques can be used to make data available to NP2 and to implement these “remote” nodes without departing from the scope of the invention.
[0182] The protocol continues by determining 2807 whether there are additional nodes in the epoch that have not been considered for computation. For the phase scheduler, this means determining whether there are additional nodes assigned to the current phase that have not been considered for computation. This is also the next step if the node is not enabled in step 2810. If there are additional nodes in the epoch then the process continues and another node is selected 2808. In the above example, only node 1 (2902) is in the initial epoch for NP1. Since there are no additional nodes in the epoch 2807 that have not been computed the protocol sends 2820 a “Done” message to all downstream NPUs. The “Done” message is an indication that all nodes for a particular epoch in the NPU have completed execution and no additional outputs for this epoch will be sent. In this example, NP1 sends a “Done” message to NP2 indicating that the output data from all nodes in epoch zero, i.e., node 2902, has been sent. The NPU also waits 2822 for “Done” messages from all upstream NPUs. In this example, there are no upstream messages from NP1.
[0183] The done message is included in the protocol because, for example, NP2 does not necessarily know which nodes in NP1 are enabled and which are disabled. In one or more embodiments, the “Done” message steps (2820 and 2822) can be omitted as an optimization if each NPU has complete information about which upstream nodes are enabled and which are disabled. In this case, the NPU can simply count the number of output messages received to know when it has received all messages. Because node enabling/disabling may be done automatically through a local decision on an NPU (as described below) this may require exchange of additional messages with information about node enablement/disablement, negating the benefit of the optimization. In one or more embodiments, the “Done” message may be “piggybacked” on top of data messages in a manner similar to the piggybacking of TCP acknowledgements in the Transmission Control Protocol. In some embodiments, a scheduler may, either automatically or upon a request from the scheduler, automatically disable nodes whose inputs were not updated in the previous epoch (i.e. because upstream nodes were disabled).
[0184] After completing steps 2820 and 2822, the process continues by determining 2830 whether there are additional epochs. In the above example, there are additional epochs and the protocol continues by incrementing 2802 the current epoch, e.g., such that the current epoch is now two. The NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for “Ready” messages from all downstream NPUs, as described above. If there are additional nodes in the epoch 2807 that have not been computed, the scheduler in the NPU, e.g., NP1, selects 2808 a node in the current epoch, i.e., epoch two. In the above example NP1 can select any of nodes 2a (2904a), 2b (2904b) or 2c (2904c). That is, within an epoch, the order of node execution does not matter. As described above, a feature of the present invention is that the result is the same regardless of the order of node execution within an epoch.
[0185] FIG. 29 b is an illustration of the network when the current epoch is epoch two and the current phase is phase two. In the above example, the scheduler on NP1 selects 2808 node 2a (2904a) Node 2904a is enabled (2810). The NPU invokes (2812) the compute operation on node 2904a. The output is stored in the buffer associated with the selected node (2904a). The protocol continues by determining 2807 whether there are additional nodes in the epoch that have not been computed. Since there are, the process continues by selecting 2808 another node in the epoch.
[0186] For purposes of this example, node 2b (2904b) is selected 2808 on NP1. Since node 2b (2904b) is enabled the NPU 2812 invokes 2812 the compute operation on the node. The output is stored in the buffer associated with the selected node (2904b). The protocol continues by determining 2807 whether there are additional nodes in the epoch that have not been computed. Since there are, the process continues by selecting 2808 another node in the epoch. The only remaining node in the epoch (node 2c (2904c) is selected 2808. Since node 2c (2904c) is enabled 2810 the NPU invokes 2812 the compute operation on the node. The output is stored 2814 in the buffer associated with the selected node (2904c). Since the output of node 2c is used by a node in another NPU, i.e., NP2, the value of the output buffer is made available to NP2, as described above. Since there are no additional nodes in the epoch for NP1 2807 that have not been computed, NP1 sends 2820 a “Done” message to all downstream NPUs, e.g., NP2, and waits 2822 for “Done” messages from all upstream NPUs (if any).
[0187] Since there are more epochs 2830 the process for NP1 continues and NP1 increments 2802 the epoch number, e.g., such that the current epoch is 3, and sends 2804 a “Ready” message to all upstream NPUs (if any) and waits 2806 for a “Ready” message from all downstream NPUs, e.g., NP1 waits for a ready message from NP2. FIG. 29 c highlights the nodes 2906 in epoch 2, i.e., nodes 2a (2906a) and node 2b (2906b). The scheduler in NP1 determines 2807 that there are nodes in epoch 2 for NP1 that have not been computed and selects 2808 node 2a (2906a). Since node 2a (2906a) is enabled 2810 the NPU invokes 2812 the compute operation on the node. The output is stored 2814 in the buffer associated with the selected node (2906a). Since the output of node 2a (2906a) is used by a node in another NPU, i.e., NP2, the value of the output buffer is made available to NP2, as described above. Since there are no additional nodes in the epoch for NP1 2807 that have not been computed, NP1 sends 2820 a “Done” message to all downstream NPUs, e.g., NP2, and waits 2822 for “Done” messages from all upstream NPUs (if any). If additional epochs have been requested 2830, the process continues, otherwise it ends.
[0188] Since there are more epochs 2830 the process for NP1 continues and NP1 increments 2802 the epoch number, e.g., such that the current epoch is 4, and sends 2804 a “Ready” message to all upstream NPUs (if any) and waits 2806 for a “Ready” message from all downstream NPUs, e.g., NP1 waits for a ready message from NP2. FIG. 29 d highlights the nodes with current epoch 4. The scheduler in NP1 determines 2807 that there are no nodes in epoch 4 for NP1. Since there are no additional nodes in the epoch for NP1 2807 that have not been computed, NP1 sends 2820 a “Done” message to all downstream NPUs, e.g., NP2, and waits 2822 for “Done” messages from all upstream NPUs (if any). If additional epochs have been requested, the process repeats as described above, except that the next epoch will be five and the next phase will be one.
[0189] In one or more embodiments, each message associated with the protocol, including Done messages, Ready messages, and messages containing output data, may contain the current epoch on the node sending the message. While this additional information is not necessary for successful operation of the protocol, it can aid in, e.g., finding errors in the implementation of the protocol or in the transmission of messages. In one or more embodiments, each message may contain checksum or other validation or verification data that can be used, e.g., to detect or correct transmission errors and aid in debugging.
[0190] NPUs perform the protocol in parallel. For example, while NP1 performs the protocol, as described above, NP2 also performs the protocol. The scheduler on NP2 begins by incrementing 2802 the current epoch so that the new current epoch is one. This would typically occur in parallel (concurrently) with NP1 performing the same action. Since NP2 does not have any nodes in epoch one 2807 the process continues by sending 2820 a “Done” message to all downstream NPs (in our example, NP2 does not have any downstream NPUs) and by waiting 2822 for “Done” messages from all upstream NPUs, e.g., NP1. After sending 2820 and receiving 2822 all “Done” messages, the scheduler determines 2830 whether there are additional epochs. In our example, there are additional epochs and the scheduler increments 2802 the current epoch, i.e. such that the current epoch is two.
[0191] The NPU, e.g., NP2, sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for “Ready” messages from all downstream NPUs, as described above. The scheduler in the NPU, e.g., NP2, checks 2807 to see if there are any nodes in the epoch that have not been computed and if so selects 2808 a node with the current phase, i.e. 2. In the above example NP2 can select either node 2d (2904d) or 2e (2904e). As described above, within an epoch, the order of node execution does not matter.
[0192] If the scheduler selects 2808 node 2d (2904d) then the NPU determines 2810 that the node is enabled. The NPU identifies the memory location for the input to node 2d which corresponds to the remote node from node 1 (2902). In one embodiment, NP2 has a “remote” node that includes a memory location that stores a copy of the node 1 (2902) output. Since node 2d (2904d) is enabled the NPU invokes 2812 the compute operation on the node. The output is stored 2814 in the buffer associated with the selected node (2904d). The protocol continues by determining 2807 whether there are additional nodes in the epoch that have not been computed. Since there are, the process continues by selecting 2808 another node in the epoch.
[0193] The only remaining node in the epoch for NP2 is node 2e (2904e) which is selected 2808. Since node 2e (2904e) is enabled (the NPU identifies the same “remote” node associated with node 0 (2902) where the remote node is a memory location on NP2) the NPU invokes 2812 the compute operation on the node. The output is stored 2814 in the buffer associated with the selected node (2904e).
[0194] Since there are more epochs 2830, the process for NP2 continues and the NPU increments 2802 the epoch number, e.g., so that it is equal to 3, and sends 2804 a “Ready” message to all upstream NPUs, e.g., NP1 and waits 2806 for a “Ready” message from all downstream NPUs (if any). With reference to FIG. 29 c which highlights the nodes 2906 in epoch 3 with current phase 3, i.e., nodes 3a (2906a) in NP1 and node 3b (2906b) in NP2. The scheduler determines 2807 that there are remaining nodes assigned to phase 3 for NP2 that have not been computed and selects 2808 node 3b (2906b). Since node 3b (2906b) is enabled 2810 the NPU invokes 2812 the compute operation on the node. One of the inputs to node 3b (2906b) is the output from a node in a different NPU, i.e., node 2c (2904c) in NP1. In one embodiment, NP2 instructs node 3b (2906b) to use input data from the “remote” node corresponding to node 2c, where the location of the memory location representing the remote node is typically within NP2 and can be a duplicate of the node output in NP1. In alternate embodiments the remote node can have a single location in either NP1 or NP2 and is accessed by the other NPU as needed. The output is stored 2814 in the buffer associated with the selected node (2906b). Since there are no additional nodes in the epoch for NP2 2807 that have not been computed, NP2 sends 2820 a “Done” message to all downstream NPUs (if any), and waits 2822 for “Done” messages from all upstream NPUs, e.g., NP1
[0195] Since there are additional epochs for NP2 2830, the process for NP2 continues and the NPU increments 2802 the current epoch, e.g., so that the current epoch is 4, and sends 2804 a “Ready” message to all upstream NPUs, e.g., NP1 and waits 2806 for a “Ready” message from all downstream NPUs (if any). With reference to FIG. 29 d which highlights the node 2908 in epoch 4. The scheduler determines 2807 that there is a remaining node in epoch 4 for NP2 that has not been computed and selects 2808 node 4 (2908). Since node 4 (2908) is enabled 2810 the NPU invokes 2812 the compute operation on the node. One of the inputs to node 4 (2908) is the output from a node in a different NPU, i.e., node 3a (2906a) in NP1. In one embodiment NP2 instructs node 4 (2908) to use input data from the “remote” node corresponding to node 3a (2906a). The output is stored 2814 in the buffer associated with the selected node (2908). Since there are no additional nodes in the epoch for NP2 2807 that have not been computed, NP2 sends 2820 a “Done” message to all downstream NPUs (if any), and waits 2822 for “Done” messages from all upstream NPUs, e.g., NP1.
[0196] FIGS. 30 a-j show an example of an epoch pipeline scheduling technique in accordance with an embodiment of the present invention. Three characteristics of pipeline scheduling, described in detail below, are 1) automatic enabling/disabling of nodes to enable pipeline fill and drain 2) local pair buffering for each node and 3) the epoch synchronization technique shown in FIG. 28 . The technique is performed independently by each NPU, typically in parallel.
[0197] A local buffer pair comprises two buffers, represented in FIG. 30 as an x buffer and a y buffer associated with each node. In the example shown in FIG. 30 , the nodes of the HTM network are divided among two NPUs. However, any number of NPUs between one and the total number of nodes, e.g., 8, will work with the pipeline scheduler of the present invention. FIG. 30 a is an example of an HTM network for which a pipeline schedule protocol is used in accordance with one embodiment of the present invention. The network includes 8 nodes, node 3002, nodes 3004a-e, nodes 3006a-b and node 3008. The pipeline scheduler has three stages, the filling stage, the steady-state phase and the draining stage.
[0198] FIGS. 30 b-e illustrates the filling stage in accordance with one embodiment of the present invention. The same protocol described in FIG. 28 can be used with a pipeline scheduler. In the case of a pipeline scheduling technique all enabled nodes are computed in a single epoch and, as described above, within the epoch the nodes can be computed in any order without affecting the result because the data dependencies are accounted for prior to the computing of any node at the beginning of each epoch.
[0199] In one or more embodiments of the pipeline scheduler, as described in the example below, pipeline fill and drain is handled automatically by the scheduler, by automatically setting a current maximum and minimum phase. In other embodiments, the enabling and disabling of nodes to fill the pipeline is controlled explicitly by enable/disable commands originating from tools or the user, via the supervisor. A single scheduler implementation can implement both methods, depending on what is requested by the user, which will be guided by the level of control desired by the user and whether the user desires to pause network computation without draining the pipeline.
[0200] The scheduler receives a request from the supervisor to run for some number N_iter network iterations. The request includes a global maximum phase (p_gmax) and a global minimum phase (p_gmin). The pipeline scheduler computes a total number of epochs,
N_epoch=N—iter+p—gmax−p—gmin
The pipeline scheduler also initializes the current maximum phase p_cmax and current minimum phase p_cmin as
p_cmin=p_gmin
p_cmax=p_gmin
i.e., the current maximum and minimum phase are initialized to the global minimum phase. p_cmin and p_cmax are used for automating pipeline fill and drain. p_cmin is the minimum phase that is computed in the current epoch and p_cmax is the maximum phase that is computed in the current epoch.
N_epoch=N—iter+p—gmax−p—gmin
The pipeline scheduler also initializes the current maximum phase p_cmax and current minimum phase p_cmin as
p_cmin=p_gmin
p_cmax=p_gmin
i.e., the current maximum and minimum phase are initialized to the global minimum phase. p_cmin and p_cmax are used for automating pipeline fill and drain. p_cmin is the minimum phase that is computed in the current epoch and p_cmax is the maximum phase that is computed in the current epoch.
[0201] The process begins by filling the pipeline, which takes place during the first p_gmax−p_gmin epochs. At the beginning of each of these filling epochs (starting with epoch 1), p_cmax is set as:
p—cmax=p—gmin+(current epoch)−1
p—cmax=p—gmin+(current epoch)−1
[0202] The process ends by draining the pipeline, which takes place during the final p_gmax−p_gmin epochs, i.e. from epoch N_epoch−p_gmax+p_gmin to epoch N_epoch. At the beginning of each of these draining epochs p_cmin is set as:
p—cmin=(current epoch−N_epoch)+p—gmax
p—cmin=(current epoch−N_epoch)+p—gmax
[0203] Note that pipeline fill and drain can overlap, if N_iter<p_gmax−p_gmin+1. This situation poses no problem for the algorithms, which continue to be well defined.
[0204] In each epoch, the set of nodes that are included in that epoch (2807) is defined for the pipeline scheduler to be those nodes assigned to a phase p for p between p_cmin and p_cmax, inclusive. In order to use the pipeline scheduling technique for a given network, the network must assign exactly one phase to each node. If more than one phase is assigned to a node, the pipeline scheduler cannot be used.
[0205] The pair buffer (x, y) is used as follows. In one embodiment, if the current epoch is odd, then the x buffer is used for input and the y buffer is used for output. If the current epoch is even, then the x buffer is used for output and the y buffer is used for input. Thus, the buffer that is written to as output during one iteration is read from as input during the next iteration, and there is no possibility of concurrently writing to and reading from the same buffer. The pair buffers are mirrored between NPUs in the same way that the single output buffer is mirrored for the phase scheduler. That is, the current output buffer (x or y) is, in one embodiment, sent in a message to downstream NPUs that require it. The downstream NPU may store this output in a pair buffer associated with a “remote node” residing on the downstream NPU. In another embodiment, the pair buffer may be directly accessible to the downstream NPU through, for example, cache coherent shared memory or RDMA access. The table below summarizes the values/status of various parameters for this example.
[0206]
| Epoch No. | State | P_cmin | P_cmax | Output | Input |
|---|---|---|---|---|---|
| 1 | Fill | 1 | 1 | Y | X |
| 2 | Fill | 1 | 2 | X | Y |
| 3 | Fill | 1 | 3 | Y | X |
| 4 | Steady | 1 | 4 | X | Y |
| 5 | Steady | 1 | 4 | Y | X |
| 6 | Steady | 1 | 4 | X | Y |
| 7 | Steady | 1 | 4 | Y | X |
| 8 | Steady | 1 | 4 | X | Y |
| 9 | Steady | 1 | 4 | Y | X |
| 10 | Steady | 1 | 4 | X | Y |
| 11 | Drain | 2 | 4 | Y | X |
| 12 | Drain | 3 | 4 | X | Y |
| 13 | Drain | 4 | 4 | Y | X |
[0207] The operation of the pipeline scheduler will be illustrated with reference to FIGS. 30 a through 30i. In this example, the number of network iterations requested, N_iter, is 10, the global maximum phase, p_gmax, is 4, and the global minimum phase, p_gmin, is 1. By the formula above, the total number of epochs, N_epoch, is 13. As described above, each NPU can include any subset of nodes in the HTM network. For ease of discussion, the example illustrated in FIG. 30 will presume the same assignment of nodes to NPUs NP1 and NP2 that was used for the phase scheduler example. The same general description applies for this network to any assignment of nodes to any number of NPUs from 1 to 8 NPUs total.
[0208] With reference to FIG. 28 , each NPU increments 2804 the current epoch, e.g. so that the current epoch is one, and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch one is a “filling” epoch, and we have: current epoch=1; p_cmin=1; p_cmax=1. Thus, the set of nodes in this epoch is node 1 (3002), which is the only node assigned to phase 1.
[0209] The scheduler on NP1 determines 2807 that there are additional nodes in the epoch that have not been computed and selects 2808 node 1 (3002). NP1 determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs the result to the location instructed by the NPU. In FIG. 30 b, the output of the compute operation is sent to the “Y” buffer associated with node 3002. It is envisioned that the memory locations associated with a particular node may not be part of the node and may change physical locations, however in this embodiment there is a logical memory location for each of the two local pair buffers (X and Y buffers) for each node in the NPU. The protocol continues by determining 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are no more nodes in this epoch, so the NPU sends 2820 a “Done” message to all downstream NPUs. In this example, the “Done” message is sent 2820 from NP1 to The NPU also waits for “Done” message from all upstream NPUs (if any).
[0210] The same process can occur in parallel on NP2. For NP2 the initial epoch is selected 2802 and the NPU sends 2804 and waits 2806 for “Ready” messages, as described above. The scheduler determines 2807 that no node exists in the epoch and the NPU sends 2820 and waits 2822 for “Done” messages, as described above.
[0211] In each NPU there are additional epochs 2830 so the process continues and each NPU increments 2802 the current epoch, e.g., so that the current epoch is 2 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 2 is a “filling” epoch, and we have: current epoch=2; p_cmin=1; p_cmax=2. FIG. 30 c illustrates the network where nodes 3002 and 3004a-e are included in the epoch and nodes 3006a-b and 3008 are not included. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the Y buffer of the upstream node. For example, the input to node 3004a is the Y buffer from node 3002. This can be seen from the lines connecting the Y buffer of 3002 and the input (bottom) section of node 3004a. As described above, the contents of the Y buffer for node 3002 are the output from node 3002 during the previous epoch. The use of at least two buffers helps ensure that data will not be overwritten while still needed. In addition, the output from all nodes during this epoch will be stored in each node's X buffer.
[0212] The scheduler on NP1 determines 2807 that there are additional nodes in the epoch that have not been computed and selects 2808 a node, e.g., node 1 (3002). NP1 determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU. In FIG. 30 c, the output of the compute operation is sent to the “X” buffer associated with node 3002. The protocol continues by determining 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are additional nodes in the epoch that have not been computed, i.e., nodes 3004a-c for NP1 and nodes 3004d-e for NP2. One of the remaining nodes in NP1 is selected 2808, e.g., node 3004a, and NP1 determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU (NP1). The protocol continues by determining 2807 whether additional nodes exist in the epoch in NP1 that have not been computed. The process repeats for nodes 3004b and 3004c. Thereafter, the protocol continues by determining 2807 whether additional nodes exist in the epoch in that NPU, i.e., NP1, that have not been computed. In our example, there are no more nodes in this epoch, so the NPU sends 2820 a “Done” message to all downstream NPUs. In this example, the “Done” message is sent 2820 from NP1 to The NPU also waits for “Done” message from all upstream NPUs (if any).
[0213] The same process can occur in parallel on NP2. For NP2 the epoch is incremented 2802 and the NPU sends 2804 and waits 2806 for “Ready” messages, as described above. The scheduler determines 2807 that a node exists in the epoch that has not been computed, i.e., nodes 3004d-e. One of the remaining nodes in NP2 is selected 2808, e.g., node 3004d, and NP2 determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU (NP2). The protocol continues by determining 2807 whether additional nodes exist in the epoch in NP2 that have not been computed. The process repeats for nodes 3004e. Thereafter, the protocol continues by determining 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are no more nodes in this epoch, so the NPU sends 2820 and waits 2822 for “Done” messages, as described above.
[0214] In each NPU there are additional epochs 2830 so the process continues and each NPU increments 2802 the current epoch, e.g., so that the current epoch is 3 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 3 is a “filling” epoch, and we have: current epoch=3; p_cmin=1; p_cmax=3. FIG. 30 d illustrates the network where nodes 3002, 3004a-e and 3006a-b are included in the epoch and node 3008 is not included in the epoch. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the X buffer of the upstream node. Similar to the process described above each NPU determines 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are additional nodes in the epoch that have not been computed, i.e., nodes 3002, 3004a-c and 3006a for NP1 and nodes 3004d-e and 3006b for NP2. For each NPU a remaining node is selected 2808, e.g., node 3004a, and the NPU determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU (NP1). The protocol continues in each NPU until all enabled nodes have been computed. When there are no more nodes in the epoch 2807 each NPU sends 2820 a “Done” message to all downstream NPUs and waits 2822 for a “Done” message from all upstream NPUs.
[0215] In each NPU there are additional epochs 2830 so the process continues and each NPU increments 2802 the current epoch, e.g., so that the current epoch is 4 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 4 is the first “steady state” epoch in which the entire pipeline is enabled. We have: current epoch=4; p_cmin=1; p_cmax=4. FIG. 30 e illustrates the network where all nodes are included in the epoch. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the Y buffer of the upstream node. Similar to the process described above each NPU determines 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are additional nodes in the epoch that have not been computed, i.e., nodes 3002, 3004a-c and 3006a for NP1 and nodes 3004d-e, 3006b and 3008 for NP2. For each NPU a remaining node is selected 2808, e.g., node 3004a, and the NPU determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU. The protocol continues in each NPU until all enabled nodes have been computed. When there are no more nodes in the epoch 2807 each NPU sends 2820 a “Done” message to all downstream NPUs and waits 2822 for a “Done” message from all upstream NPUs.
[0216] The process for epochs 5-10 (the remainder of the steady state) proceed in a manner similar to that described above and with the source of the input to each node changing from the X buffer of the upstream node, to the Y buffer of the upstream node and back to the X buffer as the epochs are incremented. FIGS. 30 e and 30f illustrate the steady state in this example.
[0217] After the steady state, the process drains the pipeline during the draining stage. FIGS. 30 g-j illustrate the operation of the draining stage. In the draining stage the upstream nodes are not included while the process continues to operate consistently with the process set forth in FIG. 28 .
[0218] After determining 2830 that there are more epochs at the conclusion of the steady-state stage, corresponding to epoch 10 in the current example, each NPU increments 2802 the current epoch, e.g., so that the current epoch is 11 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 11 is a “draining” epoch, and we have: current epoch=11; p_cmin=2; p_cmax=4. FIG. 30 g illustrates the network where nodes 3004a-e, 3006a-b and 3008 are included and node 3002 is not included. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the X buffer of the upstream node. Similar to the process described above each NPU determines 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are additional nodes in the epoch that have not been computed, i.e., nodes 3004a-c and 3006a for NP1 and nodes 3004d-e, 3006b and 3008 for NP2. For each NPU, a remaining node is selected 2808, e.g., node 3004a, and the NPU determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU (NP1). The protocol continues in each NPU until all enabled nodes have been computed. When there are no more nodes in the epoch 2807 that have not been computed each NPU sends 2820 a “Done” message to all downstream NPUs and waits 2822 for a “Done” message from all upstream NPUs.
[0219] Since there are more epochs 2830, each NPU increments 2802 the current epoch, e.g., so that the current epoch is 12 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 12 is a “draining” epoch, and we have: current epoch=12; p_cmin=3; p_cmax=4. FIG. 30 h illustrates the network where nodes 3006a-b and 3008 are included and nodes 3002 and 3004a-e are not included. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the Y buffer of the upstream node. Similar to the process described above each NPU determines 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there are additional nodes in the epoch that have not been computed, i.e., node 3006a for NP1 and nodes 3006b and 3008 for NP2. For each NPU, a remaining node is selected 2808, e.g., node 3006a, and the NPU determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU. The protocol continues in each NPU until all enabled nodes have been computed. When there are no more nodes in the epoch 2807 that have not been computed each NPU sends 2820 a “Done” message to all downstream NPUs and waits 2822 for a “Done” message from all upstream NPUs.
[0220] Since there are more epochs 2830, each NPU increments 2802 the current epoch, e.g., so that the current epoch is 13 and each NPU sends 2804 a “Ready” message to all upstream NPUs and waits 2806 for a “Ready” message from all downstream nodes. As defined above, epoch 13 is a “draining” epoch, and we have: current epoch=13; p_cmin=4; p_cmax=4. FIG. 30 i illustrates the network where node 3008 is included and the remaining nodes, i.e., 3002, 3004a-e, and 3006a-b, are not included. In addition, the source of the input to each node has changed. The input to each node that will be used in the compute operation is located in the X buffer of the upstream node. Similar to the process described above each NPU determines 2807 whether additional nodes exist in the epoch in that NPU that have not been computed. In our example, there is a node in the epoch for NP2 that has not been computed, i.e., node 3008 for NP2. NP2 selects 2808 a remaining node, i.e., 3008, and the NPU determines 2810 that the node is enabled and then invokes 2812 the compute operation and outputs 2814 the result to the location instructed by the NPU. Since there are no more nodes in the epoch 2807 that have not been computed each NPU sends 2820 a “Done” message to all downstream NPUs and waits 2822 for a “Done” message from all upstream NPUs. FIG. 30 g illustrates the network after it has been drained. In another embodiment of the pipeline scheduling method, the scheduler on each NPU is able to automatically fill and drain the pipeline, without a phase being assigned to each node, as long as each NPU knows the total depth of the pipeline. This is accomplished using a different rule to determine which nodes belong to an epoch. The rule is that a node belongs to an epoch N if and only if all of its inputs were updated in epoch N−1. For the first epoch (N=1), the set of nodes belonging to epoch 1 is the set of nodes with no inputs—usually sensors. Furthermore, nodes with no inputs are disabled starting at iteration N_epoch−pipeline_depth+1. This approach will have the same effect as the previously described fill/drain mechanism if the graph representing the connectivity of the HTM network has no loops in it and phases were assigned in a natural way.
[0221] Those skilled in the art will recognize that the pipeline scheduler technique and the phase scheduler technique produce identical network computation if and only if the HTM network has a simple feed-forward structure, that is, if the outputs of nodes at phase N are only connected to inputs of nodes at phase N+1. Furthermore, if the network has more than one phase assigned to any node, the pipeline scheduler cannot be used at all.
[0222] Those skilled in the art will further recognize that the technique described above can be extended to utilize more than two output buffers per node. The use of additional buffers may further reduce synchronization requirements by allowing upstream nodes to compute farther “ahead” of downstream nodes.
[0223] As described herein, one embodiment the present invention operates in an HTM network executable at least in part on multiple node processing units (NPUs). In one embodiment the NPUs include one or more nodes, each of which can be executed by its NPU. In one embodiment, the present invention coordinates and schedules NPUs without the need for a central point of control or a clock. The present invention includes a technique for scheduling HTM computation across one or more CPUs which (1) enables concurrent computation (2) does not require a central point of control (e.g. a controller entity that “orchestrates” the computation), (3) does not require global synchronization, (4) in some embodiments ensures that the same results are achieved whether the nodes are executed in parallel or serially.
[0224] Additional aspects of the HTM environment are described below.
[0225] Further, as shown in FIG. 20 , a runtime engine 242 may be composed of the software executables for the HTM network 220, the Supervisor entity 228, the net list 230, and the NPUs 236, 238, 240. Moreover, a file server (not shown) may be present to store file information for one or more of the various components shown in FIG. 20 .
[0226] Further, as shown, for example, in FIG. 20 , there is one NPU per CPU running a portion of an HTM network. However, in one or more other embodiments of the present invention, there may be a different relationship as to the number of NPUs allocated per CPU.
[0227] As described above with reference to FIG. 18 (also shown in FIGS. 19 and 20 ), a runtime engine 1720 running HTM network 174 may interface with one or more tools 180, 182, 184. Each of these tools 180, 182, 184 may be used by a user (e.g., a software developer) to, for example, modify, improve, augment, restrict, configure, or otherwise affect an operation or configuration of the HTM network 174 or a CPU on which the HTM network 174 runs. Generally, in one or more embodiments of the present invention, Configurator tool 180 may be used to create and/or configure an HTM network, Trainer tool 182 may be used to create a trained HTM network for a particular application, and/or Debugger tool 184 may be used to debug the operation of an HTM network. Further, in one or more embodiments of the present invention, tools (not shown) may be provided to, for example, monitor/report performance of an HTM network and/or deploy a designed, trained, and/or debugged HTM network as a running application. In general, one or more embodiments of the present invention may use any number and/or types of different tools to interface with an HTM network.
[0228] In one or more embodiments of the present invention, a Supervisor entity (e.g., 176 in FIG. 18 , 190 in FIG. 19 , 228 in FIG. 20 ) may communicate with developer/client tools (e.g., 180, 182, 184 in FIG. 18 ) using a designated Supervisor API. In one or more embodiments of the present invention, the Supervisor API may support Unicode and/or multi-byte character sets.
[0229] Because the developer/client tools may reside at, or otherwise be accessible from, locations remote from a location running a particular HTM network, a Supervisor API may be accessible through, for example, a firewall. One protocol that may be used to facilitate such accessibility involves encoding messages in Extensible Markup Language (XML) and passing them over the Internet (i.e., HTTP transmission). If security is desired or required, then messages may be passed over a secure Internet protocol (e.g., HTTPS transmission). Further, in one or more embodiments of the present invention, if a Supervisor entity (e.g., 176 in FIG. 18 , 190 in FIG. 19 , 228 in FIG. 20 ) and developer/client tools (e.g., 180, 182, 184 in FIG. 18 ) are on the same LAN, messages may be passed using means such as, for example, socket connections and/or pipes.
[0230] As described above, a Supervisor API may interact with developer/client tools. In one or more embodiments of the present invention, the Supervisor API may be used to authenticate one or more client applications attempting to communicate with a Supervisor entity (e.g., 176 in FIG. 18 , 190 in FIG. 19 , 228 in FIG. 20 ). If the client is authenticated, the Supervisor API may return session information to the client and connect the client with the Supervisor entity. The Supervisor API may also disconnect the client from the Supervisor entity.
[0231] Further, in one or more embodiments of the present invention, a net list describing all or part of an HTM network may be passed from a client to a Supervisor entity through a Supervisor API. Further, a Supervisor API may be used to return state information to the client. State information may include, for example, the beliefs at one or more nodes of the HTM network, whether the HTM network is running, paused, or restarting, the number of nodes in all or part of the HTM network, and the number of CPUs actively running portions of the HTM network. Further, a Supervisor API may be accessed to start, pause and restart, or stop an HTM network.
[0232] Further, in one or more embodiments of the present invention, a Supervisor API may be accessed to: return a list of network files that have been stored by a system (e.g., a cluster of servers) used to run an HTM network; load an HTM network from a network file stored locally in a system (e.g., a cluster of servers) usable to run an HTM network; locally save a state of an HTM network in a system (e.g., a cluster of servers) running the HTM network; move one or more nodes from running on one CPU to running on another CPU; turn a debugging feature “on” or “off”; retrieve detailed state information of a component in an HTM network; set a state of a component in an HTM network; instruct an HTM network to pause operations after a specific triggering event, where the triggering event may be completion of one complete iteration of the HTM network, completion of updating a given list of nodes, completion of updating one node on each CPU, reaching a particular time, reaching a particular node value, and/or an occurrence of an error; retrieve statistics regarding operation of an HTM network; request storage of historical data regarding an HTM network; retrieve stored historical data regarding an HTM network; retrieve messages from an event log that, for example, occurred during a particular time frame; execute an OS command; reboot a set of servers used to run an HTM network; and/or request the triggering of an alarm if certain conditions are met.
[0233] Further, in one or more embodiments of the present invention, a Supervisory API may have a “batch command” system. In one or more embodiments of the present invention, a batch command system may be used to execute one or more operations of a Supervisor API in a particular sequence. Further, in one or more embodiments of the present invention, a batch command system may be used to execute one or more of the same commands on more than one node. Further, in one or more embodiments of the present invention, a batch command system may include the capabilities of a full scripting language (e.g., Python, Perl) so that, for example, ‘if’ statements and loops may be performed easily. Those skilled in the art will note that the use of a full scripting language may allow a user to script complex commands (e.g., commands: train level 1 of hierarchy until states of level 1 nodes reach a given condition; then turn “off” learning in level 1 and train level 2 of hierarchy until states of level 2 nodes reach a given condition, etc.).
[0234] Further, in one or more embodiments of the present invention, the Supervisor API may be arranged to handle a failure of any of the hardware components needed to run a particular HTM network. Further, in one or more embodiments of the present invention, the Supervisor API may handle a software failure (e.g., failure of an NPU instance). Further, in one or more embodiments of the present invention, the Supervisor API may handle a communication establishment error. Further, in one or more embodiments of the present invention, the Supervisor API may handle one or more errors in reading a provided net list describing a particular HTM network.
[0235] In addition to the Supervisor API, an HTM-based system may also have a Node Plug-in API 250 as shown in FIG. 21 . In FIG. 21 (elements labeled similarly to that shown in FIG. 19 ), the Node Plug-in API 250 may be used to create new node types. For example, the Node Plug-in API 250 may be used to interface new hardware for running the HTM network 186 and/or implement, for example, new learning algorithms. In one or more embodiments of the present invention, using the Node Plug-in API 250, one or more “plug-ins” may be dynamically loaded when the HTM network 186 is initialized or rebooted. In such a manner, a functionality of a runtime engine running the HTM network 186 may be extended as further described below.
Extensibility
[0236] As described above, in one or more embodiments of the present invention, an HTM network may be provided as a software platform. To enable the HTM network to be usable in various different domains and/or modifiable by various entities (e.g., software developers, client or user-level applications), the functionality of all or part of the HTM may be “extensible.” Those skilled in the art will note that the term “extensible” in the context of software describes a software entity (e.g., a computer program, a programming language, a routine) that can have its capabilities “extended” (e.g., changed, augmented).
[0237] In one or more embodiments of the present invention, extensibility may be afforded to an HTM network by having abstract interfaces for one or more of the components of the HTM network. For example, in one or more embodiments of the present invention, an abstract interface for a component of an HTM network may be implemented using a base class if using object-oriented programming (e.g., C++, Java® (developed by Sun Microsystems, Inc. of Santa Clara, Calif.)) to implement the HTM network. Those skilled in the art will note that a base class in object-oriented programming is a class from which other classes (e.g., subclasses, child classes, derived classes) inherit members. Further, those skilled in the art will note that a base class may also be referred to as a “superclass” or “parent” class.
[0238] FIG. 22 shows an inheritance diagram of an HTM network 260 in accordance with an embodiment of the present invention. In general, the HTM network 260 is formed of one or more “entities,” where each entity defines an interface that is implemented through instantiation in order to render that entity extensible. In one or more embodiments of the present invention, the collection of entities in the HTM network 260 may be specified by a net list that is part of a software file that defines and is used to implement the HTM network 260. Once instantiated, the entities specified in the net list may communicate in some synchronized fashion and collaborate to perform some collective computation of the HTM network 260.
[0239] The HTM network 260 shown in FIG. 22 has a Base entity 274 that links the following named entities, each of which is further described below: Sensor 262; Effector 264; Link 266; Supervisor 268; Router 270; and Learning and Inference/Prediction Algorithm 272 (shown in FIG. 3 as “Learning”). Each of the entities 262, 264, 266, 268, 270, 272, 274 is an abstract interface implemented using a base class as described above.
[0240] As shown in FIG. 22 , each entity 262, 264, 266, 268, 270, 272, 274 has ID, priority, and type attributes. The ID attribute identifies each entity. This attribute may not only identify an entity, but may also be used to indicate a specific CPU, set of CPUs, or machine on which to run the entity. The priority attribute denotes a priority, in terms of processing order, of an entity. This is also referred to herein as a “phase.” The type attribute indicates a type of the entity. Further, as shown in FIG. 22 , each entity 262, 264, 266, 268, 270, 272, 274 has a compute( ) method, which is invocable (by, for example, a subclass of the base class entity) to perform some computation.
[0241] Further, although FIG. 22 shows a particular number and types of entities, in one or more other embodiments of the present invention, an HTM network may have a different number and/or one or more types of entities different than that shown in FIG. 22 . For example, in one or more embodiments of the present invention, an HTM network may not have an Effector entity.
[0242] In one or more embodiments of the present invention, software executables for running an HTM network may run at the level of Base entity 274. In other words, Base entity 274 may be thought of as working at the level of a net list containing the description of the HTM network. In such a manner, a user-level application for creating, running, designing, debugging, training, modifying, and/or otherwise using an HTM network may simply interface with Base entity 274 without having to “know” about, for example, one or more of the other entities 262, 264, 266, 268, 270, 272 shown in FIG. 22 .
[0243] In one or more embodiments of the present invention, Sensor entity 262 specializes in handling inputs sensed by the HTM network 260, where causes of the inputs exist in the domain in which the HTM network 260 is implemented. Those skilled in the art will note that there may any number of Sensor entities 262 in a net list defining the HTM network 260. The exact behavior of Sensor entity 262 (implemented as a base class) is extensible through the modification or addition of one or more subclasses. For example, as shown in FIG. 22 , Sensor entity 262 has the following subclasses: a gray-scale sensor subclass 276; a color image sensor subclass 278; a binary image sensor subclass 280; and an audio sensor subclass 282. Each of these subclasses 276, 278, 280, 282 contains functionality specific to the type of each subclass 276, 278, 280, 282. In other words, Sensor entity 262 may have no “knowledge” of the specific functionalities performed by each of its subclasses 276, 278, 280, 282. Further, although FIG. 22 shows a particular number and types of subclasses, in one or more other embodiments of the present invention, any number and/or types of subclasses may be used.
[0244] In one or more embodiments of the present invention, Effector entity 264 specializes in passing back outputs from the HTM network 260. Those skilled in the art will note that there may be any number of Effector entities 264 in a net list defining the HTM network 260. The exact behavior of Effector entity 264 (implemented as a base class) is extensible through the modification or addition of one or more subclasses. For example, as shown in FIG. 22 , Effector entity 264 has the following subclasses: an output file subclass 284; a motor control subclass 286; a database subclass 288; and a display subclass 290. Each of these subclasses 284, 286, 288, 290 contains functionality specific to the type of each subclass 284, 286, 288, 290. In other words, Effector entity 264 may have no “knowledge” of the specific functionalities performed by each of its subclasses 284, 286, 288, 290. Further, although FIG. 22 shows a particular number and types of subclasses, in one or more other embodiments of the present invention, any number and/or types of subclasses may be used.
[0245] In one or more embodiments of the present invention, Link entity 266 specializes in efficient message passing between particular entities. Those skilled in the art will note that there may be any number of Link entities 266 in a net list defining the HTM network 260. The exact behavior of Link entity 266 (implemented as a base class) is extensible through the modification or addition of one or more subclasses.
[0246] In one or more embodiments of the present invention, Supervisor entity 268 orchestrates the collective computation of the HTM network 260. Those skilled in the art will note that for a normal application, there may be only one Supervisor entity 268 in a net list defining the HTM network 260. The exact behavior of Supervisor entity 268 (implemented as a base class) is extensible through the modification or addition of one or more subclasses.
[0247] In some embodiments, Router entity 270 can assist in coordinating the passing of messages among the entities in an HTM network 260. Those skilled in the art will note that there may be a Router entity 270 for each computing entity (e.g., CPU) over which the HTM network 260 is running. The exact behavior of Router entity 270 (implemented as a base class) is extensible through the modification or addition of one or more subclasses.
[0248] In one or more embodiments of the present invention, Learning and Inference/Prediction entity 272 specializes in discovering and inferring causes of sensed input patterns as described above. Those skilled in the art will note that there may be any number of Learning and Inference/Prediction entities 272 in a net list defining the HTM network 260. The exact behavior of Learning and Inference/Prediction entity 272 (implemented as a base class) is extensible through the modification or addition of one or more subclasses. For example, as shown in FIG. 22 , Learning and Inference/Prediction entity 272 has the following subclasses: a coincidence detection subclass 292; a sequence learning subclass 294; a belief propagation subclass 296; a prediction subclass 298; and a vector quantization subclass 300. Each of these subclasses 292, 294, 296, 298, 300 contains functionality specific to the type of each subclass 292, 294, 296, 298, 300. In other words, Learning and Inference/Prediction entity 272 may have no “knowledge” of the specific functionalities performed by each of its subclasses 292, 294, 296, 298, 300. Further, although FIG. 22 shows a particular number and types of subclasses, in one or more other embodiments of the present invention, any number and/or types of subclasses may be used.
[0249] In one or more embodiments of the present invention, when HTM network 260 is running, an “outer” process may be running to “orchestrate” the operation of the HTM network 260. FIG. 23 shows a flow process in accordance with an embodiment of the present invention. Particularly, FIG. 23 shows a technique for traversing an HTM network. To provide further context, as described above, an HTM network may have several entities that are extensible. During operation of the HTM network, (i) various entities may attempt to extend one or more entities of the HTM network and (ii) various entities will need to be processed. Thus, one or more embodiments of the present invention provide a mechanism for traversing the HTM network in some desirable manner with consideration to, for example, the priority and timing of particular entities. As described above, the scheduling phase and pipeline scheduling techniques reduces or eliminates the need for such orchestration.
[0250] In FIG. 23 , initially, an HTM network is created ST310. This may be achieved by reading in a net list defining the HTM network. In one or more other embodiments of the present invention, the HTM network may be created programmatically. Once the HTM network itself has been created in ST310, each entity in the HTM network is initialized (and stored in memory) ST312.
[0251] Then, the priority of each entity may be optionally reset (noting that the priorities of each entity may already be reset immediately after initialization in ST312) ST314. Thereafter, the input parameters to the HTM network are set ST316. Then, the entity with the highest priority is determined ST318 and its compute( ) method is invoked ST320. Determining the entity with the highest priority may be dependent on one or more different factors. For example, in some cases, a priority level of an entity may be used to determine the priority of that entity relative to other entities. However, in other cases, a timing of an entity may be used to determine the priority of that entity relative to other entities. For example, if a compute( ) method of a particular entity has to be invoked every x milliseconds, then at time intervals of x milliseconds, that particular entity has the highest priority regardless of the priority levels of other entities. More particularly, for example, a sensor may be connected to a camera that needs to process a live image ever 33 milliseconds. In this case, a compute( ) method for the sensor may be invoked every 33 milliseconds regardless of the priority levels of other active entities. Those skilled in the art will note that in such a manner, an HTM network may run in real-time. In one embodiment scheduling is accomplished using a data driven scheduler, as described above.
[0252] Once all the entities in the HTM network have been processed ST322, the outputs of the HTM network are read ST324. If more inputs remain ST326, then the process repeats optionally starting at ST314 (otherwise repeating starting at ST316 (not shown)).
[0253] Further, in one or more embodiments of the present invention, the process described above with reference to FIG. 23 may be performed by or under the direction of, for example, Supervisor entity 268 shown in FIG. 22 . In one or more embodiments of the present invention, Supervisor entity 268 may be “subclassed” if a different traversal mechanism is desired.
[0254] An HTM network, as described above with reference to FIG. 22 , enables, for example, a software developer, to “extend” the capabilities of the HTM network through the replacement and/or addition of subclasses. Moreover, with proper permission, a user may also modify the entity base classes in the net list defining the HTM network.
[0255] FIG. 24 shows a flow process in accordance with an embodiment of the present invention. Particularly, FIG. 24 shows how a user may extend an HTM network. Initially, a user may define/write a subclass for extending the HTM network in some way ST330. This subclass would include, for example, a compute( ) method. Then, the source code for the HTM network may be recompiled ST332, thereby creating a new HTM network with the newly defined subclass.
[0256] In some cases, however, it may not be desirable to recompile and/or provide access to the source code for an entire HTM network. Accordingly, FIG. 25 shows a flow process for another way to extend an HTM network. Initially, a user creates a dynamic library as a plug-in, i.e., the new or modified subclass for the HTM network ST340. Then, the user links, i.e., references in code, the plug-in to the HTM network using a plug-in interface/mechanism (e.g., Node Plug-in Interface 250 shown in FIG. 21 ) of the HTM network (step not shown). This linking may be dependent on binary code of the HTM network provided to the user. Thereafter, at start-up or while running, the HTM network may dynamically search for and then instantiate the plug-in ST342. Those skilled in the art will note that in such a manner, the HTM network is extended without having to recompile the source code for the entire HTM network.
[0257] Message Passing
[0258] As described above, the operation of an HTM network may be executed across a cluster of one or more servers. As further described above, in one or more embodiments of the present invention, NPUs manage the operation of nodes forming the HTM network. Each NPU is responsible for managing a certain set of one or more nodes. As further described below with reference to FIG. 26 , one or more “message managers” may be instantiated/implemented to facilitate the propagation of messages within a particular server and/or among two or more servers. In alternate embodiment message passing is accomplished by each NPU, e.g., as described above with reference to the data driven scheduler.
[0259] In FIG. 26 , a cluster 350 is formed, at least in part, of servers 370, 372, 374. NPUs 352, 354 are assigned to server 370, NPU 356 is assigned to server 372, and NPUs 358, 360, 362 are assigned to server 372. Further, as shown in FIG. 26 , each NPU 350, 352, 354, 356, 358, 360, 362 manages its own set of one or more nodes (shown, but not labeled), where the nodes collectively form all or part of an HTM network. Further, in one or more embodiments of the present invention, one or more of NPUs 350, 352, 354, 356, 358, 360, 362 may be assigned (by, for example, an OS scheduler or a user) to run on particular CPUs. In such embodiments, the nodes of a particular NPU may be run by the CPU to which that particular NPU is assigned. Further, in one or more embodiments of the present invention, an NPU assigned to a particular CPU may be dynamically switched to run on a different CPU.
[0260] Further, those skilled in the art will note that although FIG. 26 shows particular numbers of NPUs, servers, NPUs per server, total nodes, nodes per server, and nodes per NPU, in one or more other embodiments of the present invention, any configuration of servers, NPUs, and nodes may be used.
[0261] As described above, nodes in an HTM network output data (e.g., beliefs, matrices of values). Still referring to FIG. 26 , in one or more embodiments of the present invention, the propagation of such data as messages between nodes, whether part of the same server or different servers, may be handled by one or more message managers 364, 366, 368. For example, when a node managed by NPU 354 outputs a belief, the belief is made available to message manager 364 (the availability of the belief may be notified to message manager 364 by NPU 354), which, based on information as to the source of the output belief and the topology of the HTM network running on cluster 350, sends the belief as part of a message to each appropriate destination server (e.g., server 372). An “appropriate” destination server is a server running a node (or nodes) that requires the output belief. Those skilled in the art will note that by implementing such message passing, data from one server needed or expected by multiple nodes on another server may only be sent once as opposed to multiple times for each of the multiple destination nodes. This may result in the use of less bandwidth across the cluster 350. Further, in one or more embodiments of the present invention, it may not be necessary for a message manager 364, 366, 368 on one server to be informed of the local topology of another server.
[0262] As described above, a message manager 364, 366, 368 sends “inter-server” messages based on information regarding the topology of the HTM network running across servers 370, 372, 374. This information may be specified to each message manager 364, 366, 368 by a Supervisor entity (e.g., 176 in FIG. 18 ). Further, in one or more embodiments of the present invention, information (e.g., address tables) regarding the topology of an HTM network may be formed dynamically without some central control.
[0263] Further, in one or more embodiments of the present invention, a message manager 364, 366, 368 of one server may communicate a message to a message manager 364, 366, 368 of another server, which then communicates the message to a message manager 364, 366, 368 of yet another server. Such “relay” message passing may be used, for example, to improve performance in a large-scale HTM-based system having many servers.
[0264] Further, in one or more embodiments of the present invention, message managers 364, 366, 368 may implement one or more of any various transport protocols (e.g., using a Message Passing Interface (MPI) or via a “zero-copy” protocol using shared memory).
[0265] Further, in one or more embodiments of the present invention, a message manager 364, 366, 368 may effectively send output data from a node managed by a first NPU to a node managed by a second NPU that is on the same server as the first NPU. Message managers 364, 366, 368 may communicate such “intra-server” messages using, for example, socket connections and/or shared memory buffers.
[0266] Further, although FIG. 26 shows a one-to-one correspondence between servers 370, 372, 374 and message managers 364, 366, 368, in one or more other embodiments of the present invention, any arrangement of servers and message managers may be used. For example, a particular server may not have a message manager. Further, for example, a message manager for NPUs running on one server may run on a different server.
[0267] In one or more embodiments of the present invention, a message formed by any one of message managers 364, 366, 368 may include sub-messages formed of a header portion and a data portion. The header portion may contain, for example, a source and/or destination ID, message type information, timing information, and/or a total data size of the sub-message. The data portion may contain, for example, the data itself. Further, in one or more embodiments of the present invention, a sub-message may be formed of a fixed-size header portion and a variable-size data portion. Because the header portion may contain size and content information as to the data portion, a receiving message manager may proactively allocate the necessary resources to receive the data portion. Further, in one or more embodiments of the present invention, the header and data portions may be transmitted over different communication channels (e.g., TCP sockets) so that receipt of the data portion may be deferred until resources are available and while not blocking receipt of further header portions.
[0268] Further, in one or more embodiments of the present invention, a message manager 364, 366, 368 as described above with reference to FIG. 26 may be related to, or otherwise associated with, a Router entity (e.g., 270 in FIG. 22 ).
[0269] Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may ensure that messages routed through them are uncorrupted. Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may implement lazy or proactive transmission algorithms. Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may be used to profile an HTM network. Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may be used to observe network behavior and/or monitor for performance issues. Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may be used to detect and/or recover from faults. Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may be used to perform “quality-of-service” operations.
[0270] Further, in one or more embodiments of the present invention, one or more of message managers 364, 366, 368 may have one or more message buffers. A message buffer of a message manager may be used to buffer all or parts of a received message (noting that the received message may originate from a node local to (i.e., on the same server as) the router or a node remote from (i.e., on a different server than) the router). Messages may be written to or read from a message buffer. Further, the message buffer may be used to help synchronize message passing in cluster 350. For example, a router having a message buffer may prevent node A from reading a message from its location in the message buffer while node B is writing to that location in the message buffer.
[0271] Further, an HTM in accordance with one or more embodiments of the present invention may be associated with virtually any type of computer system, including multiprocessor and multithreaded uniprocessor systems, regardless of the platform being used. For example, as shown in FIG. 27 , a networked computer system 200 includes at least one processor (e.g., a general-purpose processor, a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a graphics processor) 202, associated memory 204, a storage device 206, and numerous other elements (not shown) and functionalities typical of modern computer systems. The networked computer system 200 may also include input means (e.g., a keyboard 208, a mouse 210, one or more sensory input systems (not shown)) and output means (e.g., a monitor 212). The networked computer system 200 is connected to a LAN or a wide area network (WAN) via a network interface connection (not shown). Those skilled in the art will appreciate that these input and output means may take other forms. Further, those skilled in the art will appreciate that one or more elements of the networked computer system 200 may be remotely located and connected to the other elements over a network. Further, software instructions to perform one or more embodiments of the present invention may be stored on a computer readable medium such as a compact disc (CD), a diskette, a tape, a file, a hard drive, or any other computer-readable storage device.
[0272] While the invention has been described with respect to a limited number of embodiments, those skilled in the art, having benefit of the above description, will appreciate that other embodiments can be devised which do not depart from the scope of the invention as disclosed herein. Accordingly, the scope of the invention should be limited only by the attached claims.
Claims
Certificate of Correction present
The claims shown below may not include correction changes. Use the corrected PDF for authoritative text.
What is claimed is:
1. A method for performing phase based scheduling in a network having two or more node processing units each node processing unit having at least one node, with each of the at least one node having a single output buffer, the method comprising the steps of:
assigning, prior to performing a compute operation on said two or more node processing units, one or more phase values to each of said nodes, wherein said phase values define a first order such that if said nodes are computed in the first order that data dependency requirements are satisfied within the two or more node processing units and wherein two or more nodes can have an identical phase value; and
synchronizing the two or more node processing units, having the steps of:
(a) selecting a phase epoch in each of said node processing units wherein a phase epoch is a period in which all nodes having a particular phase value are computed;
(b) selecting an uncomputed node in said epoch;
(c) performing the compute operation on said selected node if said selected node is enabled;
(d) outputting a result of said compute operation;
(e) repeating steps (b) through (d) for each uncomputed node in said epoch; and
(f) repeating steps (a) through (e) for phase epoch.
2. The method of claim 1, wherein two or more phase values are assigned to at least one node.
3. The method of claim 1, wherein the synchronizing step further comprises the steps of:
(a) sending a READY message to all upstream node processing units, prior to performing said compute operation;
(b) waiting for said READY message from all downstream node processing units;
(c) sending a DONE message to all downstream node processing units after performing said compute operation of all nodes in said selected phased epoch; and
(d) waiting for said DONE message from all upstream node processing units.
4. The method of claim 1, further comprising the steps of the node processing units automatically mirroring the result, by making the result accessible to a downstream node processing unit which is one of the node processing units.
5. The method of claim 1, wherein the synchronization step does not send a synchronization message between said two or more node processing units.
Patent Citations (46)
| Patent | Date | Inventor | Cited By |
|---|---|---|---|
| US4766534(A) | 1988-08-01 | DeBenedictis | Examiner |
| US4845744(A) | 1989-07-01 | DeBenedictis | Examiner |
| US5255348(A) | 1993-10-01 | Nenov | Applicant |
| US5712953(A) | 1998-01-01 | Langs | Applicant |
| US6122014(A) | 2000-09-01 | Panusopone et al. | Applicant |
| US6195622(B1) | 2001-02-01 | Altschuler et al. | Applicant |
| US6400996(B1) | 2002-06-01 | Hoffberg et al. | Applicant |
| US6468069(B2) | 2002-10-01 | Lemelson et al. | Applicant |
| US6567814(B1) | 2003-05-01 | Banker et al. | Applicant |
| US6625585(B1) | 2003-09-01 | MacCuish et al. | Applicant |
| US6714941(B1) | 2004-03-01 | Lerman et al. | Applicant |
| US6751343(B1) | 2004-06-01 | Ferrell et al. | Applicant |
| US7251637(B1) | 2007-07-01 | Caid et al. | Applicant |
| US7739208(B2) | 2010-06-01 | George et al. | Applicant |
| US2002/0150044(A1) | 2002-10-01 | Wu et al. | Applicant |
| US2003/0069002(A1) | 2003-04-01 | Hunter et al. | Applicant |
| US2003/0123732(A1) | 2003-07-01 | Miyazaki et al. | Applicant |
| US2003/0167111(A1) | 2003-09-01 | Kipersztok et al. | Applicant |
| US2004/0002838(A1) | 2004-01-01 | Oliver et al. | Applicant |
| US2004/0148520(A1) | 2004-07-01 | Talpade et al. | Applicant |
| US2004/0267395(A1) | 2004-12-01 | Discenzo et al. | Applicant |
| US2005/0063565(A1) | 2005-03-01 | Nagaoka et al. | Applicant |
| US2005/0190990(A1) | 2005-09-01 | Burt et al. | Applicant |
| US2005/0222811(A1) | 2005-10-01 | Jakobson et al. | Applicant |
| US2006/0184462(A1) | 2006-08-01 | Hawkins | Applicant |
| US2006/0212444(A1) | 2006-09-01 | Handman et al. | Applicant |
| US2006/0235320(A1) | 2006-10-01 | Tan et al. | Applicant |
| US2006/0248026(A1) | 2006-11-01 | Aoyama et al. | Applicant |
| US2006/0248073(A1) | 2006-11-01 | Jones et al. | Applicant |
| US2006/0253491(A1) | 2006-11-01 | Gokturk et al. | Applicant |
| US2006/0259163(A1) | 2006-11-01 | Hsiung et al. | Applicant |
| US2007/0005531(A1) | 2007-01-01 | George et al. | Applicant |
| US2007/0192264(A1) | 2007-08-01 | Hawkins et al. | Applicant |
| US2007/0192267(A1) | 2007-08-01 | Hawkins et al. | Applicant |
| US2007/0192268(A1) | 2007-08-01 | Hawkins et al. | Applicant |
| US2007/0192269(A1) | 2007-08-01 | Saphir et al. | Applicant |
| US2007/0192270(A1) | 2007-08-01 | Hawkins et al. | Applicant |
| US2007/0228703(A1) | 2007-10-01 | Breed | Applicant |
| US2007/0276774(A1) | 2007-11-01 | Ahmad et al. | Applicant |
| US2008/0059389(A1) | 2008-03-01 | Jaros et al. | Applicant |
| US2009/0006289(A1) | 2009-01-01 | Jaros et al. | Applicant |
| US2010/0207754(A1) | 2010-08-01 | Shostak et al. | Applicant |
| EP1557990(A) | 2005-07-01 | Applicant | |
| WO2006/063291(A) | 2006-06-01 | Applicant | |
| WO2008/067326(A2) | 2008-06-01 | Applicant | |
| WO2009/006231(A) | 2009-01-01 | Applicant |
Non-Patent Literature (100)
- Tsinarakis et al., G., “Modular Petri Net Based Modeling, Analysis and Synthesis of Dedicated Production Systems”, 2003.Examiner
- Tsinarakis et al., G., “Modular Petri Net Based Modeling, Analysis and Performance Evaluation of Random Topology Dedicated Production Systems”, 2005.Examiner
- Guerrier et al., P., “A Generic Architecture for On-Chip Packet-Switched Interconnections”, 2000.Examiner
- Agrawal, R. et al., “Mining Sequential Patterns,” IEEE, 1995, pp. 3-14.Applicant
- Fine, S. et al., “The Hierarchical Hidden Markov Model: Analysis and Applications,” Machine Learning, Jul. 1998, pp. 41-62, vol. 32.Applicant
- Foldiak, P., “Learning Invariance from Transformation Sequences,” Neural Computation, 1991, pp. 194-200, vol. 3, No. 2.Applicant
- Fukushima, K., “Neocognitron: A Self-Organizing Neural Network Model for a Mechanism of Pattern Recognition Unaffected by Shift in Position,” Biol. Cybernetics, 1980, pp. 193-202, vol. 36.Applicant
- George, D. et al., “A Hierarchical Bayesian Model of Invariant Pattern Recognition in the Visual Cortex,” Mar. 2005.Applicant
- George, D. et al, “Invariant Pattern Recognition Using Bayesian Inference on Hierarchical Sequences”, Technical Report, Sep. 17, 2004, pp. 1-8, U.S.A.Applicant
- Hawkins, J. et al., “On Intelligence,” Sep. 2004, Times Books, Henry Holt and Company, New York, NY 10011.Applicant
- Hyvarinen, A. et al., “Bubbles: A Unifying Framework for Low-Level Statistical Properties of Natural Image Sequences,” J. Opt. Soc. Am. A., 2003, pp. 1237-1252, vol. 20, No. 7.Applicant
- International Search Report & Written Opinion, PCT/US2005/044729, May 14, 2007, 14 pages.Applicant
- Lee, T. et al, “Hierarchical Bayesian Inference in the Visual Cortex”, Journal of the Optical Society of America, Jul. 7, 2003, pp. 1434-1448, vol. 20, No. 7, U.S.A.Applicant
- Murphy, K. et al., “Using the Forest to See the Trees: A Graphical Model Relating Features, Objects and Scenes,” Advances in Neural Processing System, 2004, vol. 16.Applicant
- Murray, S.O. et al., “Shaper Perception Reduces Activity in Human Primary Visual Cortex,” Proceedings of the Nat. Acad. Of Sciences of the USA, Nov. 2002, pp. 15164-151169, vol. 99, No. 23.Applicant
- Olshausen, B.A. et al., “A Neurobiological Model of Visual Attention and Invariant Pattern Recognition Based on Dynamic Routing Information,” Jnl. Of Neuroscience, Nov. 1993.Applicant
- Riesenhuber, M. et al, “Hierarchical Models of Object Recognition in Cortex”, Nature Neuroscience, Nov. 1999, pp. 1019-1025, vol. 2, No. 11, U.S.A.Applicant
- Stringer, S.M. et al., “Invariant Object Recognition in the Visual System with Novel Views of 3D Objects,” Neural Computation, Nov. 2002, pp. 2585-2596, vol. 14, No. 11.Applicant
- Thomson, A.M. et al., “Interlaminar Connections in the Neocortex,” Cerebral Cortex, 2003, pp. 5-14, vol. 13, No. 1.Applicant
- Tsukada, M, “A Theoretical Model of the Hippocampal-Cortical Memory System Motivated by Physiological Functions in the Hippocampus”, Proceedings of the 1993 International Joint Conference on Neural Networks, Oct. 25, 1993, pp. 1120-1123, vol. 2, Japan.Applicant
- Van Essen, D.C. et al., “Information Processing Strategies and Pathways in the Primate Visual System,” An Introduction to Neural and Electronic Networks, 1995, 2nd ed.Applicant
- Vlajic, N. et al., “Vector Quantization of Images Using Modified Adaptive Resonance Algorithm for Hierarchical Clustering”, IEEE Transactions on Neural Networks, Sep. 2001, pp. 1147-1162, vol. 12, No. 5.Applicant
- Wiskott, L. et al., “Slow Feature Analysis: Unsupervised Learning of Invariances,” Neural Computation, 2002, pp. 715-770, vol. 14, No. 4.Applicant
- Adelson, E.H. et al., “The Perception of Shading and Reflectance,” Perception as Bayesian Inference, Knill, D.C. et al., ed., 1996, pp. 409-423, Cambridge University Press, UK.Applicant
- Demeris, Y. et al., “From Motor Babbling to Hierarchical Learning by Imitation: A Robot Developmental Pathway,” Proceedings of the Fifth International Workshop on Epigenetic Robotics: Modeling Cognitive Development in Robotic Systems, 2005, pp. 31-37.Applicant
- Felleman, D.J. et al., “Distributed Hierarchical Processing in the Primate Cerebral Cortex,” Cerebral Cortex, Jan./Feb. 1991, pp. 1-47, vol. 1.Applicant
- Guo, C-E. et al., “Modeling Visual Patterns by Integrating Descriptive and Generative Methods,” International Journal of Computer Vision, May 29, 2003, 28 pages, vol. 53, No. 1.Applicant
- Han, K. et al., “Automated Robot Behavior Recognition Applied to Robotic Soccer,” In Proceedings of the IJCAI-99 Workshop on Team Behaviors and Plan Recognition, 1999, 6 pages.Applicant
- Hawkins, J. et al., “On Intelligence,” 2004, pp. 23-29, 106-174, 207-232, Times Books.Applicant
- Hernandez-Gardiol, N. et al., “Hierarchical Memory-Based Reinforcement Learning,” Proceedings of Neural Information Processing Systems, 2001, 7 pages.Applicant
- Hinton, G.E. et al., “The “Wake-Sleep” Algorithm for Unsupervised Neural Networks,” Science, May 26, 1995, pp. 1158-1160, vol. 268.Applicant
- Isard, M. et al., “Icondensation: Unifying Low-Level and High-Level Tracking in a Stochastic Framework,” Lecture Notes in Computer Science 1406, Burkhardt, H. et al., ed., 1998, pp. 893-908, Springer-Verlag, Berlin.Applicant
- Lewicki, M.S. et al., “Bayesian Unsupervised Learning of Higher Order Structure,” Moser, M.C. et al., ed., Proceedings of the 1996 Conference in Advances in Neural Information Processing Systems 9, 1997, pp. 529-535.Applicant
- Pearl, J., “Probabilistic Reasoning in Intelligent Systems: Networks of Plausible Inference,” 1988, pp. 143-223, Morgan Kaufmann Publishers, Inc.Applicant
- Sinha, P. et al., “Recovering Reflectance and Illumination in a World of Painted Polyhedra,” Fourth International Conference on Computer Vision, Berlin, May 11-14, 1993, pp. 156-163, IEEE Computer Society Press, Los Alamitos, CA.Applicant
- Sudderth, E.B. et al., “Nonparametric Belief Propagation and Facial Appearance Estimation,” AI Memo 2002-020, Dec. 2002, pp. 1-10, Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA.Applicant
- Yedidia, J.S. et al., “Understanding Belief Propagation and its Generalizations,” Joint Conference on Artificial Intelligence (IJCAI 2001), Seattle, WA, Aug. 4-10, 2001, 35 pages.Applicant
- Zemel, R.S., “Cortical Belief Networks,” Computational Models for Neuroscience, Hecht-Nielsen, R. et al., ed., 2003, pp. 267-287, Springer-Verlag, New York.Applicant
- George, D. et al., “The HTM Learning Algorithm,” [Online] [Retrieved on Jan. 1, 2009] Retrieved from the Internet<URL:http://www.numenta.com/for-developers/education/Numenta—HTM—Learning—Algos.pdf>.Applicant
- PCT International Search Report and Written Opinion, PCT Application No. PCT/US2009/047250, Sep. 25, 2009, 13 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,456, filed Mar. 20, 2009, 9 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,456, filed Nov. 6, 2008, 7 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,456, filed May 7, 2008, 14 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,454, filed Mar. 30, 2009, 11 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,454, filed Jun. 3, 2008, 13 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,457, filed Apr. 21, 2009, 6 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,457, filed Nov. 20, 2008, 8 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,457, filed May 6, 2008, 14 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,457, filed Aug. 24, 2007, 10 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed Jul. 29, 2009, 43 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed Jan. 9, 2009, 38 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed May 15, 2008, 37 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed Oct. 30, 2007, 34 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed May 29, 2007, 36 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/147,069, filed Jan. 9, 2007, 27 pages.Applicant
- Fine, S. et al., “The Hierarchical Hidden Markov Model: Analysis and Applications,” Machine Learning, 1998, pp. 41-62, vol. 32, Kluwer Academic Publishers, Boston.Applicant
- Kuenzer, A. et al., “An Empirical Study of Dynamic Bayesian Networks for User Modeling,” Proc. of the UM 2001 Workshop on Machine Learning, pages.Applicant
- Hoey, J., “Hierarchical Unsupervised Learning of Facial Expression Categories,” 2001, IEEE, 0-7695-1293-3, pp. 99-106.Applicant
- Archive of “Numenta Platform for Intelligent Computing Programmer's Guide,” Numenta, Mar. 7, 2007, pp. 1-186, www.numenta.com, [Online] Archived by http://archive.org on Mar. 19, 2007; Retrieved on Aug. 13, 2008] Retrieved from the Internet<URL:http://web.archive.org/web/20070319232606/http://www.numenta.com/for-developers/software/pdf/nupic—prog—guide.pdf>.Applicant
- Becerra, J.A. et al., “Multimodule Artificial Neural Network Architectures for Autonomous Robot Control Through Behavior Modulation,” IWANN 2003, LNCS, J. Mira (Ed.), pp. 169-176, vol. 2687, Springer-Verlag.Applicant
- CSAPO, A.B. et al., “Object Categorization Using VFA-Generated Nodemaps and Hierarchical Temporal Memories,” IEEE International Conference on Computational Cybernetics, IEEE, Oct. 7, 2007, pp. 257-262.Applicant
- Ding, C.H.Q., “Cluster Merging and Splitting in Hierarchical Clustering Algorithms,” Proceedings of the 2002 IEEE International Conference on Data Mining (ICDM 2002), Dec. 9, 2002, pp. 139-146.Applicant
- European Examination Report, European Application No. 05853611.1, Jun. 23, 2008, 4 pages.Applicant
- European Examination Report, European Application No. 07750385.2, Apr. 21, 2009, 8 pages.Applicant
- George, D. et al., “A Hierarchical Bayesian Model of Invariant Pattern Recognition in the Visual Cortex,” Proceedings, 2005 IEEE International Joint Conference on Neural Networks, Jul. 31-Aug. 4, 2005, pp. 1812-1817, vol. 3.Applicant
- George, D. et al., “Invariant Pattern Recognition Using Bayesian Inference on Hierarchical Sequences,” Technical Report, Oct. 2004, pp. 1-8.Applicant
- Gottschalk, K. et al., “Introduction to Web Services Architecture,” IBM Systems Journal, 2002, pp. 170-177, vol. 41, No. 2.Applicant
- Guinea, D. et al., “Robot Learning to Walk: An Architectural Problem for Intelligent Controllers,” Proceedings of the 1993 International Symposium on Intelligent Control, Chicago, IL, IEEE, Aug. 1993, pp. 493-498.Applicant
- Hasegawa, Y. et al., “Learning Method for Hierarchical Behavior Controller,” Proceedings of the 1999 IEEE International Conference on Robotics & Automation, May 1999, pp. 2799-2804.Applicant
- Hawkins, J. et al., “Hierarchical Temporal Memory Concepts, Theory and Terminology,” Numenta, Jan. 27, 2007, pp. 1-20.Applicant
- Hawkins, J. et al., “Hierarchical Temporal Memory Concepts, Theory and Terminology,” Numenta, Mar. 27, 2007 [Online] [Retrieved on Oct. 7, 2008] Retrieved from the Internet<URL:http://www.numenta.com/Numenta—HTM—Concepts.pdf>.Applicant
- Hawkins, J. et al., “Hierarchical Temporal Memory Concepts, Theory and Terminology,” Numenta, May 10, 2006 [Online] [Retrieved on Jul. 16, 2008] Retrieved from the Internet<URL:http://www.neurosecurity.com/whitepapers/Numenta—HTM—Concepts.pdf>.Applicant
- Hawkins, J., “Why Can't a Computer Be More Like a Brain?” IEEE Spectrum, Apr. 1, 2007, pp. 21-26, vol. 44, No. 4, IEEE Inc., New York, US.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US2007/003544, Jun. 16, 2008, 14 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US07/85661, Jun. 13, 2008, 7 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US08/55389, Jul. 25, 2008, 8 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US08/55352, Aug. 1, 2008, 8 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US2008/054631, Aug. 18, 2008, 14 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US2008/068435, Oct. 31, 2008, 14 pages.Applicant
- International Search Report and Written Opinion, International Application No. PCT/US2009/035193, Apr. 22, 2009, 14 pages.Applicant
- Lenser, S. et al., “A Modular Hierarchical Behavior-Based Architecture,” RoboCup 2001, LNAI 2377, 2002, Birk, A. et al, (Eds.), pp. 423-428, Springer-Verlag, Berlin, Heidelberg.Applicant
- “Numenta Node Algorithms Guide NuPIC 1.6,” Numenta, Jun. 13, 2008, pp. 1-6.Applicant
- “Numenta Node Algorithms Guide NuPIC 1.6,” Numenta, Jul. 22, 2008, pp. 1-7.Applicant
- “Zeta1 Algorithms Reference, Version 1.0,” Numenta Inc., Mar. 1, 2007, pp. 1-36.Applicant
- “Zeta1 Algorithms Reference, Version 1.2,” Numenta Inc., Jun. 8, 2007, pp. 1-38.Applicant
- “Zeta1 Algorithms Reference, Version 1.3,” Numenta Inc., Aug. 22, 2007, pp. 1-41.Applicant
- “Zeta1 Algorithms Reference, Version 1.5,” Numenta Inc., Aug. 24, 2007, pp. 1-45.Applicant
- European Patent Office Communication, European Patent Application No. 08796030.8, Dec. 6, 2010, seven pages.Applicant
- European Patent Office Communication, European Patent Application No. 07750385.2 Dec. 6, 2010, eight pages.Applicant
- Lim, K. et al., “Estimation of Occlusion and Dense Motion Fields in a Bidirectional Bayesian Framework,” IEEE Transactions on Pattern Analysis and Machine Intelligence, May 2002, pp. 712-718, vol. 24, No. 5.Applicant
- United States Office Action, U.S. Appl. No. 11/680,197, filed Mar. 23, 2010, twelve pages.Applicant
- Kim, J. et al., “Hierarchical Distributed Genetic Algorithms: A Fuzzy Logic Controller Design Application,” IEEE Expert, Jun. 1996, pp. 76-84.Applicant
- Mishkin, M. et al., “Hierarchical Organization of Cognitive Memory,” Phil. Trans. R. Soc. B., 1997, pp. 1461-1467, London.Applicant
- Park, S. et al., “Recognition of Two-person Interactions Using a Hierarchical Bayesian Network,” ACM SIGMM International Workshop on Video Surveillance (IWVS) 2003, pp. 65-76, Berkeley, USA.Applicant
- Poppel, E., “A Hierarchical Model of Temporal Perception,” Trends in Cognitive Sciences, May 1997, pp. 56-61, vol. 1, No. 2.Applicant
- Dimitrova, N. et al., “Motion Recovery for Video Content Classification,” ACM Transactions on Information Systems, Oct. 1995, pp. 408-439, vol. 13, No. 4.Applicant
- Dolin, R. et al., “Scalable Collection Summarization and Selection,” Association for Computing Machinery, 1999, pp. 49-58.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,458, filed Apr. 1, 2010, 16 pages.Applicant
- U.S. Office Action, U.S. Appl. No. 11/622,455, filed Apr. 21, 2010, 12 pages.Applicant
- Wu, G. et al., “Multi-camera Spatio-temporal Fusion and Biased Sequence-data Learning for Security Surveillance,” Association for Computing Machinery, 2003, pp. 528-538.Applicant