Bonded wafer package module

[0001] 1. Field of the Invention

[0002] The present invention relates to the field of bulk acoustic wave resonators and semiconductor packaging.

[0003] 2. Prior Art

[0004] A prior art duplexer consists of a land grid array package, a combiner circuit, and two BAW die (one side resonator, one side cap). Additionally, in the duplexer application, a required combiner means typically consists of a “π” configuration or shunt capacitor, series inductor and shunt capacitor implemented using discrete devices such as “0201” surface mount devices or transmission line techniques. A typical combiner circuit is shown in FIG. 1, with a more detailed schematic shown in FIG. 2. FIG. 2 also illustrates the three devices in the prior art land grid array package, namely a combiner circuit, and two BAW die, each with one side resonator, one side cap.

[0017] One preferred embodiment of the present invention replaces the prior art module with one side of a bonded wafer acting as the RX resonator die (typically having higher Fs and Fp frequency pairs). One side of the bonded wafer would provide through hole vias to connect electrical signals to the circuit board with solder ball or wire bond technology. Both sides of the bonded wafer may have resonators in their respective circuits. The layouts of the RX and TX duplexer filters will allow extra room for cavities. These cavities will allow the resonators of the opposite wafer to interface with an air pocket instead of the substrate or metal runs of the complementary die. In this regard, RX and TX duplexer die will need to be physically larger than previous BAW duplexer (“DUX”) technology.

[0018] Now referring to FIG. 3, one embodiment of the present invention may be seen. This embodiment includes a transmit wafer 16 and a receive wafer 18. Typically these wafers would use AlN in their resonators, though other materials might be used. In that regard, FIG. 3 shows the structure of a single packaged unit, though it is to be understood that in the preferred embodiment, wafer scale packaging is used to package an entire wafer array of units, with the wafers subsequently being diced to provide a plurality of individual units, each of the structures shown in FIG. 3.

[0019] As shown in FIG. 3, electrical contacts for both the transmit wafer and the receive wafer are brought out through conductor filled through-holes in the transmit wafer for solder ball or wire bond connection to a higher assembly. These contacts include contact 20 for coupling to a power amplifier (see FIG. 1), contact 22 for coupling to an antenna, contact 24 for coupling to ground, contact 26 for also coupling to ground, and contact 28 for coupling to a low noise amplifier.

[0020] The transmit and receive bandpass filters of FIG. 1 are included in this device. In particular, contact 20 is electrically connected to a bottom plate of a first resonator formed by a piezoelectric layer 42, such as AlN, with a top electrode and a top plate for electrically coupling to a top plate of a second series connected resonator, including piezoelectric layer 40 and bottom plate coupled to contact 22. In an exemplary embodiment, these resonators are tuned to 1950 MHz. Also electrically connected to the bottom plate is a dielectric layer 50 having a top plate and an interconnect layer electrically coupled to contact 24. This structure forms capacitor C1 of FIG. 2. In that regard, while various dielectric materials might be used, a preferred choice for processing convenience is to use the same piezoelectric material as used for the resonators, namely AlN. However, to assure that the structure acts as a capacitor and not as a resonator, the structure should be tuned (de-tuned) so as to not exhibit resonance in the frequency range of the transmitter or receiver. In the exemplary embodiment, a frequency is chosen between the transmit frequency range and the receive frequency range, namely 2025 MHz.

[0021] For the receive wafer 18, contact 34 is connected to the top plate of a first resonator comprising a piezoelectric layer 36 and bottom plate, with a second series connected resonator being formed by piezoelectric layer 38 electrically coupled through a bottom plate to contact 28. Also the second capacitor C2 is formed in the preferred embodiment on the transmit wafer 16 by using another layer of AlN, electrically coupled through conductor filled vias 32 and 34. The piezoelectric layer thereof, like capacitor C1 in the exemplary embodiment, is tuned to 2025 MHz between the transmit frequency range and the receive frequency range.

[0022] Also formed by conductive traces, typically a patterned metal layer, are inductors L1, L2 and L3 on an external surface of one of the wafers, typically on the surface with the external contacts. The inductors form the corresponding inductors of FIG. 2, which together with capacitors C1 and C2, form the full combiner of FIG. 2. The resonators, on the other hand, schematically represent the bandpass filters of FIGS. 1 and 2, complete filter circuits are not being shown for clarity.

[0023] As previously mentioned, a transmit wafer and a receive wafer, each having an array of devices thereon, are bonded and then diced. For this purpose a bonding ring matrix is used, forming a bonding ring 44 (FIG. 3) around each unit, sealing the edges of the transmit side and the receive side of each unit together. At the same time, contacts 46 electrically coupling the two wafers are bonded between the wafers.

[0024] Thus each unit of the transmit wafer includes a pair of series connected resonators, with one end of the series connection for coupling to the power amplifier and the other end for coupling to a combiner, and also includes a capacitor for capacitively coupling to a combiner ground. Each unit of the receive wafer includes a pair of series connected resonators, with one end of the series connection for coupling to the low noise amplifier and the other end for coupling to a combiner, and also includes a capacitor for capacitively coupling to a combiner ground. Note that each resonator has an associated cavity in the opposite substrate to reduce the effect of the opposite substrate on the resonator.

[0025] Now referring to FIG. 4, another embodiment of the present invention may be seen. This embodiment has the same contacts to the outside world, though relocated in accordance with the relocation of certain elements on the transmit and receive wafers. In particular, capacitors C1 and C2 are relocated with series connected resonators 48 and 50, forming one of a plurality of series and shunt resonators on the transmit wafer, to a position immediately opposite at least some of the resonators 52, 54, 56 and 58 on the receive wafer. Electrically this embodiment also realizes the combiner of FIG. 2 and schematically illustrates one of many resonators in the transmit and receive bandpass filters. The major difference in this embodiment is the fact that the resonators are placed face to face, or at least some of the resonators are face to face on opposing wafers.

[0026] The embodiment of FIG. 5 is similarly electrically the same as the earlier embodiment, the various contacts, inductors and capacitors being identified therein. In addition, however, the transmit bandpass filter and receive bandpass filter are all on the same wafer, schematically represented by resonators 60 and 62, and 64 and 66, respectively. Here the bottom wafer on which the inductors and contacts are located is preferably a silicon wafer having cavities adjacent to resonators on the upper wafer.

[0027] The embodiment of FIG. 6 is similar to the earlier embodiments in that as shown in the Figure, capacitors C1 and C2 and inductors L1, L2 and L3 are shown, as are contacts 22, 24 and 26. Further, representative resonators 68 and 70 are shown for the receive wafer, schematically showing the plurality of series and shunt resonators of the receive bandpass filter of FIG. 2, as are resonators 72 and 74, schematically representing the plurality of series and shunt resonators on the transmit wafer, again in accordance with FIG. 2. Further however, a third wafer has been added, specifically in this embodiment an active wafer which includes a low noise amplifier generally indicated by numeral 76, as well as an amplifier generally indicated by numeral 78. This wafer would preferably be a silicon wafer, though could be a gallium arsenide wafer, the output of low noise amplifier 76 and the input of power amplifier 78, as schematically shown in the Figure, being in a different plane from the cross-section presented. The circuitry for the low noise amplifier and for the power amplifier may be conventional bipolar, MOS or BiCMOS, by way of example. Obviously circuitry other than power amplifiers and LNAs such as mixers, VGAs, PGAs can also be implemented on the active wafer. Also the circuitry in this and other embodiments may comprise a multi-stage power amplifier whose individual gain stages connect to individual resonator stages to optimize system noise and filter loss.

[0028] In the embodiment of FIG. 7, the receive wafer and the transmit wafer are shown in accordance with FIG. 6, though of course the same may be of a configuration of the earlier embodiment or still in a different organization, as desired. In this embodiment, however, a fourth wafer is added, specifically a gallium arsenide wafer, between the silicon wafer (BiCMOS wafer in the example) and a transmit wafer. The BiCMOS wafer in this embodiment has a low noise amplifier 76 thereon, whereas the gallium arsenide wafer has the power amplifier 78 thereon. Note, of course, that while a specific order of wafers is shown in the Figure, one might change the order so that the transmit wafer is the lower wafer with contacts and inductors thereon and the receive wafer is the second wafer, and that the BiCMOS wafer and gallium arsenide wafer are reversed in order. Such an arrangement would put the low noise amplifier closer to the output of the receive bandpass filter. Obviously this and other variations may also readily be made by those skilled in the art.

[0029] Now referring to FIG. 8, a circuit for a Colpitts oscillator may be seen. As shall be subsequently described, this oscillator may be fabricated and packaged in accordance with the present invention, with various exemplary embodiments thereof to be described. The Colpitts oscillator includes a bias choke, two capacitors C3 and C4, transistor T1, a bias current source Ibias and a BAW resonator. The power supply VCC of course is provided as an input to the device. The bias choke or inductor is processed on the outside side of one of the wafers, with capacitor C3 and C4 being implemented either on a transistor die (typically silicon) or on a BAW die. In either case the capacitors may be conventional metal-insulator-metal (MIM) structures, or particularly on the BAW die, may be capacitors using a piezoelectric material such as AlN for the insulator, with the resulting resonator structure of course being tuned so as to not exhibit any resonances at the frequency of oscillation of the Colpitts oscillator.

[0030] An implementation of such an oscillator, or at least exemplary portions thereof, is illustrated in FIG. 9. Here a receive wafer is bonded to a BiCMOS wafer on a substrate. In this embodiment the receive wafer includes the Colpitts oscillator or VCO resonator 80, and of course, may include other components such as, particularly, capacitors C3 and C4 of FIG. 8. The transistor 82 for the Colpitts oscillator or VCO device is fabricated in the BiCMOS wafer, with the two wafers being bonded together by bonding ring 84. The bias choke of FIG. 8 may be formed in metalization layer 86. As stated before, the capacitors C3 and C4 of FIG. 8, not specifically shown in FIG. 9, may be metal-insulator-metal capacitors or BAW resonator structures tuned so as to have no resonances at the frequency of oscillation of the oscillator. Of course, in FIG. 9 various parts of the Colpitts oscillator, as well as various contacts thereof which are in accordance with the external contact of FIG. 8, are not specifically illustrated. Actually FIG. 9 illustrates the collector and base routing for the Colpitts VCO, with FIG. 10 illustrating the emitter routing for the Colpitts VCO. Those skilled in the art can easily replace the BiCMOS wafer with different wafers such as CMOS and add components such as variable capacitors to change the frequency of operation.

[0031] FIG. 11 is a diagram of multiple Colpitts oscillators using multiple BAW resonator trim values for the frequency of oscillation. Such multiple Colpitts oscillators of course may be fabricated as illustrated, by way of example, in FIGS. 9 and 10. The multiplex VCO buffer may be an external buffer, or alternatively, may also be formed on the BiCMOS wafer of FIGS. 9 and 10.

[0032] The extent of integration achievable with the present invention in any single device or module is limited only by the imagination of the designer and the yield of the resulting product. By way of example, FIG. 12 illustrates a device combining multiple RF blocks with multiple BAW filters and resonators in a single package. The particular package illustrated is a two wafer package having a BAW substrate (or a pair of substrates) and an RF transistor substrate. In such a package the signal flow may pass from the transistor substrate to the BAW substrate, and vice versa, a number of times for the desired function. In this case, the proposed circuit optimizes the loss of the filter while obtaining the required rejection, yielding lower power consumption than prior art. In particular, an input signal which may be a baseband signal is provided to upconverter 88 for converting the input signal to the desired RF frequency using a buffered VCO 90 coupled to a transmit local oscillator resonator 92. The output of the upconverter 88 is coupled to a power amplifier driver 94 on the transistor substrate, the output of which in turn is coupled to an interstage matching filter 96 on the BAW substrate. The output of the interstage matching filter 96 is coupled to power amplifier 98 on the transistor substrate, the output of which is then coupled to the transmit side of the duplexer 100 for coupling to the antenna. The filter includes a duplexer/combiner (duplexer) 100, which alternatively may be on the transistor substrate, which controls the coupling of the antenna between the transmit and receive signal paths. During reception the duplexer and receive filters provide a receive signal to the low noise amplifier 102 on the transistor substrate, with the RF signal output thereof being provided to low noise amplifier 102 and from there to downconverter 104 on the transistor substrate using a reference signal from buffered VCO 106 reference to local oscillator resonator 108 on the BAW substrate. The downconverter may convert the signal to baseband or to an IF frequency, as desired. As an alternative to the foregoing, a third wafer may be used, such as a gallium arsenide wafer as in FIG. 7, namely, a gallium arsenide wafer for the power amplifier.

[0033] There have been described herein exemplary embodiments of wafer scale packaged, single package duplexers. Though the exemplary embodiments have been described with respect to duplexers, it should be understood that duplexers are only exemplary, as other circuits may be similarly packaged. Thus while certain preferred embodiments of the present invention have been disclosed and described herein for purposes of illustration and not for purposes of limitation, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.