Method of providing block state information in semiconductor memory device including flash memory

[0001] 1. Background of the Invention

[0002] The present disclosure relates to semiconductor memory devices and, more particularly, to a method of providing block state information in a semiconductor memory device having a flash memory.

[0003] A claim of priority is made under 35 U.S.C. §119 from Korean Patent Application 10-2006-0107556, filed on Nov. 2, 2006, the contents of which are hereby incorporated by reference in their entirety.

[0004] 2. Description of the Related Art

[0005] Memory devices can be generally classified into two broad categories. These categories are volatile memory devices and non-volatile memory devices. Volatile memory devices do not retain their stored data in the event of a power loss. However, non-volatile memory devices retain their data even in the event of a power loss.

[0006] A commonly used non-volatile memory device is a flash memory device. In a flash memory device, data is stored in memory cells. Furthermore, transistors generally function as memory cells in flash memory devices. A flash memory device may be programmed with data or data stored in a flash memory may be deleted using different programming and data deletion techniques. For example, a flash memory device may be programmed by use of a tunneling effect. In the tunneling effect, a relatively large positive potential difference is created between a control gate and a substrate of the transistor. This potential difference causes the electrons on the surface of the substrate to be pushed and trapped to the floating gate. These electrons act as a barrier between the control gate and the channel on the substrate, thus increasing the threshold voltage of the cell transistor. Alternatively, a hot carrier effect may be used to program and/or delete data to/from a memory cell.

[0007] In either case, as the number of programming and delete operations increase, the reliability of the memory cells (and thus of the memory device) reduces. That is, there is a limit to the number of programming and delete operations that may be performed on flash memory devices without compromising on the reliability of the device. After such a limit is reached, there may be a substantial increase in programming errors on the device.

[0008] To counter the effects of having defective memory blocks, flash memory devices use techniques to replace bad memory blocks with reserved memory blocks that are known to be reliable, i.e., good memory blocks. Many of these techniques involve checking the address of a memory block during a read or write operation. If there is an error in the read or write operation, the block is determined to be a bad block and is then replaced by a reserved block which is assigned the same physical address as that of the bad block. A write or read operation of data is then performed through the reserved block.

[0009] FIGS. 1 and 2 illustrate a configuration of general flash memory. As shown in FIGS. 1 and 2, a flash memory includes meta blocks, user blocks and reserved blocks.

[0010] The meta block is a block that is generally used to store information associated with bad blocks, information associated with reserved blocks, and mapping information. The user block is generally used to store data. The reserved block, as described above, is used to replace a bad block.

[0011] Referring to FIG. 1, if blocks 32 and 34 go bad, these are each replaced with reserved blocks 35 and 36. In this case data is not written to or read from blocks 32 and 34. Instead, data is written to or read from blocks 35 and 36. Now, if another block such as block 38 were to go bad, then block 38 would be replaced with a reserved block 40.

[0012] However, when all the bad blocks (including the initial bad blocks), are replaced during the operation, that is, when all the reserved blocks are exhausted, the stability of semiconductor memory device can be no longer guaranteed. At this time, in order to maintain the integrity of the data already stored in the device, the semiconductor memory device automatically goes into a write prohibition state or read-only state. At this time, a user realizes that the life of the memory device is over and therefore executes a memory retention procedure such as, for example, a data backup.

[0013] While the integrity of stored data can be maintained as described above, there is no procedure to forewarn the user of the memory device that all the reserved memory blocks are about to be used up. If the user were forewarned, he may be able to take other preventive measures rather than just backing up the data. There is therefore a need for systems and methods which provide memory block state information upon receipt of a request from a user.

[0014] One aspect of the present disclosure includes a method of providing block state information in a semiconductor memory device including a flash memory. The method comprises storing block state information on at least one bad block of the flash memory and a plurality of reserved blocks which replace the at least one bad block, and providing the stored block state information to a user in response to a command provided by the user.

[0023] Exemplary embodiments of the present disclosure will now be described more fully hereinafter with reference to FIGS. 3 to 8, in which embodiments of the invention are shown. This disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0024] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0025] FIG. 3 is a block diagram of a semiconductor memory device including a flash memory according to an exemplary disclosed embodiment. Referring to FIG. 3, the semiconductor memory device includes a flash memory 30 and a controller 20 to load a user program 10.

[0026] Data is read from or written to the flash memory 30 via the controller 20. Specifically, the controller 20 performs a control function such that a given data operation is implemented in the flash memory 30. Typically, the data operation is performed based on the contents of the user program 10 that is loaded into the controller 20.

[0027] The controller 20 includes a file system 22 which loads the user program 10, and a flash translation layer (hereinafter, referred to as ‘FTL’) 24. In an exemplary embodiment, the FTL 24 performs an operation of mapping a logical address generated in the file system with a physical address of the flash memory 30.

[0028] Similar to RAMs, nonvolatile memories, and magnetic memories, the flash memory can be randomly accessed. However, the flash memory is deleted in blocks, unlike RAMs, nonvolatile memories, and magnetic memories. Further, in the case of the flash memory, before writing, deletion is performed in blocks. Furthermore, in general, a data unit in which the deletion operation is performed may be more than a data unit in which the writing operation is performed.

[0029] This deletion of large quantities of data may be a problem not only because it may be difficult to use the flash memory as a main memory but also because it may be difficult to keep the file system intact as a general hard disk when using the flash memory as an auxiliary memory device. Thus, in order to hide the deletion operation of the flash memory, the FTL 24 between the file system 22 and the flash memory 30 is used.

[0030] Through the address mapping function of the FTL 24, a host can recognize the flash memory 30 as a hard disk driver, and can access the flash memory device by the same method as the host would access a hard disk driver. The FTL 24 may be realized as a hardware type independent from host system, or may be realized as a device driver type within the host system.

[0031] In using the semiconductor memory device described above as an SSD (Solid State Disk) or hard disk, to provide block state information for bad blocks of flash memory and reserved blocks remaining after a replacement for the bad blocks to a user, an exemplary embodiment of the disclosure employs S.M.A.R.T related commands of an ATA (Advanced Technology Attachment) interface.

[0032] The SMART is an abbreviation of ‘Self-Monitoring, Analysis and Reporting Technology’. Problems like breakdown causable in the near future relating to a disk driver may be predicted through the SMART function.

[0033] Values observed through the SMART function used by different vendors differ based on the vendor. For example, there may be a difference between vendors as to what kinds of formats will be used for reporting values such as, for example, head flying height, data throughput performance, spin-up time, re-allocated sector count, seek time error, seek time performance, spin time performance, spin try recount, and drive calibration retry count.

[0034] FIG. 4 illustrates a command format in which SMART commands are classified according to a value of ‘feature register’. The SMART commands shown in FIG. 4 are well known to those skilled in the art, thus its detailed description will be omitted.

[0035] In these SMART commands, nine commands, ‘SMART READ DATA(D0h)’, ‘SMART ENABLE/DISABLE ATTRIBUTE AUTOSAVE(D2h)’, ‘SMART SAVE ATTRIBUTE VALUES(D3h)’, ‘SMART EXECUTE OFF-LINE IMMEDIATE(D4h)’, ‘SMART READ LOG(D5h)’, ‘SMART WRITE LOG(D6h)’, ‘SMART ENABLE OPERATIONS(D8h)’, ‘SMART DISABLE OPERATIONS(D9h)’ and ‘SMART RETURN STATUS’, are standardized.

[0036] To provide the block state information a ‘SMART READ DATA’ command having a ‘feature register’ value of ‘D0h’ may be used. Furthermore, as a command to provide the block state information, a command, e.g., ‘FFh’, corresponding to one ‘feature register’ value within a range of E0h˜FFh as an area of ‘feature register’ value usable by a vendor, may be used. Additionally, any one of the nine standard commands may be used.

[0037] ‘F’ indicates that a content of corresponding byte is fixed and unchangeable, and ‘V’ indicates that a content of corresponding byte is variable and changeable. ‘R’ indicates a content of corresponding byte is reserved and it should become ‘0’. ‘X’ designates that a content of corresponding byte is usable by a vendor and may be fixed or variable.

[0038] A structure of data for a result value of the ‘SMART READ DATA’ command is shown in FIG. 5. As shown in FIG. 5, the data structure of the ‘SMART READ DATA’ command may be constructed of 512 bytes. Specifically, information on reserved blocks, initial bad blocks, additional bad blocks generated during the use of the flash memory, etc. may be stored in vendor-specific data areas (0^th to 361^st bytes and 386^th to 510^th bytes) of the ‘SMART READ DATA’ command. This is shown in FIG. 6.

[0039] For example, as shown in FIG. 6, information on a version of SMART data may be stored in the 0^th to 1^st bytes, information on the amount of useful information may be stored in the 2^nd to 3^rd bytes, information on the number of reserved blocks may be stored in the 4^th to 7^th bytes, information on the number of additional bad blocks may be stored in the 8^th to 11^th bytes, and information on the number of initial bad blocks may be stored in the 12^th to the 15^th bytes. In addition, in the remaining part of the vendor-specific data areas, other necessary information necessary may be stored.

[0040] Block state information for the reserved blocks or bad blocks may be already stored in the ‘FTL’ performing a mapping for blocks or in the meta blocks of the flash memory. Furthermore, a user may obtain information about the number of reserved blocks or bad blocks from the ‘SMART READ DATA’ command.

[0041] Additionally, to provide a point of time for execution of an operation such as a user-performed data backup, a warning may be provided to a user when the number of available reserved blocks reaches a reference value. The user may set the reference value, thereby being capable of controlling a warning time point. In an exemplary embodiment, in providing the warning or controlling the warning time point, a specific command in the SMART commands may be used.

[0042] As shown in FIG. 4, for example, when the number of available reserved blocks reaches the reference value, a ‘SMART RETURN STATUS’ command having ‘feature register’ value of ‘DAh’ may be used in the SMART commands, to provide a warning to a user.

[0043] In addition, in order to provide warnings to a user, another command having another ‘feature register’ value, for example, ‘FFh’, within a range of E0h˜FFh usable by a vendor may be used. One skilled in the art will appreciate that the commands referred to above are discussed for exemplary purposes only. Commands from other areas may be used without departing from the scope of the disclosure. Furthermore, it may be possible to use any one of the nine standard commands.

[0044] The user may also set the reference value to provide a warning at the appropriate time, as described above. In this case, the reference value may be set in a vendor-specific area of a command having one of the ‘Feature register’ values of E0h˜FFh (for example, a command having the ‘Feature register’ value of ‘FFh’). For example, a warning time point may be determined by a command having the ‘Feature register’ value of ‘E0h’. This is shown in FIG. 7.

[0045] FIG. 7 illustrates a format of a command to control a warning time point according to an exemplary disclosed embodiment. As shown in FIG. 7, an ATA command may be defined as a command code and its accompanying variables. These variables are transferred through different registers. These registers may include, for example, ‘Feature register’, ‘Sector Count register’, ‘Sector Number register’, ‘Cylinder Low register’, ‘Cylinder High register’, ‘Device/Head register’ etc. Furthermore, ‘DEV’ of the ‘Device/Head register’ may indicate whether the semiconductor memory device is used as a master HDD or a slave HDD.

[0046] A command to control the warning time point is a sub command of the SMART command whose command code is ‘B0h’. Furthermore, the code of the sub command is ‘E0h’. A user may set the reference value in the ‘Sector Count register’. When the number of available reserved blocks reaches the reference value, a warning is issued.

[0047] FIG. 8 illustrates an output provided when a command, e.g., ‘DAh’, to provide a warning to a user, is used. When the semiconductor memory device does not reach the warning time point, the ‘Cylinder Low register’ preserves a setting of ‘4Fh’, and the ‘Cylinder High register’ keeps a setting of ‘C2h’ as shown in FIG. 8. However, as shown in FIG. 9, when the semiconductor memory device reaches the warning time point, the ‘Cylinder Low register’ is set as ‘F4h’, and the ‘Cylinder High register’ is set as ‘2Ch’. At this time, a user may execute an operation to back up the stored data so as to maintain the integrity of the stored data.

[0048] The disclosed system provides a warning to a user when the number of available reserved blocks reaches the reference value. This warning permits the user to execute an operation such as, for example, a data backup, in order to maintain the integrity of the stored data. In addition, the disclosed system permits the user to set the time point at which the warning is provided. That is, the user can set the reference value to be compared to the number of available reserved blocks, thereby being capable of controlling a warning time point.

[0049] It will be apparent to those skilled in the art that modifications and variations can be made in the present disclosure without deviating from the spirit or scope of the disclosure. Thus, it is intended that the present disclosure cover any such modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. Accordingly, these and other changes and modifications are seen to be within the true spirit and scope of the invention as defined by the appended claims.