Method and apparatus for reducing power consumption in displays

[0001] Some embodiments of the invention generally relate to graphics systems and displays used with computer systems. More specifically, some embodiments relate to power efficient operation of graphics systems and displays.

[0002] In recent years, efforts have been made to reduce the power requirements of computing devices. For mobile or portable devices operating from a battery or other constrained power supply, the efforts are directed to increasing the operational time of the device by prolonging the viability of the battery. Increasingly, there have been efforts to reduce the power requirements of all computing devices, for at least environmental reasons.

[0003] Conventional computing devices include at some point a display device. Display devices are typically one of the largest power consumers of a computing system.

[0004] Therefore, there is a need for a graphics system and parts thereof that provides advantages for power efficient displays.

[0018] Reference is made to some embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Moreover, in the following detailed description of the embodiments of the invention, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, the embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, procedures, components and circuits have not been described in detail as not to unnecessarily obscure aspects of the invention.

[0019] Some embodiments of a method, display, graphics system and computer system are described for power efficient operation of displays. The graphics system includes a processing system that includes logic for determining pixels of the display that are changing state between consecutive display frames, and for reducing power consumption during the state change by charge sharing. The terms ‘video data’ and frame data’ are used interchangeably. In some embodiments, it may be convenient to think of video data as potentially including information about more than one frame of video; and frame data as including information about a single frame, but this is not a strict classification of the terms. Rather, the terms are used to inform the reader of the focus of the components or processes of the embodiments of the invention, such as, the data being processed.

[0020] FIG. 1 illustrates a computer system with a graphics system 100 and a display 101 according to some embodiments of the invention. The computer system may include one or more central processing units (CPUs) 104, according to some embodiments of the invention. The CPU 104 may include one or more processing cores and may be manufactured by Intel® Corporation. In some embodiments, the CPU 104 may be manufactured by another.

[0021] According to some embodiments of the invention, the graphics system 100 may include a chipset 102, which may also provide a graphics engine through a combination of hardware and software/firmware. In some embodiments, the chipset 102 may also be called a processing system, and may include a video graphics engine 106 and a display controller 108. The graphics system 100 may optionally include a display interface (DI) 109 to provide video data from the chipset 102 to the display 101. The DI 109 may communicate using low-voltage differential signaling (LVDS) to and/or from the graphics system and the display. Accordingly, the frame data or video data may be forwarded to the display 101 via DI 109.

[0022] The display 101 may include a self-refresh (SR) display controller 110. In some embodiments, the SR-display controller 110 may include, among other things, a signal receiver, such as, but not limited to a LVDS receiver, a timing controller, and a look up table (LUT).

[0023] In some embodiments of the invention, the controller 110 may provide the frame data to an active area 112 of the display for the formation of one or more images.

[0024] According to some embodiments of the invention, the display controller 110 may be a liquid crystal display (LCD) controller, or equivalent controller with the additional functions of the embodiments of the invention. Furthermore, the display 101, in some embodiments, may be a LCD display, or other displays with pixels, and various types of these displays, for example, a low temperature poly silicon (LTPS) LCD display.

[0025] FIG. 2 illustrates a computer system with a graphics system 200 and the display 101 according to some embodiments of the invention. The graphics system 200 includes a different architecture than graphics system 100, yet it may, according to some embodiments of the invention, perform the identical functions as described elsewhere herein. Specifically, the graphics system 200 may include a video graphics card 206. The card 206 may include the display controller 108 or the controller 108 may be on a separate board or card (as shown), according to some embodiments of the invention.

[0026] FIG. 3 illustrates a display system 300 according to some embodiments of the invention. A processor 104 is coupled to a bus 122. A frame buffer 114 is also coupled to bus 122. The frame buffer 114 may be a portion of a main memory. Also coupled to bus 122 is dedicated direct memory access controller (DMA) 118 that extracts display data from the frame buffer 114 and puts the display data in the line buffers 120 to be output by the display controller 110 to the active area 112.

[0027] Referring to FIG. 4, an active area 112 comprises a plurality of pixels 60 that are arranged in rows 62 and columns 64. Active area 112, as shown, is composed of rows 62 and columns 64 of pixels 60 in a two-dimensional array. In some embodiments of the invention, active area 112 may have pixel arrays that have more than two dimensions, such as three-dimensional or quasi-three dimensional pixel arrays. The rows and columns uniquely address the active area's individual pixels, and communicate the required color and intensity data to each of the individual pixels. The information to be displayed is typically passed to the display one frame at a time. The information is displayed and then the next frame of information is passed to the display. In some embodiments, this process may repeat itself. In some embodiments, it may repeat in a sequential manner.

[0028] Power consumption of the active area 112 during operation depends on the display input capacitance, voltage and frequency. For instance, power consumption of the active area 112 during operation can be based on the following formula: Energy=0.5*Capacitance*Voltage²*Frequency. The capacitance and frequency terms are typically constrained by the physical design of the active area elements and the display refresh requirements.

[0029] According to some embodiments of the invention, it is possible to affect the voltage term to reduce energy consumed by the active area 112. Because energy is proportional to Voltage², reducing the voltage term significantly reduces the energy required to power the active area 112. According to some embodiments of the invention, the voltage term is affected by affecting how charge is transferred onto the pixel inputs.

[0030] The inputs for active areas typically appear as capacitive loads, with minimal Direct Current (DC) requirements. Of course, other load models can also be used. Further, display technologies, such as bistable interferometric displays have two states, and pixels are held in one of the two states during display of information. Positive or negative charge transfer onto or from the inputs of the display elements within these displays affects the pixel's output state. Power is consumed while work is done changing the output states of the display's pixels and after this change has finished, then minimal energy is required to maintain the display's new pixel states. Typically, the energy required to change the output state of the display's pixels (from on-state to off-state, and from off-state to on-state) is dissipated. According to some embodiments of the invention, instead of dissipating the energy required to change the output state of the display's pixels, at least a portion of the energy is reused, thus reducing the bistable display's overall power requirements. Other displays, such as monochrome displays, color displays, multiple bit-per-pixel displays, 3D displays, quasi-3D displays, bistable displays with multiple bits per color, bistable displays with multiple colors, bistable displays with pixels of different physical areas, or bistable displays with pixels having different load capacitances may also be used.

[0031] FIG. 5 is an example illustration of charge movement during pixel state change using a complementary metal-oxide semiconductor (CMOS). When a pixel input is held at the power output state of DC power rail voltage, i.e., Vcc, the pixel output displays a first state, for instance “ON”. When a pixel input is held at the power output state of ground, the pixel output displays a second state, for instance “OFF”. As shown in FIG. 5, charge is supplied from DC power rail to the input capacitance of a pixel to change the state of the pixel from an “OFF” state to an “ON” state, while charge is discharged to ground change the state of the pixel from an “ON” state to an “OFF” state.

[0032] According to some embodiments of the invention, power consumption may be further reduced within the uni-directional information flow of existing display device drivers (i.e., from display controller 110 to active area 112) by determining the pixel state changes locally to each pixel affected.

[0033] According to some embodiments of the present invention, power consumption by an active area of a display is reduced by reducing the voltage swing required to power the pixels of the display. The pixels that are changing state between consecutive display frames are isolated, such that power is consumed by only those pixels that are changing state. In this way, power is not consumer/wasted by changed pixels when their state is not changing between frames. Further, the power consumed during the state change is reduced by charge sharing, for instance by using a common bus for charge sharing, between the pixels that are in state transition.

[0034] Even though the intermediate aggregate potential of the common bus may not be exactly half way between the two driven potentials (power rail, ground), any potential that is not the power rail or ground will reduce the total energy consumed by the display during pixel state transitions. An example illustration is provided in FIG. 6. FIG. 6 provides a comparison of pixels that are driven with charge sharing according to some embodiments of the invention with pixels that are driven conventionally without charge sharing. The pixels 310 and 320 are shown to be at +5 Volts (V) before the state transition and pixels 330 and 340 are shown to be at ground before the state transition. When conventionally driven without charge sharing, each pixel is driven +/−5V to change the state. Thus, after the state transition, pixels 310 and 320 are shown to be at ground, while pixels 330 and 340 are shown to be at +5V. In contrast, when the pixels 310, 320, 330 and 340 are driven with charge sharing according to some embodiments of the invention, each pixel is driven only a +/−2.5V to achieve the state transition. In this case, the common bus intermediate potential is equal to (5V+5V+0V+0V)/4=2.5V. Because energy required to power the display is proportional to voltage squared, the energy required in this example is four times less when charge sharing is implemented.

[0035] FIG. 7 is a schematic illustrating an embodiment of a system 400 to reduce power consumption in graphical displays. For a pixel 405, a decision block 410 receives as input the current pixel state (“n”) and the next pixel state (“n+1”). The next pixel state “n+1” is received from the display controller 110. The decision block 410 is local to each pixel of the active area 112. The local decision block 410 determines if the pixel state needs to be changed. In certain embodiments, the local decision block 410 can be implemented using an exclusive OR (XOR) gate and may have a binary output. These local decisions may reduce the amount of energy required by a display by limiting the number of pixels changing state to the required minimum. According to some embodiments of the present invention, the local decisions may be implemented without charge sharing.

[0036] The output of the local decision block 410 is input to an AND gate 420. A clock pulse 461 is also input to the AND gate 420. The output of the AND gate 420 is used by a charge sharing switch 430 to determine whether to switch the pixel 405 from a pixel driver 440 to a common bus 450 for charge sharing using the charge sharing switch 430.

[0037] Also shown in FIG. 7 is an adjacent pixel 406 that has also been switched onto the common bus for charge sharing 450 by its respective charge sharing switch 430. The charge sharing switch 430 disconnects the pixel 405 and the pixel 406 from the common bus 450 and to the respective pixel drivers. The pixel driver 440 drives the state transition.

[0038] The output of the AND gate 420 is also fed as a clock pulse to a flip flop 480. The flip flop 480 is used to store the current pixel state n.

[0039] FIG. 8 is a schematic illustrating an embodiment of a system 500 to reduce power consumption in graphical displays. FIG. 8 is similar to FIG. 7 except that, in FIG. 8, a “Display Blank” signal 490 is introduced, such that the display can be reset to a known state during initialization.

[0040] FIG. 9 illustrates a flowchart illustrating a process 900 to reduce power consumption by an active area 112 according to one embodiment of the invention. At block 211, the process 900 isolates those pixels of the graphical active area 112 that are changing state between consecutive display frames. For instance, certain pixels of the graphical active area 112 may be changing from an ‘ON’ state to ‘OFF’ or vice-a-versa. Many graphical displays, such as bistable displays, save information about the state of each pixel locally within the display. In certain embodiments, a newly desired pixel state, as received from a display driver, is compared with the saved previous state. A local decision is made about whether the pixel state is to be changed. At block 211, if the pixel is state is not going to be changed, no further energy is required. If however, the pixel state is to be changed, it requires energy to change state. The local decisions can reduce the amount of energy required by the display by limiting the number of pixels changing state to the minimum required.

[0041] At block 221, if the local decision specifies that the state of a pixel is to be changed, then the pixel is disconnected from the pixel driver and connected to a common bus for charge sharing. While connected to the common bus, the pixel shares its local charge with the other pixels that have also been connected to the common bus. In some embodiments, entire rows of pixels, or select pixels thereof, may be connected to the common bus for charge sharing. Pixels carrying a grounded potential will partially pull down the common bus potential, and pixels with a potential equal to the power rail will charge up the common bus potential. Accordingly, the common bus will migrate to an intermediate charge potential equal to the net positive and negative charges on the connected pixel loads.

[0042] At block 231, each pixel load connected to the common bus, and thus holding a potential equal to the potential of the common bus, is connected to the pixel driver. At block 241, the pixel state is changed. The pixel load will be driven to the appropriate potential based on the new desired state, not from the state at block 211, but with the common bus potential. The common bus potential, in most cases, will be a value intermediate to the DC power rail and ground.

[0043] Process 900 only affects those pixels that must change. Thus, there is no power increase associated with hooking all the pixels up to the common bus each cycle, because otherwise extra energy would be required to drive pixels that are to remain in the initial state back to their unchanged state.

[0044] The method and system for reducing power consumption in graphical displays may be utilized in displays that have the ability of storing the previous state of each pixel. One such display is a display that utilizes bistable interferometric technology. Bistable displays typically retain information abut the pixel state locally. In some bistable displays, voltage on the input of each pixel must be applied to maintain the bistable state. This voltage is typically maintained locally to the pixel, on a per pixel basis, and may only be changed when the pixel is refreshed.

[0045] The process 900 and systems 400 and 500 utilize the idea that the overall brightness of the display typically will be very similar from one frame to the next. This concept is illustrated in FIG. 10, which illustrates a white ball 1002 on a black background 1001. As the white ball 1002 moves from left to right across the active area 112, for every pixel that changes from black to white (on the right hand side of the screen), there is an equivalent pixel changing from white to black (on the left hand side of the screen). FIG. 11 illustrates a single row 80 of the active area 112 over two frames 301 and 351. The row 80 is a one-dimensional display with the white ball moving horizontally across a single row of pixels. As the white ball moves from left to right across the screen, for every pixel that changes from black to white (on the right hand side of the screen) in frame 301, there is an equivalent pixel changing from white to black (on the left hand side of the screen) in successive frame 351. Between the adjacent frames 301 and 351, on average, there will be as many white pixels changing to black pixels as there will be black pixels converting to white pixels.

[0046] Thus, the overall brightness of the active area 112 typically will be very similar from one frame to the next. In FIG. 11, while a positive charge on the input capacitance of the active area 112 is used to indicate darkness (or off-state) and a negative charge on the input capacitance of the active area 112 is used to indicate brightness (or on-state), the charges could be the other way around. Thus, a positive charge on the input capacitance of the active area 112 may be used to indicate brightness (or on-state) and a negative charge on the input capacitance of the active area 112 is used to indicate darkness (or off-state). In either case, during state transition (i.e., when an individual pixel transitions from on-state (brightness) to off-state (darkness) or from off-state (darkness) to on-state (brightness)), there is movement in the charge. For instance, in frame 301, pixel 311 is in on-state (brightness) and corresponding charge on the input capacitance is negative. Also, in frame 301, pixel 312 is in off-state (darkness) and corresponding charge on the input capacitance is positive. In frame 351, pixel 311 is changing from on to off and corresponding charge on the input capacitance is changing from negative to positive. Also, in frame 301, pixel 312 is changing from off to on and corresponding charge on the input capacitance is changing from positive to negative.

[0047] FIG. 12 illustrates a block diagram of an example computer system that may use an embodiment of methods and apparatus for reducing power consumption in graphical displays. In one embodiment, computer system 1000 comprises a communication mechanism or bus 1011 for communicating information, and an integrated circuit component such as a main processing unit 1012 coupled with bus 1011 for processing information. One or more of the components or devices in the computer system 1000 such as the main processing unit 1012 or a chip set 1036 may use an embodiment of the methods and apparatus for reducing power consumption in graphical displays. The main processing unit 1012 may consist of one or more processor cores working together as a unit.

[0048] Computer system 1000 further comprises a random access memory (RAM) or other dynamic storage device 1004 (referred to as main memory) coupled to bus 1011 for storing information and instructions to be executed by main processing unit 1012. Main memory 1004 also may be used for storing temporary variables or other intermediate information during execution of instructions by main processing unit 1012.

[0049] Firmware 1003 may be a combination of software and hardware, such as Electronically Programmable Read-Only Memory (EPROM) that has the operations for the routine recorded on the EPROM. The firmware 1003 may embed foundation code, basic input/output system code (BIOS), or other similar code. The firmware 1003 may make it possible for the computer system 1000 to boot itself.

[0050] Computer system 1000 also comprises a read-only memory (ROM) and/or other static storage device 1006 coupled to bus 1011 for storing static information and instructions for main processing unit 1012. The static storage device 1006 may store OS level and application level software.

[0051] Computer system 1000 may further be coupled to or have an integral display device 1021, such as a liquid crystal display (LCD), coupled to bus 1011 for displaying information to a computer user. A chipset may interface with the display device 1021.

[0052] An alphanumeric input device (keyboard) 1022, including alphanumeric and other keys, may also be coupled to bus 1011 for communicating information and command selections to main processing unit 1012. An additional user input device is cursor control device 1023, such as a mouse, trackball, trackpad, stylus, or cursor direction keys, coupled to bus 1011 for communicating direction information and command selections to main processing unit 1012, and for controlling cursor movement on a display device 1021. A chipset may interface with the input output devices.

[0053] Another device that may be coupled to bus 1011 is a power supply such as a battery and Alternating Current adapter circuit. Furthermore, a sound recording and playback device, such as a speaker and/or microphone (not shown) may optionally be coupled to bus 1011 for audio interfacing with computer system 1000. Another device that may be coupled to bus 1011 is a wireless communication module 1025. The wireless communication module 1025 may employ a Wireless Application Protocol to establish a wireless communication channel. The wireless communication module 1025 may implement a wireless networking standard such as Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard, IEEE std. 802.11-1999, published by IEEE in 1999.

[0054] Accordingly, on average, the methods and apparatus for reducing power consumption described herein, reduce power consumption significantly. In a system without charge sharing, the power consumption by a black screen alternating with a white screen is nearly the same as a screen with a checkerboard pattern with every pixel having a different state than the pixel adjacent to it. However, in a system with charge sharing, then some power savings will be realized in the checkerboard situation compared to the all black/all white situation due to charge sharing within the state transition.

[0055] Accordingly, on average, the methods and apparatus for reducing power consumption described herein, reduce power consumption significantly in mobile computing devices. Examples of mobile computing devices may be a laptop computer, a cell phone, a personal digital assistant, or other similar device with on board processing power and wireless communications ability that is powered by a Direct Current (DC) power source that supplies DC voltage to the mobile device and that is solely within the mobile computing device and needs to be recharged on a periodic basis, such as a fuel cell or a battery.

[0056] Reference in the specification to an embodiment or some embodiments of the invention means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase “in some embodiments” or “according to some embodiments” appearing in various places throughout the specification are not necessarily all referring to the same embodiment.

[0057] While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications of the illustrative embodiments, as well as other embodiments of the invention, which are apparent to persons skilled in the art to which the invention pertains are deemed to lie within the spirit and scope of the invention. The present invention may be implemented by hardware, software, firmware, microcode, or any combination thereof. When implemented in software, firmware, or microcode, the elements of the present invention are the program code or code segments to perform the necessary tasks. A code segment may represent a procedure, a function, a subprogram, a program, a routine, a subroutine, a module, a software package, a class, or any combination of instructions, data structures, or program statements. A code segment may be coupled to another code segment or a hardware circuit by passing and/or receiving information, data, arguments, parameters, or memory contents. Information, arguments, parameters, data, etc. may be passed, forwarded, or transmitted via any suitable means including memory sharing, message passing, token passing, network transmission, etc. The program or code segments may be stored in a processor readable medium or transmitted by a computer data signal embodied in a carrier wave, or a signal modulated by a carrier, over a transmission medium. The “processor readable medium” may include any medium that can store or transfer information. Examples of the processor readable medium include an electronic circuit, a semiconductor memory device, a ROM, a flash memory, an erasable ROM (EROM), a floppy diskette, a compact disk (CD-ROM), an optical disk, a hard disk, a fiber optic medium, a radio frequency (RF) link, etc. The computer data signal may include any signal that can propagate over a transmission medium such as electronic network channels, optical fibers, air, electromagnetic, RF links, etc. The code segments may be downloaded via computer networks such as the Internet, Intranet, etc.

[0058] It is noted that the invention may be described as a process which is usually depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be re-arranged. A process is terminated when its operations are completed. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination corresponds to a return of the function to the calling function or the main function.