Superconductor analog-to-digital converter

[0001] The invention was produced under U.S. Army CERDEC SBIR Contracts W15P7T-04-C-K605 and DAAB07-03-C-D202, and U.S. Navy ONR Contract N0014-02-C-0171. The United States Government has certain rights in this invention.

[0002] The present invention relates to superconducting electronics. In particular, it relates to oversampled Analog-to-Digital Converters.

[0003] One well-known class of analog-to-digital converters (ADCs) is based on oversampling, in which a single-bit quantizer with feedback is used to generate a fast bit sequence that can accurately represent an analog input signal in the band of interest. This requires high sampling rates, for which superconducting electronics is particularly well suited.

[0004] The established approach to an oversampling low-pass ADC is based on sigma—delta (ΣΔ) modulation (also called delta-sigma [ΔΣ] modulation), in which the input signal minus a feedback signal is integrated before quantization. This is well known to result in “noise shaping”, where the quantization noise associated with the data conversion is shifted outside the frequency band of interest. The shifted noise may then be eliminated by a subsequent digital filter. This approach has been generalized to higher order, with multiple integrators and multiple feedback loops, by which the noise-shifting is further enhanced. For the higher order approach to work properly, each integrator must be well isolated from its neighbor. In conventional semiconductor technology, this isolation is achieved with transistor amplifiers.

[0005] A further known generalization of ΣΔ modulators is achieved by replacing the integrators by high-Q resonators. This suppresses the quantization noise at a resonant frequency rather than at low-frequencies, and forms the basis for a bandpass ADC. Again, improved higher-order performance requires good isolation between the resonators.

[0006] Superconducting circuits based on Josephson junctions, in configurations known as rapid single-flux-quantum (RSFQ) logic, can switch on the picosecond timescale, leading to high sampling rates. Przybysz et al. in U.S. Pat. No. 5,140,324 described a first order, single stage, low-pass sigma—delta ADC based on Josephson junctions. Later this was extended to a first order, single stage, bandpass sigma—delta ADC in U.S. Pat. No. 5,341,136. Both of these patents are incorporated herein by reference.

[0007] Lee et al. in U.S. Pat. No. 6,157,329, incorporated herein by reference, demonstrated that one can avoid a feedback loop in a superconducting bandpass ΣΔ modulator by making use of a special feature of Josephson circuits, known as implicit feedback. This technique provides electrical feedback without an explicit loop. However, this approach is applicable only to first-order, one stage, feedback. So far a higher order bandpass ADC in fully superconducting technology has not been achieved.

[0008] In view of the discussed difficulties, embodiments of the present invention disclose a superconducting Analog-to-Digital Converter (ADC) without active semiconductor components, which is characterized as being an N^th-order bandpass sigma—delta ADC. The ADC includes a sequence of stages, which stages include resonators. Each one of these resonators uniquely pertains to one of the stages. The stages number N, with N being at least 2. The stages and the resonators are being characterized by their order in the sequence, with the order having values from 1 through N. The analog signal to be digitized is received by the N-th order stage. The ADC further includes active superconducting components that directionally couple resonator pairs having adjacent orders. The active superconducting components electrically shield the higher order resonator from the lower order resonator. These active superconducting components include a superconducting quantum interference device (SQUID) amplifier, which is inductively coupled to the higher order resonator, and may include a Josephson transmission line (JTL), which is configured to electrically connect the SQUID amplifier to the lower order resonator.

[0015] It is understood that sigma—delta (ΣΔ) analog-to-digital converters (ADC), also known as ΣΔ modulators, or delta-sigma (ΔΣ) modulators/ADC-s, are well known in the electronic arts. Basic concepts of superconductor ADC-s, meaning ADC-s composed of superconducting components, which components may include both active and passive components, have been discussed already, for instance by O. A. Mukhanov et al. in “Superconductor Analog-to-Digital Converters”, Proc. IEEE, Vol. 92, pp. 1564-1584 (2004).

[0016] Briefly, in a low-pass ADC based on sigma—delta (ΣΔ) modulation the input signal (minus an error feedback signal) is integrated before quantization. A variation of ΣΔ ADC-s is achieved by replacing the integrators by resonators. Using a resonator suppresses the quantization noise at a resonant frequency rather than at low-frequencies. Such an ADC is called in the art a bandpass ADC. For both the low pass, integrator type, and the bandpass, resonator type, ΣΔ ADC-s one can extend the ADC operation to higher order, with multiple stages of integrators, or resonators, and with corresponding multiple feedback loops. Higher order ΣΔ ADC-s enhance performance by shifting noise further away from the frequency band of interest. For the proper operation of higher order ADC-s it is desirable that each integrator, or resonator, be well isolated from its lower order neighbor.

[0017] With semiconductor technology isolation of successive feedback stages, involving either integrators, or resonators, is quite straightforward due to the amplification capabilities of transistors, and both multistage low pass and bandpass ΣΔ ADC have been already been introduced. However, since superconducting technology lacks a component such as a transistor, in the art it was generally assumed that higher order ΣΔ ADC are not possible to achieve with superconductive technology. See, for instance, discussion in Q. P. Herr, et al., in “Inductive Isolation in Stacked SQUID Amplifiers” IEEE Transactions on Applied Superconductivity, Vol. 17, pp. 565-568, (2007), where semiconductor transistors are being applied in a hybrid semiconductor/superconductor technology to realize a low pass, two stage ΣΔ ADC.

[0018] Embodiments of the present disclosure are characterized as being higher-order bandpass sigma—delta ADC-s, employing superconductive technology, having only superconductor active components. The use of superconductive technology allows for hitherto unattainable sampling performance, as characterized by both frequency and accuracy.

[0019] The term active superconductor component in this disclosure carries the general accepted meaning used in the art. Active superconductive components generally involve tunnel junctions, most commonly Josephson junctions (JJ). Typical active superconductor components include single JJ-s, Josephson transmission lines (JTL), superconducting quantum interference devices (SQUID), and various combinations of these. Generally, but not exclusively, active superconducting components have some kind of bias condition, for instance, and without limitation, a current bias. Active semiconductor components, which are absent in embodiments of the present disclosure, have their meaning in the art typically as transistors and diodes. Active semiconductor components usually, but not exclusively, operate under some kind of bias conditions, as well.

[0020] FIG. 1A shows a schematic diagram of a superconductor N^th-order bandpass Sigma—delta ADC 10 according to a representative embodiment of the present invention. The ADC of FIG. 1A receives an RF analog input signal 101 and outputs 102 digital pulses, consequently, in this disclosure it is usually referred to as a ΣΔ ADC. Such a nomenclature is not meant to imply limitations. Often, in the art such a structure 10 is named ΣΔ modulator, since its digital output 102 is usually further processed, for instance, deserialized, filtered, etc, before a final multibit output is presented as the output of the ADC. For embodiments of the present invention any and all signal processing, past the digital output 102, are not of major importance, and are not limiting the scope of the invention.

[0021] The schematic of the superconducting bandpass ΣΔ ADC 10 is not unlike the ones already known in the art. An N^th order ADC has N stages. In embodiments of the present invention, the “N” order of the ADC is at least 2. The stages are arranged in a sequence, with the stages being characterized by their order in the sequence, from 1 through N. In FIG. 1A all repeated components, such as stages, resonators, feedback loops, are indicated with an “i” subscript, with “i” taking on the value of the particular order. Thus, for instance, resonator 2 being of order of “2” would have the indicator number 12₂. The stages 11_i each have a resonator 12_i, with each one of the resonators 12_i uniquely pertaining to one of the stages 11_i. The analog RF signal to be digitized is being received 101 by the highest order stage, the one having order N. All other stages receive their inputs by combining two signals. One of these two signals is coming from a feedback loop 13_i. The other signal of the combination comes from the immediate higher order stage, through amplification/isolation (A/I) components 14_i+1,i. Since these A/I components are coupling adjacent order stage pairs, their indicator numbers carry two subscripts, namely the order of the coupled stages. Thus, for instance, the A/I coupling stage 3, 11₃, to stage 2, 11₂, would be indicated as 14_3,2.

[0022] The output of the first order stage 11₁ feeds into a clocked comparator 15. The comparator 15 outputs pulses, which pulses then proceed back into the feedback loops 13_i, and to the output 102 of the ADC. The resonators of the feedback loops 13_i convert the pulses back to analog signals.

[0023] FIG. 1A is only a schematic representation of an N^th order ΣΔ ADC 10. Embodiments of the invention may contain additional components, or fewer components, as such may be known in the art. Additional components may be, without limitation, latches, clocks, delay elements in the feedbacks, and others.

[0024] In embodiments of the present disclosure all components of the ΣΔ ADC 10 are superconductors, used in the general framework of rapid single-flux-quantum (RSFQ) technology. The comparator 15 generates single-flux-quantum (SFQ) pulses. Using only superconductor active components holds for the A/I 14_i+1,i units. As discussed earlier, the prevailing assumption in the art was that superconducting components are not suitable for such a role, primarily because they are not capable for directional coupling. Without directional coupling, the lower stage 11_i may electrically backward disturb the preceding, higher order stage 11_i+1, which may lead to instability in the whole of the ΣΔ ADC 10.

[0025] Embodiments of the present disclosure manifest that a high performance bandpass ΣΔ ADC 10 is achievable with active superconductive components in the A/I 14_i+1,i units between successive pairs of stages.

[0026] FIG. 1B shows a schematic diagram of an amplification/isolation (A/I) unit of the ADC according to an embodiment of the present invention. Active superconducting components non-reciprocally, directionally, couple pairs of adjacent order resonators 12_i, namely, a higher order resonator and a lower order resonator. The active superconducting components of the A/I 14_i+1,i electrically shield the higher order resonator 12_i+1 from the lower order resonator 12_i. The A/I 14_i+1,i contains a SQUID amplifier 141. The SQUID amplifier 141 is inductively coupled 144 to the higher order resonator 12_i+1. The inductive coupling 144 is instrumental in the non-reciprocity of the couplings between successive stages of the ADC. To further enhance directionality and the isolation of the higher order stage, a Josephson transmission line (JTL) 142 may follow the SQUID amplifier 141. The JTL 142 may also regenerate and amplify SFQ pulses.

[0027] Both the SQUID amplifier 141 and the JTL 142 are well known active superconducting components, see, e.g., U.S. Pat. Nos. 4,585,999 and 5,936,458, but have not been used in the role as disclosed in representative embodiments of the present invention. The SQUID amplifier 141 requires a DC bias to operate, so that it would not function properly with a low-pass ADC. This DC bias is not a problem for a bandpass ADC, where only alternating currents have to pass along the ADC. Also, the SQUID amplifier 141 may have some nonlinearity, a disadvantage for optimum noise suppression. However, in spite of such potential difficulties, embodiments of the present disclosure show functioning of the bandpass ΣΔ ADC 10 with unprecedented performance.

[0028] A superconducting ΣΔ ADC in one respect has a unique advantage compared to a semiconductor ΣΔ ADC. This advantage is a direct result of the quantum nature of Josephson junctions (JJ). When a JJ clocked through a second JJ switches, it subtracts a single flux quantum (SFQ=2.07 fWb) from the input while producing a digital output SFQ pulse. The comparator 15 of the ΣΔ ADC may use such a two JJ scheme. The subtraction of the pulse from the input is precisely what a feedback loop would be doing in a ΣΔ ADC. Consequently, there may not be a need for an explicit feedback loop 13₁, for the first stage 11₁. The feedback can be implicit for the first stage 11₁. The possibility for such an implicit feedback for the first stage in a superconductor ADC using SFQ technology has already been demonstrated in the art, see for instance, Lee et al. U.S. Pat. No. 6,157,329. However, the implicit feedback is useable only for the first stage of a ΣΔ ADC, for higher order structures, with N being at least 2, one is forced to use explicit feedback, and the A/I units are unavoidable. Hence, the SFQ pulses produced by the comparator 15 have to be propagated back into at least 1 of the feedback loops 13_i.

[0029] FIG. 2 shows a schematic diagram of a superconductor 2d-order bandpass sigma—delta ADC according to an embodiment of the present invention. This 2d-order ΣΔ ADC 100 employs only superconductive technology, having exclusively superconductive active components. The ADC has two resonators 121, 122, but only the second stage has an explicit feedback loop. The feedback of the first stage is implicit. The comparator is a JJ 151, which is clocked through second JJ 152. Such an arrangement has been known in the art. In a niobium (Nb), nominally 1 μm, technology such a comparator is capable of a pulse rate close to 50 GHz. With a technology of submicron groundrules a pulse rate exceeding 100 GHz is achievable. The comparator JJ 151 subtracts a single flux quantum from the input while producing a digital output SFQ pulse, and thus, provides for the implicit feedback.

[0030] The signal to be digitized is being received 101 by the second resonator 122, while the first resonator 121 feeds into the comparator JJ junction 151. The JJ junction comparator 151 is generating SFQ pulses, which are directed to the second stage feedback loop and to the ADC output 102.

[0031] The coupling between the two resonators is accomplished with components as discussed in connection with FIG. 1B. A superconducting quantum interference device (SQUID) 141 amplifier and a Josephson transmission line (JTL) 142 provide non-reciprocal, directional, coupling between the second resonator 122 and the first resonator 121. The SQUID amplifier 141 is inductively coupled 144 to the second resonator 122. The JTL 142 electrically connects the SQUID amplifier 141 to the first resonator 121.

[0032] FIG. 2 also shows elements that may typically be present in a second order bandpass ΣΔ ADC. Such elements are JTL-s with the purpose of pulse shaping and controlling delay, as total loop delay may need to be adjusted for optimum performance, additional clocks, to adjust phases, and several biasing sources for proper device operation. All of these are shown for illustrative purposes and without intent of limitation.

[0033] As discussed previously, the ΣΔ ADC shown in FIG. 1A and FIG. 2 are often referred to in the art as ΣΔ modulators because they may be embedded into, and are forming the core of, a larger system. Such a system may be a digital radio frequency (RF) receiver. For converting an electromagnetic analog signal into a digital signal, such a RF receiver may use a method involving a representative embodiment of the N^th-order bandpass ΣΔ modulator.

[0034] Embodiments of the present invention are representative of RSFQ logic, and are not tied to any given superconducting material, or technology. Embodiments practiced with any superconductive material, or materials, including so called high-T_c superconductors, are within the scope of the present disclosure.

[0035] FIG. 3 shows a measured output spectrum of the 2d-order ΣΔ ADC 100 for a 7.4 GHz input signal and 10.5 GHz sampling rate, showing second-order noise shaping. Given the very high sampling rate, the output of the ADC 100 is difficult to measure directly. To demonstrate the performance, a special test chip was fabricated that incorporates a deserializer that reduces the output data rate by a factor of 16. All 16 lines are fed out in parallel to a field-programmable gate array (FPGA) which can reconstruct the data for computation of the power spectrum as shown in FIG. 3. For test purposes a sinusoidal signal at 7.4 GHz was used, together with a clock, or sampling, frequency of f_clk=10.5 GHz. The first 121 and the second 122 resonators were set at f₁=7.4 GHz and f₂=7.8 GHz. The correct operation of the ΣΔ ADC 100 is visible by noise shaped with two dips, near each of the resonant frequencies. This demonstrated the second-order response. Also the input signal shows up as the sharp peak at 7.4 GHz.

[0036] FIG. 4 shows a measured power spectrum in a 60 MHz output band after digital downconversion and decimation for 7.6 GHz test signal and 30 GHz sampling rate. The power spectrum comes from an X-band all-digital receiver implemented as an integrated circuit on a single chip in all superconductor Nb technology with 1.5 μm groundrules. At such dimensions the JJ critical current, J_c, is 4.5 kA/cm². A sinusoidal test signal enters a 2d-order bandpass ΣΔ ADC 100 such as that of FIG. 2, which ΣΔ ADC is embedded in the X-band all-digital receiver. The first 121 and the second 122 resonators were set at f₁=7.4 GHz and f₂=7.6 GHz. The signal to noise ratio for a 120 MHz output band is 41 dB, corresponding to 6.5 effective bits, and the spur-free dynamic range (SFDR), a measure of merit known in the art, is 60 dB, corresponding to approximately 10 bits.

[0037] In the foregoing specification, the invention has been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention.

[0038] Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential feature, or element, of any or all the claims.

[0039] Many modifications and variations of the present invention are possible in light of the above teachings, and could be apparent for those skilled in the art. The scope of the invention is defined by the appended claims.