Frequency hopping control circuit for reducing EMI of power supplies

[0001] 1. Field of the Invention

[0002] The present invention relates to a power supply. More particularly, the present invention relates to the control circuit of a switching power supply.

[0003] 2. Description of Related Art

[0004] Power supplies are used for converting an unregulated power into a regulated voltage or current. FIG. 1 illustrates a conventional power supply. A control circuit 10 generates a switching signal V_SW for controlling a transistor 20 to switch a transformer 30. A resistor 40 senses a switching current I_P of the transformer 30 to control the switching. A resistor 45 determines the switching frequency of the control circuit 10. A terminal FB of the control circuit 10 is connected to an output of a feedback circuit 50. The feedback circuit 50 is coupled to an output terminal of the power supply to generate a feedback signal V_FB. The duty cycle of the switching signal V_SW is modulated in response to the feedback signal V_FB to determine the power transferred from an input terminal of the power supply to the output terminal of the power supply.

[0005] Even though the switching technology reduces the size of power supplies, the electric and magnetic interference (EMI) generated by a switching device has an impact on the power supply and the peripheral equipments thereof. Therefore, apparatuses for reducing or preventing EMI (e.g. EMI filter, transformer protector, etc) are disposed in power supplies. However, such kinds of apparatus increase power consumption, the cost and the size of power supplies. Recently, frequency modulation or frequency hopping technologies are applied in many conventional technologies to reduce EMI. For example, the conventional technologies “Reduction of Power Supply EMI Emission by Switching Frequency Modulation” (IEEE Transactions on Power Electronics, VOL. 9. No. 1. January 1994) and “Effects of Switching Frequency Modulation on EMI Performance of a Converter Using Spread Spectrum Approach” (Applied Power Electronics Conference and Exposition, 2002, 17-Annual, IEEE, Volume 1, 10-14, March, 2002, Pages: 93-99) etc, and U.S. Pat. No. 6,229,366 “Offline Converter with Integrated Softstart and Frequency Jitter” (May 8, 2001) and U.S. Pat. No. 6,249,876 “Frequency Jittering Control for Varying the Switching Frequency of a Power Supply” (Jun. 19, 2001) etc., have been disclosed.

[0006] However, a disadvantage of the conventional technologies is that the output of the power supply will carry an unexpected ripple signal when there is frequency hopping. How the unexpected ripple signal is generated in the presence of frequency hopping will be described below with reference to the formulas.

[0007] An output power P_O of the power supply is the product of an output voltage V_O and an output current I_O of the power supply, the equation of which is expressed as:
P_O=V_O×I_O=η×P_IN  (1)

[0008] The relation between the input power P_IN of the transformer 30 and the switching current I_P can be expressed as:

[0009] $P_{\mathrm{IN}}=\frac{1}{2\times T}\times L_P\times I_P^2$ $I_P=\frac{V_{\mathrm{IN}}}{L_P}\times T_{\mathrm{ON}}$

[0010] Where η is the efficiency of the transformer 30, V_IN represents an input voltage of the transformer 30, L_P represents a primary inductance of the transformer 30, T represents the switching period of the switching signal V_SW, and T_ON represents the on-time of the switching signal V_SW.

[0011] Thus, equation (1) can be given by:

[0012] $\begin{array}{cc}{P}_O=\eta \times \frac{V_{\mathrm{IN}}^2\times T_{\mathrm{ON}}^2}{2\times L_P\times T}& \left(2\right)\end{array}$

[0013] It can be understood from equation (2) that the switching period T changes in response to the frequency hopping. When the switching period T changes, the output power P_O changes accordingly. Therefore, the unexpected ripple signal is generated when the output power P_O changes.

[0014] Another disadvantage of the conventional technologies is the unexpected range of frequency hopping. Since the range of frequency hopping is related to the setting of the switching frequency, the effect of reducing the EMI is limited in response to different switching frequency setting under different application needs.

[0015] Accordingly, the present invention is directed to provide a frequency hopping control circuit for reducing the EMI of power supplies.

[0016] According to another aspect of the present invention, a frequency hopping control circuit is provided to prevent unexpected ripple signal at an output of a power supply.

[0017] Based on the aforementioned and other objectives, the present invention provides a frequency hopping control circuit for controlling a power supply. The control circuit includes a switching circuit, a first oscillator, a second oscillator, and an attenuator. The switching circuit is coupled to a feedback circuit to generate a switching signal for regulating an output of the power supply. The feedback circuit is coupled to the output of the power supply to generate a feedback signal for controlling the switching signal. The first oscillator is connected to the switching circuit to generate a clock signal for determining the switching frequency of the switching signal. The second oscillator generates an oscillating signal. A voltage-to-current converter of the second oscillator generates a first signal, a second signal, and a third signal in response to the oscillating signal, and transmits the first signal and the second signal to the first oscillator to modulate the frequency of the clock signal. The attenuator is coupled to the feedback circuit to attenuate the feedback signal. The third signal is coupled to the attenuator to control the attenuation rate of the feedback signal.

[0018] According to another aspect of the present invention, a frequency hopping control circuit is provided to control a power supply. The control circuit includes a switching circuit, a first oscillator, a second oscillator, and an attenuator. The switching circuit is coupled to a feedback circuit to generate a switching signal for regulating an output of the power supply. The feedback circuit is coupled to the output of the power supply to generate a feedback signal for controlling the switching signal. The first oscillator is coupled to the switching circuit to determine the switching frequency of the switching signal. The second oscillator generates an oscillating signal, and a first signal, a second signal, and a third signal based on the oscillating signal. The first signal and the second signal are transmitted to the first oscillator to modulate the switching frequency of the switching signal. The attenuator is coupled to the feedback circuit to attenuate the feedback signal. The third signal is coupled to the attenuator to control the impedance thereof.

[0019] The present invention further provides a controller having frequency hopping for controlling a power supply. The controller includes a switching circuit, a first oscillator, a second oscillator, and an attenuator. The switching circuit is coupled to a feedback circuit to generate a switching signal for regulating an output of the power supply. The feedback circuit is coupled to the output of the power supply to generate a feedback signal for controlling the switching signal. The first oscillator is coupled to the switching circuit to determine the switching frequency of the switching signal. The second oscillator is coupled to the first oscillator to modulate the switching frequency of the switching signal. The attenuator is coupled to the feedback circuit to attenuate the feedback signal. The second oscillator is connected to the attenuator to control the attenuation rate of the feedback signal.

[0020] The present invention provides another controller having frequency hopping for controlling a power supply. The controller includes a switching circuit, a first oscillator, and a second oscillator. The switching circuit is coupled to a feedback circuit to generate a switching signal for regulating an output of the power supply. The feedback circuit is coupled to the output of the power supply to generate a feedback signal for controlling the switching signal. The first oscillator is coupled to the switching circuit to determine the switching frequency of the switching signal. The second oscillator generates an oscillating signal, and a second signal in response to the oscillating signal, and transmits the second signal to the first oscillator to modulate the switching frequency of the switching signal.

[0021] In the present invention, the spectrum of the switching energy is extended. Therefore, the EMI of the power supply is reduced because the switching frequency of the switching signal is modulated. In addition, since the third signal controls the attenuation rate of the feedback signal (which controls the on-time of the switching signal), the variation thereof is compensated by hopping the switching frequency, and the output power and the output voltage are kept constant to avoid unexpected ripple signal at the output of the power supply, and to keep the frequency hopping operation not affected by the setting of the switching frequency of the power supply.

[0022] In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, a preferred embodiment accompanied with figures is described in detail below.

[0023] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

[0035] FIG. 1 illustrates a conventional power supply. A control circuit 10 is coupled to a feedback circuit 50 to generate a switching signal V_SW for regulating an output of the power supply. The switching signal V_SW is generated in response to a feedback signal V_FB. The feedback circuit 50 is coupled to the output of the power supply to generate the feedback signal V_FB. A switching current I_P of a transformer 30 is converted into a switching current signal V_S by a sensing resistor 40. A switching current signal V_S is provided to the control circuit 10 to generate the switching signal V_SW.

[0036] FIG. 2 is a circuit diagram illustrating the control circuit 10 according to an embodiment of the present invention. Referring to FIG. 2, in the control circuit 10, a switching circuit includes comparators 71 and 72, a flip-flop 75, an inverter 70, AND gates 73 and 79, a diode 80, a resistor 90, and an attenuator composed of resistors 91, 92, and 93. The resistor 90 is used for pulling up the level at a terminal FB. The feedback signal V_FB at the terminal FB is coupled to the resistor 91 through the diode 80. The diode 80 shifts the level of the feedback signal V_FB. The attenuator further attenuates the feedback signal V_FB to reduce loop gain and stabilize the feedback loop of the power supply. The resistor 92 is connected between the resistor 91 and the grounded resistor 93. A joint of resistors 91 and 92 is connected to a positive input of the comparator 71 to provide an attenuated feedback signal V_FB′. A negative input of the comparator 71 is coupled to the switching current signal V_S. An output of the comparator 71 is coupled to a reset input of the flip-flop 75 through the AND gate 73. The switching current signal V_S is further coupled to a negative input of the comparator 72. A reference voltage V_T is provided to a positive input of the comparator 72. An output of the comparator 72 is used for resetting the flip-flop 75 through the AND gate 73. A clock signal PLS activates the flip-flop 75 through the inverter 70. An output of the inverter 70 is further connected to an input of the AND gate 79. Another input of the AND gate 79 is connected to an output of the flip-flop 75. An output of the AND gate 79 generates the switching signal V_SW. Accordingly, the switching signal V_SW is switched in response to the clock signal PLS. The switching signal V_SW is turned off immediately as long as the switching current signal V_S is higher than the attenuated feedback voltage V_FB′ and/or the reference voltage V_T.

[0037] An oscillator 100 generates the clock signal PLS and a third signal I_W3. The oscillator 100 is connected to a resistor 45 via a terminal RT to determine an oscillating frequency of the clock signal PLS. The third signal I_W3 is drawn between the resistor 92 and the resistor 93 to set the attenuation rate of the feedback signal V_FB.

[0038] The oscillator 100 includes a first oscillator 300 and a second oscillator 200, as shown in FIG. 3. The first oscillator 300 generates the clock signal PLS, and the second oscillator generates the third signal I_W3. The terminal RT is connected to the first oscillator 300.

[0039] FIG. 4 is a circuit diagram of the second oscillator 200 according to an embodiment of the present invention. The second oscillator 200 includes a current source 225 for generating a charge current. The current source 226 generates a discharge current. A switch 227 is connected between the current source 225 and a capacitor 210. A switch 228 is connected between a current source 226 and the capacitor 210. Therefore, an oscillating signal WAV is generated across the capacitor 210. A reference voltage V_HS is provided to a first input of a comparator 230. A second input of the comparator 230 is connected to the capacitor 210. A reference voltage V_LS is provided to a second input of a comparator 235. A first input of the comparator 235 is connected to the capacitor 210. The level of the reference voltage V_HS is higher than that of the reference voltage V_LS. An output of the comparator 230 is used for driving a first input of an NAND gate 240. An output of the NAND gate 240 is used for driving an inverter 220 and turning on/off the switch 228. An output of the inverter 220 is used for turning on/off the switch 227. Two inputs of an NAND gate 245 are connected to the output of the NAND gate 240 and an output of the comparator 235, respectively. An output of the NAND gate 245 is connected to a second input of the NAND gate 240. A voltage-to-current converter 250 generates a first signal I_W1, a second signal I_W2, and a third signal I_W3 in response to the oscillating signal WAV.

[0040] FIG. 5 is a circuit diagram of the voltage-to-current converter 250 according to an embodiment of the present invention. The voltage-to-current converter 250 including an operational amplifier 255, a resistor 256, and a transistor 260 is used for generating a current I₂₆₀ in response to the oscillating signal WAV. Transistor 261, transistor 262, and transistor 263 form a current mirror circuit to generate the current I₂₆₂ and the first signal I_W1 in response to the current I₂₆₀. Transistor 264, transistor 265, and transistor 266 form another current mirror circuit to generate the second signal I_W2 and the third signal I_W3 in response to the current I₂₆₂.

[0041] FIG. 6 is a waveform of the oscillating signal WAV according to an embodiment of the present invention. The first signal I_W1, the second signal I_W2, and the third signal I_W3 are generated in response to the oscillating signal WAV. T_H in FIG. 6 refers to a period of the oscillating signal WAV.

[0042] FIG. 7A is a circuit diagram of the first oscillator 300 according to an embodiment of the present invention. The oscillator 300 includes a charge current source 325 for generating a charge current I₃₂₅, a discharge current source 326 for generating a discharge current I₃₂₆, an oscillating capacitor 320 for generating a ramp signal SAW, a switch 327 connected between the charge current source 325 and the oscillating capacitor 320, and a switch 328 connected between the discharge current source 326 and the oscillating capacitor 320. A reference voltage V_HM is provided to a first input of a comparator 330. A second input of the comparator 330 is connected to the oscillating capacitor 320. A reference voltage V_LM is provided to a second input of a comparator 335. A first input of the second comparator 335 is connected to the oscillating capacitor 320. The level of the reference voltage V_HM is higher than the reference voltage V_LM.

[0043] A NAND gate 340 is used for generating the clock signal PLS to determine the switching frequency of the switching signal V_SW. An output of the comparator 330 is used for driving a first input of the NAND gate 340. An output of the NAND gate 340 is used for turning on/off the switch 328. Two inputs of a NAND gate 345 are connected to the output of the NAND gate 340 and an output of the comparator 335 respectively. An output of the NAND gate 345 is connected to a second input of the NAND 340. The output of the NAND gate 345 is used for turning on/off the switch 327. Therefore, the ramp signal SAW is generated across the capacitor 320. The first signal I_W1 and the second signal I_W2 are coupled to a charge current I₃₂₅ of the charge current source 325 and a discharge current I₃₂₆ of the discharge current source 326 in parallel respectively to modulate the switching frequency.

[0044] FIG. 7B is a circuit diagram of the first oscillator 300 according to another embodiment of the present invention. The first signal I_W1 and the second signal I_W2 are not used for charging/discharging the capacitor 320. The constant current source 350 is connected to a resistor 351 to generate the reference voltage V_HM. The second signal I_W2 is coupled to the capacitor 351 in parallel to modulate the switching frequency.

[0045] FIG. 8 is a waveform of the ramp signal SAW and the clock signal PLS according to an embodiment of the present invention. T_SW represents a period of the ramp signal SAW. The frequencies of the ramp signal SAW and the clock signal PLS are determined by the charge current I₃₂₅, the discharge current I₃₂₆, and the reference voltages V_HM and V_LM. Here, the charge current I₃₂₅ and the discharge current I₃₂₆ are generated by the circuit shown in FIG. 9.

[0046] FIG. 9 is a circuit diagram of the charge current source 325 and the discharge current source 326 according to an embodiment of the present invention. An operational amplifier 360, the resistor 45, and a transistor 361 generate the current I₃₆₁ in response to a reference voltage V_RT. The transistors 362, 363, and 364 form a current mirror circuit for generating a current I₃₆₃ and the charge current I₃₂₅ in response to a current I₃₆₁. The transistors 365 and 366 form another current mirror circuit for generating the discharge current I₃₂₆ in response to the current I₃₆₃.

[0047] In other applications, the switching frequency can be determined by selecting the resistance of the resistor 45. The first signal I_W1, the second signal I_W2, and the third signal I_W3 change when the oscillating signal WAV of the second oscillator 200 changes, and further the switching frequency set by the first oscillator 300 is extended. When modulating the reference voltage V_HM or the charge current I₃₂₅ and the discharge current I₃₂₆, the switching frequency of the switching signal V_SW is hopped correspondingly. Thus the spectrum of the switching energy is extended. The EMI of the power supply is reduced accordingly. Referring to equation (2), the hopping of the switching period T varies the output power of the power supply. The third signal I_W3 further controls the attenuation rate of the feedback signal V_FB, which controls the on-time T_ON of the switching signal V_SW. As a result, by hopping the switching frequency to compensate the variation thereof, the output power and the output voltage are kept constant.

[0048] It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.