Switching mode power supply

[0001] This application claims priority to and the benefit of Korea Patent Application No. 10-2004-31006 filed on May 3, 2004 in the Korean Intellectual Property Office, the entire content of which is incorporated herein by reference.

[0002] 1. Field of the Invention

[0003] The present invention relates to a switching mode power supply (SMPS). More specifically, the present invention relates to a switching mode power supply for compensating for variations of maximum output power caused by variations of an input power.

[0004] 2. Description of the Related Art

[0005] A switching mode power supply (SMPS) is a device for converting a direct current (DC) supply voltage into a DC output voltage. The DC output voltage can be greater or less than the DC supply voltage. The switching mode power supply is mainly used for battery-based power supplies installed in electronic devices such as mobile phones and laptop computers. Such electronic devices are operable in a normal operation mode with a relatively large amount of power consumption and a standby operation mode with a relatively small amount of power consumption.

[0006] However, conventional switching mode power supplies generate unstable output power because of propagation delays generated by elements of the switching mode power supply when the input voltage is varied. Propagation delays include internal propagation delays of a controller and turned-off delay times of a switch.

[0007] FIG. 1 shows the current flowing to a main switch coupled to the primary side of a general switching mode power supply in the ideal case of no propagation delay. In typical configurations the main switch is a MOSFET and the current is the drain current of a MOSFET. In such ideal configurations the peak current flowing to the main switch is controlled to be constant according to feedback information (i1P) at an output terminal even when the input voltage varies. This feedback ensures that the maximum power transmitted to the output terminal is controlled to be constant.

[0008] FIG. 2 shows the main switch current on the primary side of a general switching mode power supply with propagation delay. The peak currents of the main switch are different depending on the input voltage when a propagation delay of Δt is generated in the SMPS. Without a propagation delay for low and high Vin input voltages the times to reach the i1P peak current are t1 and t2, respectively. With a propagation delay the main switch current continues rising after t1 or t2, and therefore the peak current varies depending on the input voltage. In detail, since the main switch current's gradient di/dt=Vin1/L1 is small for low a input voltage, and the gradient di/dt=Vin2/L1 is large for a high input voltage, the peak currents i1 and i2, reached after the propagation delay Δt, are different.

[0009] The difference of the peak currents on the primary side causes the maximum output power at the output terminal depend on the input power because of the presence of the propagation delay of the SMPS.

[0010] Briefly and generally, embodiments of the present invention include a switching mode power supply (SMPS) for controlling variations of maximum output power generated by a propagation delay.

[0011] In some embodiments, a switching mode power supply (SMPS) includes a power supply including a main switch coupled to a primary coil of a transformer, and supplying power to a secondary coil of the transformer according to an operation of the main switch; an input voltage sensor for sensing a level of an input voltage; and a switching controller for comparing a first voltage which corresponds to the input voltage sensed by the input voltage sensor with a second voltage which corresponds to the current flowing through the main switch, and outputting a control signal for controlling a duty of the main switch to the main switch.

[0012] In some embodiments the first voltage is inversely proportional to the input voltage.

[0013] In some embodiments a peak current flowing through the main switch is substantially constant irrespective of the input voltage.

[0014] In some embodiments of the present invention, a switching mode power supply (SMPS) includes a power supply including a main switch coupled to a primary coil of a transformer, and supplying power to a secondary coil of the transformer according to an operation of the main switch; an input voltage sensor for sensing a level of an input voltage; a feedback circuit for generating a feedback voltage which corresponds to a voltage output to the secondary coil of the transformer; and a switching controller for comparing the input voltage sensed by the input voltage sensor, a first voltage which corresponds to the feedback voltage, and a second voltage which corresponds to the current flowing through the main switch, and outputting a control signal for controlling the duty of the main switch to the main switch.

[0015] In some embodiments the first voltage is inversely proportional to the sensed input voltage.

[0016] In some embodiments the switching controller outputs a control signal for turning off the main switch when the first voltage substantially corresponds to the second voltage.

[0017] The currents flowing through the main switch are substantially the same irrespective of the sensed input voltage when the main switch is turned off after the same is turned on.

[0018] In some embodiments of the present invention, a switching mode power supply (SMPS) includes a power supply including a main switch coupled to a primary coil of a transformer, and supplying power to a secondary coil of the transformer according to an operation of the main switch; an input voltage sensor for sensing an input voltage; and a switching controller for controlling the peak current flowing through the main switch to be constant irrespective of the sensed input voltage. The peak current varies according to a voltage output to the secondary coil of the transformer.

[0027] In the following detailed description, only certain embodiments of the invention has been shown and described, simply by way of illustration of the best mode contemplated by the inventors of carrying out the invention. As will be realized, the invention is capable of modification in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not restrictive. To clarify the present invention, parts which are not described in the specification are omitted, and parts for which the same descriptions are provided have the same reference numerals.

[0028] FIG. 3 shows an SMPS circuit according to an embodiment of the present invention. The SMPS circuit includes a power supply 100, a feedback circuit 200, a switching controller 300, an output unit 400, and an input voltage sensor 500.

[0029] The power supply 100 includes a bridge diode BD for rectifying an input AC voltage into a Vin rectified voltage on a primary voltage rail, a capacitor Cin, coupled between the primary voltage rail and the ground, for smoothing the rectified voltage, and a primary coil L1 of a transformer coupled to the primary voltage rail to receive the rectified voltage Vin. Furthermore, a main switch includes a switching MOS transistor Qsw, coupled to the primary coil L1, and a sense resistor Rsense coupled between a source of switching MOS transistor Qsw and the ground for sensing the current which flows through the switching MOS transistor Qsw. The main switch may include a transistor of a type different from MOSFETs.

[0030] The input voltage Vin of power supply 100 generates an output voltage Vout in the secondary coil according to the duty of switching MOS transistor Qsw. The SMPS includes a feedback loop, sensing output voltage Vout and using the sensed value to control the duty of switching MOS transistor Qsw and accordingly regulate the output voltage.

[0031] Output unit 400 includes a diode D1 having an anode coupled to the secondary coil L2 of the transformer and a cathode, where output voltage Vout is produced, a capacitor C1 coupled between the cathode of the diode D1 and the ground, and resistors R3 and R4 coupled in series between the cathode of the diode D1 and the ground. Output unit 400 further includes an error amplifier Amp1 for receiving a voltage at a node between the resistors R3 and R4 through an inverting terminal and a reference voltage of Vref through a non-inverting terminal, and a photo diode PC1 coupled between an output terminal of the error amplifier Amp1 and the cathode of diode D1.

[0032] Output unit 400 outputs a constant output voltage Vout to a load and senses a sensed feedback voltage Vsfb related to output voltage Vout to feedback circuit 200 in order to regulate the output voltage. In the present embodiment, sensed feedback voltage Vsfb is generated by dividing output voltage Vout by resistors R1 and R2, thus Vsfb=R3/(R3+R4)*Vout. Sensed feedback voltage Vsfb and reference voltage Vref are input to the inverting terminal and the non-inverting terminal of error amplifier Amp1, respectively. These voltages are then compared to determine the current output by error amplifier Amp1 to photo diode PC1. Photo diode PC1 is part of a photo coupler together with a photo transistor PC2 of feedback circuit 200 and provides information corresponding to output voltage Vout to feedback circuit 200.

[0033] Feedback circuit 200 includes photo transistor PC2, which is part of the photo coupler together with photo diode PC1, and a capacitor Cfb coupled in parallel to photo transistor PC2 at a feedback node with a feedback voltage Vfb. Photo transistor PC2 generates a current corresponding to the output voltage of error amplifier Amp1 and can thought of as a dependent current source. In other words, photo transistor PC2 controls the current corresponding to output voltage Vout, so that a relatively large amount of current flows to photo transistor PC2 to reduce feedback voltage Vfb when output voltage Vout is high, and a relatively small amount of current flows to photo transistor PC2 to increase feedback voltage Vfb when output voltage Vout is low. By this mechanism information corresponding to output voltage Vout is sensed by feedback circuit 200 and is input to switching controller 300. This information is used to control the duty of switching MOS transistor Qsw.

[0034] Input voltage sensor 500 includes resistors R1 and R2 coupled in series between the primary voltage rail and the ground. A node between resistors R1 and R2 is coupled to switching controller 300. At this node input voltage Vin is sensed and divided to generate sensed input voltage Vin′: Vin′=R2/(r1+r2)*Vin. Vin′ is input to switching controller 300 and is used to control the switching duty of switching MOS transistor Qsw. This embodiment controls the variation of the maximum output power due to the propagation delay by adjusting the duty according to input voltage Vin, as described below.

[0035] Switching controller 300 includes a control module 320, a diode D2 having an anode coupled to a secondary coil L3 and a cathode coupled to a secondary Vcc node, and a capacitor C2 coupled between secondary Vcc node and the ground. Secondary coil L3 generates current pulses, powered by the switching operation of power supply 100. Capacitor C2 and diode D2 rectify and smooth the current pulses generated by secondary coil L3 to generate a substantially constant voltage Vcc at secondary Vcc node. Secondary Vcc node is coupled into control module 320. The Vcc voltage is used as a bias voltage by control module 320.

[0036] Control module 320 receives sensed input voltage Vin′ , feedback voltage Vfb, and a sense voltage Vsense, sensing the current which flows between the drain and the source of switching MOS transistor Qsw. In response, control module 320 outputs a gate voltage Vg for controlling the switching of switching MOS transistor Qsw.

[0037] FIG. 4 shows a detailed circuit diagram of control module 320 according to an embodiment of the present invention. Control module 320 includes a switching driver 322 for controlling the turn on/off of switching MOS transistor Qsw, and a switching control signal generator 324 for outputting a switching control voltage Vcp′ to switching driver 322.

[0038] Switching driver 322 includes a comparator CP1 for receiving switching control voltage Vcp′ through an inverting terminal of comparator CP1 and sense voltage Vsense through a non-inverting terminal, and a MOS transistor driver 322a for receiving an output voltage from comparator CP1. MOS transistor driver 322a outputs gate voltage Vg for controlling the switching operation of switching MOS transistor Qsw.

[0039] Switching control signal generator 324 includes a current source i_1, a diode having an anode coupled to current source i_1 and a cathode coupled to feedback voltage Vfb, a diode D4 having an anode coupled to current source i_1, resistors R8 and R9 coupled in series between a cathode of diode D4 and the ground, and a maximum power controller 324a for receiving sensed input voltage Vin′ and controlling the maximum output power.

[0040] The maximum power controller 324a includes an amplifier Amp2 for receiving sensed input voltage of Vin′ through a non-inverting terminal; a resistor R8 coupled between an inverting terminal of amplifier Amp2 and the ground; a resistor R5 coupled between the inverting terminal of amplifier Amp2 and an output terminal of amplifier Amp2; a voltage follower Amp3 for outputting a voltage at the output terminal of amplifier Amp2; a resistor R7 having a first terminal coupled to an output terminal of voltage follower Amp3; a transistor Q1 having a collector coupled to a second terminal of the resistor R7, having a base coupled to the collector, and having a grounded emitter; a transistor Q2 having a base coupled to the base of transistor Q1 and having a grounded emitter; and a diode D5 having a cathode coupled to the collector of transistor Q2 and having an anode coupled to current source i_1. Voltage follower Amp3 transmits an output voltage Va output by amplifier Amp2 to a voltage node Va′ and prevents the supply of current i_3 to amplifier Amp2. Transistors Q1 and Q2 form a current mirror to duplicate current i_3 flowing to the emitter of transistor Q1 a predetermined number of times, and transmit the duplicated current to the emitter of transistor Q2.

[0041] FIGS. 5-7 illustrate the operation of the SMPS. FIG. 5 shows a constant peak drain current of switching MOS transistor Qsw, when switching control voltage Vcp′ input to the inverting terminal of comparator CP1 varies according to an input voltage according to an embodiment of the present invention with propagation delay.

[0042] FIG. 6 shows a graph of sensed input voltage of Vin′ and a current of i_4 flowing to a base of transistor Q2 according to an embodiment of the present invention.

[0043] FIG. 7 shows a graph of sensed input voltage of Vin′ and switching control voltage Vcp′ input to the inverting terminal of comparator CP1 according to an embodiment of the present invention.

[0044] Next, sensed input voltage Vin′ and current i_4 flowing to the emitter of transistor Q2 will be described. Output voltage Va of amplifier Amp2 and sensed input voltage Vin′ are related as:

[0045] $\begin{array}{cc}\mathrm{Va}=\frac{\left(\mathrm{R5}+\mathrm{R6}\right)}{\mathrm{R6}}{\mathrm{Vin}}^{\prime }& \left(1\right)\end{array}$

[0046] Output voltage Va of amplifier Amp2 is given by Equation (1), since the voltage at the non-inverting terminal of amplifier Amp2 corresponds to the voltage at the inverting terminal thereof and hence Va=(R5+R6)*i_2.

[0047] Output voltage Va of amplifier Amp2 substantially corresponds to output voltage Va′ of voltage follower Amp3 according to the operation of voltage follower Amp3. Current i_3 flowing to the emitter of transistor Q1 is given by Equation 2, when transistor Q1 is turned on:

[0048] $\begin{array}{cc}\mathrm{i\_}3=\frac{\mathrm{Va}-0.7}{\mathrm{R7}}& \left(2\right)\end{array}$

[0049] Since transistors Q1 and Q2 form a current mirror and i_4=k*i_3 holds, current i_4 flowing to the emitter of transistor Q2 satisfies:

[0050] $\begin{array}{cc}\mathrm{i\_}4=k\left[\frac{\left(\mathrm{R5}+\mathrm{R6}\right)}{\mathrm{R6}}{\mathrm{Vin}}^{\prime }-0.7\right]/\mathrm{R7}& \left(3\right)\end{array}$

[0051] In words, current i_4 is proportional to sensed input voltage Vin′:
i_—4∝Vin′  (4)

[0052] This relationship is shown in FIG. 6.

[0053] Also, current i_4 and input voltage Vin satisfy Equation 5 since sensed input voltage Vin′ and input voltage Vin are related as Vin′=R2/(R1+R2)*Vin.
i_—4∝Vin  (5)

[0054] Equation 5 shows that the maximum power controller 324a generates current i_4 proportional to input voltage Vin.

[0055] The currents flowing to resistors R8 and R9 are controlled through input voltage Vin and switching control voltage Vcp′ input to the inverting terminal of comparator CP1.

[0056] A method for establishing switching control voltage Vcp′ input to the inverting terminal of comparator CP1 according to input voltage. Vin will now be described in detail.

[0057] In general, switching control voltage Vcp′ varies according to feedback voltage Vfb. Feedback voltage Vfb is determined by output voltage Vout of output unit 400. Feedback voltage Vfb controls current i_6 flowing to resistors R8 and R9 so that switching control voltage Vcp′ at the inverting input terminal of comparator CP1 varies, and output voltage Vout is accordingly regulated through this feedback process. When current i_4 flowing through diode D5 of maximum power controller 324a varies depending on input voltage Vin, currents i_1, i_5, i_4, and i_6 satisfy Equation 6:
i_—1=i_—5+i_—4+i_—6  (6)

[0058] Current i_5 flowing through diode D3 regulates variations of output voltage Vout of output unit 400 according to the load. Current i_4 is not related to current i_5. Therefore, Equation 6 can be rewritten as Equation 7 by discarding current i_5 in the case of compensating for the variation of maximum output power according to input voltage Vin because of the existence of a propagation delay:
i_—⊥=i_—4+i_—6  (7)

[0059] Current i_6 varies according to current i_4 since current i_1 is constant. That is, current i_6 decreases when current i_4 increases, and current i_6 increases when current i_4 decreases. Hence, current i_6 is controlled by current i_4 in proportion to input voltage Vin. Current i_6 is proportional to switching control voltage Vcp′ since switching control voltage Vcp′ is input to the non-inverting terminal of comparator CP1 and current i_6 satisfies Vcp′=i_6*R9. Therefore, the relation between the voltages of Vin and Vcp′ satisfies the graph of FIG. 7 with reference to Equation 7:

[0060] Switching control voltage Vcp′ and input voltage Vin satisfy the graph of FIG. 7, since sensed input voltage Vin′ is proportional to input voltage Vin. Therefore, switching control voltage Vcp′ decreases when input voltage Vin increases, and switching control voltage Vcp′ increases when input voltage Vin decreases.

[0061] Switching control voltage Vcp′ also serves as a reference voltage for turning off switching MOS transistor Qsw. Comparator CP1 compares sense voltage Vsense, sensing the current flowing through the drain of switching MOS transistor Qsw with switching control voltage Vcp′ , varied by input voltage Vin. Comparator CP1 outputs a signal for keeping switching MOS transistor Qsw on when sense voltage Vsense is less than switching control voltage Vcp′ , and outputs a signal for turning off switching MOS transistor Qsw when sense voltage Vsense is greater than switching control voltage Vcp′. MOS transistor driver 322a drives switching MOS transistor Qsw in response to the signals output by comparator CP1.

[0062] A method for solving the problem in which the existence of propagation delay varies the peak drain current of i1P flowing through switching MOS transistor Qsw according to input voltage Vin and thereby controlling the peak drain current i1P will be described with reference to FIGS. 5a-b.

[0063] FIGS. 5a-b shows that the gradient di/dt=Vin/L1 of the current flowing through the drain of switching MOS transistor Qsw varies according to input voltage Vin. As shown in FIG. 5a, the drain current, flowing through the drain of switching MOS transistor Qsw increases with a small gradient when input voltage Vin is low. As shown in FIG. 5b, the drain current increases with large gradient when input voltage Vin is high.

[0064] When input voltage Vin is low, switching control voltage Vcp′ increases and switching control voltage Vcp′ at time t1, Vcp_t1, a reference voltage for turning off switching MOS transistor Qsw increases. Hence, comparator CP1 outputs a reference signal for turning off switching MOS transistor Qsw at time t1.

[0065] When the input voltage of Vin is high, switching control voltage Vcp′ decreases, and the switching control voltage at time t2, Vcp_t2, a reference voltage for turning off switching MOS transistor Qsw decreases. Hence, comparator CP1 outputs a reference signal for turning off switching MOS transistor Qsw at time t2.

[0066] Since the case of a large input voltage Vin and the case of a lesser input voltage Vin have the same propagation delay Δt, when the reference voltages for turning off switching MOS transistor Qsw vary to assume the values Vcp_t1 and Vcp_t2 respectively, switching MOS transistor Qsw is turned off at the same drain current i1P.

[0067] Accordingly, the time for turning off switching MOS transistor Qsw after the same is turned on is appropriately controlled by differentiating reference voltage Vcp′ for turning off switching MOS transistor Qsw according to input voltage Vin. In this case, the drain currents when switching MOS transistor Qsw is turned off are the same since propagation delay Δt is the same. That is, the variation of peak current i1P of switching MOS transistor Qsw which would be generated by the variation of input voltage Vin and the propagation delay of the SMPS is prevented by differentiating reference voltage Vcp′ for turning off switching MOS transistor Qsw according to input voltage Vin.

[0068] In summary, embodiments of the invention control the maximum power output by output unit 400 to be constant by controlling the peak current of switching MOS transistor Qsw to be constant irrespective of input voltage Vin.

[0069] While this invention has been described in connection with specific embodiments, it is understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.