Method for precompensation/write-current latching to improve error rate

[0001] 1. Field of the Invention

[0002] The present invention relates generally to devices which utilize magnetic write heads and more particularly to computer hard disk drives.

[0003] 2. Description of the Prior Art

[0004] A computer hard disk drive stores and retrieves data by positioning a magnetic read/write head over a rotating magnetic data storage disk. The head, or heads, which are typically arranged in stacks, read from or write data to concentric data tracks defined on surface of the disks which are also typically arranged in stacks. The heads are included in structures called “sliders” onto which the read/write sensors of the magnetic head are fabricated. The slider flies above the surface of the disks on a thin cushion of air, and the surface of the slider which faces the disks is called an Air Bearing Surface (ABS).

[0005] The goal in recent years is to increase the amount of data that can be stored on each hard disk and also to decrease the time involved in reading and writing data to the hard disk. It is well known in the Recording-Head industry that when a write-head starts recording data on the media, after a dormant period, it is a relatively weak writer for approximately the first 0.5 msec of writing. After that, it begins to write much better. This so-called “first-sector overwrite” problem is caused by the gradual warming up of the writer by the writing-current that passes through its coil. When the head is “cold”, the components of the head are thermally contracted, so that the spacing between the ABS and the disk is slightly increased. Since magnetic field strength decreases with the distance, this results in a decreased field strength in writing the bits being recorded, and thus more potential errors in reading the data later. As the head warms up, the resulting temperature rise gives rise to better magnetic properties in the writing head's magnetic material, as well as a physical protrusion of the writer toward the media through thermal expansion of the materials. This reduces the spacing between the writer and the media, and thus helps the data-writing process. In some severe case, this “first-sector-overwrite” problem can impede the overall magnetic performance of a hard disk drive, giving rise to increased error rates in the first few sectors where the data-writing first occurs.

[0006] To correct this problem, it has been recent industry practice to temporarily increase the write-current above the designed nominal value in the first few sectors of writing. The increased write-current will enhance the initial weak writing by giving a larger magnetomotive force to the writer's magnetic circuit. After the writer warms up, the write-current will then be scaled back to its designed nominal value. This practice has been called “write-current latching” or “kick-latching”. Here, the word “kick” in the so-called “kick-latching” is referring to the write-current overshoots used in switching from one write-current polarity to the other. The current-overshoot is intended to enhance the transition of the writing magnetic-field.

[0007] However there are problems associated with write-current-latching or kick-latching. Although it may improve the writing process during the initial sectors, it introduces another source of signal distortions which degrades the error-rate performance of the system. In today's high-data-rate disk drives, increasing the write-current can artificially change (increase or decrease) the bit spacings between neighboring data bits. With a higher current (or larger current-overshoots) being applied to these initial sectors as it is kick-latched, pattern-dependent distortions to the bits being recorded are created, through transition-shifts. This is because larger overshoots tend to spread di-bit pulses apart inadvertently, and different degrees of overshoot strength (as used in kick-latching) would then distort the bits to different degrees by this bit-spacing spreading. This distortion by large write-current is sometimes referred to as “negative nonlinear transition shift” (or “negative NLTS”), “negative” as opposed to the conventional (or positive) NLTS, in which signal-distortions are caused by neighboring bit-transitions being pulled closer together inadvertently by demagnetization field.

[0008] In short, the previous proposal of “kick-latching” by itself may not improve the overall magnetic performance of the system (as measured by error-rate), even though it can improve the overwrite property in the first sectors.

[0009] Thus, there is a need for a “precompensation latching” procedure which compensates for the signal-distortions which are introduced by kick-latching.

[0010] A preferred embodiment of the present invention is a method for writing data to a surface of a magnetic disk in a disk drive having a write head. The method includes determining a number of sector groups into which sectors of the data to be written will be grouped, loading preamplifier's write-current and overshoot (“kick”) registers with write-current values, kick-latching values, respectively, and loading the channel's precompensation-registers with precompensation values for each of said sector groups, and thus applying the write-current values, kick-latching values, and precompensation values for each of the sector, while writing data to sector groups of the recording media.

[0011] It is an advantage of the present invention that it provides improved performance during the initial period of writing, while the write head is still thermally unstable.

[0012] It is another advantage of the present invention that it decreases first-sector overwrite errors.

[0013] It is yet another advantage of the present invention that it minimizes nonlinear transition shift NLTS errors, both in the early sectors where the write-head is still warming up, and in later sectors where the write-head is already fully warmed up.

[0014] These and other features and advantages of the present invention will no doubt become apparent to those skilled in the art upon reading the following detailed description which makes reference to the several figures of the drawing.

[0028] A magnetic disk drive 2 is shown generally in FIG. 1, having one or more magnetic data storage disks 4, with data tracks 6 which are written and read by a data read/write device 8. The data read/write device 8 includes an actuator arm 10, and a suspension 12 which supports one or more magnetic heads 14 included in one or more sliders 16.

[0029] FIG. 2 shows a slider 16 in more detail being supported by suspension 12. The magnetic head 14 is shown in dashed lines, and in more detail in FIGS. 3 and 4. The magnetic head 14 includes a coil 18 and P1 pole, which in some designs also acts as S2 shield, thus making P1/S2 20. The second pole P2 22 is separated from P1/S2 by write gap 23. The P1/S2 20, second pole P2 22 and write gap 23 can be considered together to be included in the write head 25. In a configuration of read head where Current is Perpendicular to the Plane (CPP), Shield S1 30 and P1/S2 20 act as electrodes supplying current to the read sensor 34 which lies between them. An insulation layer 32 also separates the S1 30 and P1/S2 20 electrodes in the area behind the read sensor 34, so that they do not short out along their length. The magnetic head 14 flies on an air cushion between the surface of the disk 4 and the air bearing surface (ABS) 24 of the slider 16 As discussed above, it is well known in the Recording Head industry that when a write head starts recording data on the media, after a dormant period, it is a relatively weak writer for approximately the first 0.5 msec of writing. After that, it begins to write much better. This so-called “first-sector overwrite” problem is caused by the gradual warming up of the writer by the writing-current that passes through its coil. When the head is “cold”, the components of the head are thermally contracted, so that the spacing between the ABS and the disk is slightly increased. This is shown generally in FIG. 5, where the distance D1 between the write head 25 and the surface of the disk 4 is shown to be increased when the write head 25 is cold compared to the decreased distance D2, when the write head 25 is warmed up as in FIG. 6. Since magnetic field strength decreases with increasing magnetic spacing, this results in a decreased field strength in the bits written, and thus more potential errors in reading the data later. As the head warms up, the resulting temperature rise gives rise to better magnetic properties in the writing head's magnetic material, as well as a physical protrusion of the writer toward the media through thermal expansion of the materials. This reduces the spacing between the writer 25 and the media 4, and thus helps the data-writing process, as shown in FIG. 6. In some severe case, this “first-sector-overwrite” problem can impede the overall magnetic performance of a hard disk drive, giving rise to increased error rates in the first few sectors where the data-writing first occurs.

[0030] To correct this problem, it has been recent industry practice to temporarily increase the write-current above the designed nominal value in the first few sectors of writing. The increased write-current will enhance the initial weak writing by giving a larger magnetomotive force to the writer's magnetic circuit. After the writer warms up, the write-current will then be scaled back to its designed nominal value. This practice has been called “write-current latching” or “kick-latching”.

[0031] However, as discussed above, there are problems associated with kick-latching. There are effects in which the spacing of the bits are affected resulting in a physical displacement of the bits farther apart or closer together. This phenomenon is referred to as “nonlinear transition shift” or “NLTS”, which can occur in two varieties. In conventional NLTS, which is not particularly associated with kick-latching, as shown in FIG. 7, the di-bit (two successively written transitions) tend to shift closer than intended, thus inadvertently decreasing the bit cell length (time between transitions). In this FIG. 7, recording media 4 is shown under parts of the P1 20 and P2 22 poles of a write head 25. A previously written transition 36 is shown, with the intended new transition location 38, thus producing a normal bit cell 42. However, due to the demagnetization-field from the previous transition 36, the actual new transition location 40 is closer to the previously written transition 36 than intended, producing a shortened bit cell 44.

[0032] In more recent high data rate disk drives, the bit cell length (time between transitions) is comparable to the time constant of the rise and fall times of the write-current. As a result, larger overshoot tends to spread di bit pulses (two successively written transitions) apart. The more the overshoot, the more the di bit is inadvertently shifted further apart from their intended separation. These produce a delayed transition location 46 and thus a lengthened bit cell 48, as shown also in FIG. 7.

[0033] Thus we may speak of two types of NLTS, 1) Conventional or positive NLTS, which is caused by the demagnetization-field of neighboring bits and which needs “positive” precompensation to correct the pulse positions; i.e. the precompensation intentionally delays the second pulse to make up for the NLTS effects, and 2) “Negative” NLTS, which is caused by large write-current overshoot, and which needs “negative” precompensation to correct the pulse positions; i.e. the precompensation tries to move the second pulse forward in timing.

[0034] In short, the previous practice of “kick-latching” by itself may not improve the overall magnetic performance of the system as measured by error-rate, due to the varying degree of negative-NLTS introduced by the overshoots changing with sector-counts, even though it can improve the overwrite property in the first sectors.

[0035] To address the deficiency of the kick-latching procedure, the present invention augments it with a precompensation-latching (“precomp-latching” for short) procedure. In such a scheme, we allow the precompensation, which addresses the problem of nonlinear transition shift, to have special values in the first sectors of writing, which are different from the designed nominal values. The special precomp-latching values are tailored to the special (most likely higher than normal) write-current values used by the write-current-latching or kick-latching schemes in the first sectors of recording.

[0036] In the first sectors of recording, when the writer is still being warmed up and has challenges in writing data, kick-latching will increase the write-current to enhance its writing ability. Simultaneously, the special precompensation-setting of the precomp-latching scheme pre-compensates for the nonlinear bit shift caused by the special (extra) write-current of the kick-latch. In later stages, after approximately 0.5 to 1 msec, when the writer is fully warmed up and has no difficulty in recording data, the write-current, in accordance with the kick-latch scheme, will drop back to the nominal value; simultaneously, the precomp-latch scheme will change the pre-compensation values to the nominal state.

[0037] In this manner, not only the writing process is enhanced by the kick-latching, but the actual magnetic performance, as measured by error rate, will be improved because the problems of additional and varying negative-NLTS is being taken care of by precomp-latching.

[0038] To make clear the comparison between the conventional kick-latching and the precomp-latching of the present invention, FIGS. 8-9 illustrate the conventional procedure, and FIGS. 10-11 discuss the novel precomp-latching procedure.

[0039] In the Conventional Data Writing Procedure of FIG. 8 (prior art), the Write-current=I₀, and Kick-setting current=k₀ are loaded to the preamplifier registers 70, and all data in all sectors is written with the same write-current and kick-settings 72. This typically leads to two results, having different types of errors. 1) With large write-current and kick-settings, early sectors' overwrite is good, but later sectors' writing may be too strong, degrading other performance parameters such as excessive adjacent track interference, and excessive erase band 74. (2) With small write-current and kick-settings, later sectors' overwrite is good, but early sectors' writing may be too weak, degrading the error rate 76.

[0040] An improvement to this conventional procedure is shown in FIG. 9 (prior art). In this Previously Proposed Write-Current/Kick-Latching Data Writing Procedure, preamplifier registers are loaded with the following values:
Write-current=I₀, Kick-setting=k₀, for first N₀ sectors after write-start,
Write-current=I₁, Kick-setting=k₁, for next N₁ sectors,
Write-current=I₂, Kick-setting=k₂, for yet later sectors.
Normally, because of the aforementioned “first-sector overwrite” problem, (I₀, k₀) setting is stronger than (I₁, k₁), and so on 80.

[0041] Using this modified procedure, data is written with the appropriate write-current and kick-settings in accordance to the sector order as prescribed 82. With properly characterized settings, a stronger (I₀, k₀) setting will compensate for the early sector writing difficulties, and the writing strength can be optimized for all sectors. However, different write currents and kicks may cause different additional degree of nonlinear-transition-shift (NLTS). So although the overwrite parameter may be improved and optimized, the error rate performance may not be optimized for all sectors 84.

[0042] The present Precompensation-Latching Data-Writing Procedure is discussed in FIGS. 10-11. In this method of the present invention, the preamplifier-registers and channel-registers are loaded with following values:
Preamplifier: write-current=I₀, Kick-setting=k₀, and channel: precompensation=p₀, for first N₀ sectors after write start,
Preamplifier: write-current=I₁, Kick-setting=k₁, and channel: precompensation=p₁, for next N₁ sectors,
Preamplifier: write-current=I₂, Kick-setting=k₂, and channel: precompensation=p₂, for yet later sectors 100.

[0043] Normally, (I₀, k₀) setting is stronger than (I₁, k₁), and so on.

[0044] Using this modified procedure, data is written with the appropriate write-current and kick-settings in accordance to the sector order as prescribed 102. With properly characterized settings, a stronger (I₀, k₀) setting will compensate for the early-sector writing difficulties, and thus the writing strength can be optimized for all sectors. As for the different additional levels of nonlinear transition shift introduced by the different (I, k) settings, they are pre compensated by the different precompensation settings (p₀, p₁, p₂), which is latched into operation in sync with the (I, k)-latches 104, thereby correcting for the NLTS problems encountered by the previous methods.

[0045] Discussing this in a slightly different manner in FIG. 11, the Precompensation-Latching Data-Writing Procedure, current operation requires writing data on, for example, 100 sectors 106. (I₀, k₀, p₀) settings are latched in for the first No sectors 108. The first No sectors are written with (I₀, k₀, p₀) settings 110.

[0046] Next for the following N₁ sectors, (I₁, k₁, p₁) settings are latched in 112. Now that the writer has warmed up slightly, the next N₁ sectors are written with (I₁, k₁, p₁) settings 114.

[0047] Then for the remaining of the 100 example sectors the (I₂, k₂, p₂) settings are latched in 116. The writer has already warmed up, the rest of sectors are written with (I₂, k₂, p₂) settings 118.

[0048] In most cases, it is likely that the initial (I₀, k₀) setting will provide stronger magnetomotive force to the writer, which has not been warmed up. (I₁, k₁) and (I₂, k₂) are likely to be successively more moderate in strength, for the writer is gradually getting warmer. The precompensation setting (p₀, p₁, p₂) will respectively provide the suitable timing precompensations to adjust for the artifacts in transition-location-shift, caused by the different (I, k) settings.

[0049] To summarize the differences between the prior art and the present invention in another way, FIGS. 12-14 show flow charts of three compensation schemes of the prior art, and FIG. 15 shows the precompensation method of the present invention.

[0050] In FIG. 12, the most basic method 200 is shown. First, a write seek to Logical-Block-Address (or “LBA”, for short) 202 is performed. An LBA is a logical index by which the disk-drive can map to a physical head and a physical data-storage location in the drive, ie., the cylinder and the sector. In other words, it is the address of the physical whereabouts of the stored data. Precompensation values are set 204, and the write current Iw is set 206. Finally write operation to the data locations is performed 210.

[0051] In FIG. 13 a slightly more sophisticated method 250 is shown. Again, a write seek to LBA 202 is performed. Precompensation values are set 204, and the write current Iw is set 206. Then, as a new step, the Kick current is set 208. Finally write operation to the data locations is performed 210.

[0052] In FIG. 14 a yet more sophisticated method 260 is shown. Again, a write seek to LBA 202 is performed. Precompensation values are set 204, write current Iw is set 206 and Kick current is set 208. Write operation to the data locations is performed 210, but when it is finished, a sector count criteria decision is made 212. Depending on the sector count, an adjustment to the write current Iw 216 is made, an adjustment to the Kick current 218 is made, or the write operation is completed 214.

[0053] FIG. 15 shows the method of the present invention 300. Again, a write seek to LBA 302 is performed. Precompensation values are set 304, write current Iw is set 306 and Kick current is set 308. Write operation to the data locations is performed 310, but when it is finished, again a sector count criteria decision is made 312. Depending on the sector count, an adjustment to the write current Iw 316 is made, an adjustment to the Kick current 318 is made, or the write operation is completed 314, but in addition, the precompensation values may be adjusted 320. This adjustment to the precompensation values allows for greater accuracy and control in data writing, as discussed above.

[0054] It should be noted that in the previous discussions, it has been assumed that the sectors will be divided into three groups, i.e. 0, 1 and 2. However, this is not to be considered to be a limitation, and it will be obvious to one skilled in the art that the sectors could be divided into 4, 5, or more groups with a precompensation factor for each, so that there may be p₀ . . . p_N factors to be used for N_N sectors. Since the write head is expected to have warmed up after the initial sectors, the write-current and the overshoot (“kick”) will be reduced for the remainder of the sectors which fall into the category N_N, and the p_N value will likely return to either zero, or a positive value, the latter of which will be more suited for correcting the “conventional NLTS” which arises only from neighboring-bit's demagnetization-field, and not from the write-current-overshoots. This is expected to happen somewhere in the time frame of 0.5 to 1 msec. This is not to be construed as a limitation however.

[0055] It is also to be noted that in order to correct both positive and negative NLTS, it is possible that precompensation values may be positive as well as negative values in transition-timing shifts.

[0056] The implementation of this invention can be done in either software or hardware. A hardware implementation could be done in either the channel or the HDC (or “hard disk controller”). The write kick latching is currently done with hardware in the HDC. The implementation would work much the same way in either hardware or software. An example of a purely software implementation would require memory to store the data that tells the drive when to change the precomp value, and what to change it to. The code looks up these values from a table that allows this feature to be customized by head, zone, temperature, or any other relevant parameter. It waits until it is time to change the precomp value, and then update the hardware register.

As an example, relevant parameters:
precomp_—0=precomp value for step 0
precomp_—1=precomp value for step 1
precomp_n=precomp value for step n
count_—0=number of sectors to write for step 0
count_—1=number of sectors to write for step 1
count_n=number of sectors to write for step n

[0057] Normally, (I₀, k₀) setting is stronger than (I₁, k₁), and so on.

Code for updating precomp:

[0058] Change precomp to precomp_—0

[0059] Wait until number of sectors written >count_—0.

[0060] Change precomp to precomp_—1

[0061] Wait until number of sectors written>count_—1

[0062] . . .

[0063] Change precomp to precomp_n

[0064] Wait until number of sectors written>count_n

[0065] It is to be understood that this example is one of many implementations that could be used and is not intended as a limitation.

[0066] While the present invention has been shown and described with regard to certain preferred embodiments, it is to be understood that modifications in form and detail will no doubt be developed by those skilled in the art upon reviewing this disclosure. It is therefore intended that the following claims cover all such alterations and modifications that nevertheless include the true spirit and scope of the inventive features of the present invention.