Voltage regulated charge pump with regulated charge current into the flying capacitor

[0001] 1. Field of the Invention

[0002] The invention relates to charge pump circuits with a flying capacitor, and more particularly to the use of a flying capacitor which is charged as a function of the output voltage error.

[0003] 2. Description of the Related Art

[0004] Portable electronic devices such as cellular phones, personal digital assistants, portable MP3 player and laptops are invariably powered by batteries which may be rechargeable or non-rechargeable. All of these batteries lose their charge over time, and therefore do not produce a single constant voltage output. One device for providing a regulated voltage supply independent of the battery output voltage is a charge pump. Charge pumps are DC-to-DC converters which utilize capacitors instead of inductors or transformers for energy storage. Such charge pumps typically make use of a “flying capacitor” which is charged from the battery during one cycle and pumped up, thereby raising its output voltage, during another cycle. The charge stored during the charging cycle is then transferred into a storage capacitor during the pump cycle.

[0005] Related art regulated charge pumps charge the flying capacitor up to the input voltage producing excessive overshoot and ripple at the output terminal of the charge pump circuit. These regulated charge pumps regulate the output voltage by changing the switching frequency. A big output capacitor is therefore required to reduce the overshoot and ripple of the output voltage because the entire excess charge of the flying capacitor will be transferred to the output capacitor in each switching period. The excess is the charge which causes the voltage of the flying capacitor to be higher than the output voltage minus the input voltage.

[0006] Related Art U.S. Patents are described next:

• [0007] U.S. Pat. No. 6,801,078 (Allum) discloses a voltage multiplier circuit for programmable memories. It further utilizes a voltage feedback regulator which provides a digital gating signal to a multiplexer.
• [0008] U.S. Pat. No. 6,794,927 (Bedarida et al.) teaches the use of a regulated supply voltage with a modular arrangement of charge pumps. The desired output voltages are obtained by using combinatorial clock signals for charge pump stages.
• [0009] U.S. Pat. No. 6,794,926 (Rader et al.) shows a charge pump comprising an input circuit, a switching circuit and a control circuit which receives its inputs from the switching circuit and input circuit, and controls the switching circuit. The switches of the switching circuit are selectively actuated to charge and discharge capacitors to provide a regulated output voltage.
• [0010] U.S. Pat. No. 6,774,710 (Li) describes a high precision charge pump circuit which compares the output feedback voltage with a reference voltage. In response to the comparison the clock frequency is either increased or decreased.
• [0011] U.S. Pat. No. 6,756,838 (Wu et al.) presents a charge pump voltage regulator involving a load current and a clamp current. The two currents are compared and the charge pump current is then adjusted by stepping the frequency of the clock driving the charge pump.
• [0012] U.S. Pat. No. 6,618,296 (Zhang) discloses a charge pump circuit for controlling the charging current via current limiting devices in a dual phase charge pump circuit. Supply current peaks that occur when the flying capacitor is charged are limited, thus reducing the noise on the supply.

[0013] It should be noted that none of the above-cited examples of the related art provide a current into the flying capacitor which is a function of the output voltage error, where the output voltage error is the desired (nominal) output voltage minus the actual output voltage. In addition the present invention utilizes a fixed frequency, in the first embodiment, or a very low frequency, in the second embodiment, and avoids frequencies ranging from audio frequencies to Megahertz frequencies. The present invention also limits the current to the output terminal to avoid short circuits. Additionally, the present invention provides currents of 100 mA at the output terminal using an external capacitor.

[0014] It is an object of at least one embodiment of the present invention to provide a method and a circuit which offers a voltage regulated charge pump and a regulated charge current.

[0015] It is another object of the present invention to reduce the voltage overshoot and ripple at the output of the charge pump.

[0016] It is yet another object of the present invention to control the amount of charge received by the flying capacitor.

[0017] It is still another object of the present invention to prevent a voltage overshoot at the output terminal of the pump circuit.

[0018] It is a further object of the present invention to provide full short-circuit protection for the output terminal

[0019] It is yet a further object of the present invention to eliminate charging of the flying capacitor to the supply voltage if not necessary, i.e., when the actual output voltage is equal to the desired (nominal) output voltage.

[0020] It is still a further object of the present invention to reduce the size of the output capacitor over the related art.

[0021] These and many other objects have been achieved by making the current into the flying capacitor a function of the output voltage error i.e., the current into the flying capacitor is not fixed but variable. This is achieved by an operational transconductance amplifier (OTA) which converts the output voltage error into a corresponding current which controls the current to the flying capacitor. The voltage overshoot and ripple are reduced by not charging the flying capacitor to the input voltage (V_DD) when not necessary, that is when the actual output voltage is equal to the desired (nominal) output voltage. In one embodiment of the invention, overshoot can be further reduced by pulse skipping that is inhibiting the clock and thereby the charging of the flying capacitor. During charging of the flying capacitor the current is limited by current mirrors which are coupled between the OTA output and the flying capacitor. In another embodiment of the invention, full short-circuit protection can be provided by current limiting the driver stage of the charge pump circuit. When there is an output voltage overshoot, that is when the actual output voltage is too high, pumping of the flying capacitor means is also inhibited by a stop circuit, which receives one of its inputs from the OTA output, and which stops the charge pump circuit from pumping the flying capacitor. The charge pump runs at a constant frequency except at very low output loads (if the pulse skipping feature is implemented). At very low loads the output voltage error is negative because the actual output voltage is higher than the desired (nominal) output voltage. This results in a negative OTA output current, (i.e., the current flowing into the output of the OTA) which triggers the stop circuit. The present invention allows a reduction of the size of the output capacitor because it avoids the transfer in each period of excess charges from the flying capacitor to the output capacitor as just detailed.

[0022] These and many other objects and advantages of the present invention will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of the preferred embodiments.

Use of the same reference number in different FIGS. indicates similar or like elements.

[0026] With reference to FIG. 1, we now describe the major characteristics of the preferred embodiment of the present invention and resulting benefits:

• • [0027] The charge pump runs at a constant frequency, except at very low loads if pulse skipping is implemented as another preferred embodiment. This will be further discussed below.
  • [0028] Because the flying capacitor is not charged to the input voltage if not necessary, the overshoot and ripple are lower.
  • [0029] Overshoot and ripple are further reduced by pulse skipping (in which case the frequency will no longer be constant).
  • [0030] During charging of the flying capacitor the current is limited, thereby providing short-circuit protection for the output and minimizing current pulses on the voltage supply.
  • [0031] Additionally, a current source for the discharging of the flying capacitor can be implemented for full short-circuit protection by limiting the current through transistor P5.

[0032] Still referring to FIG. 1, we now provide a detailed description of the voltage regulated charge pump 10 of the present invention. A voltage divider, shown here by way of example as comprising resistive means R1 and R2 in series, is coupled between output terminal OUT and the negative voltage rail of the charge pump circuit. A tap V_FB provides a feedback voltage proportional to the output voltage V_out at output terminal OUT.

[0033] The minus input of the operational transconductance amplifier (OTA) is coupled to tap V_FB and the plus input is coupled to a reference voltage (V_reference). V_reference typically comes from a bandgap reference circuit and is about 1.25V, but can be any other stable voltage. The OTA converts the difference between the voltages applied to the minus and plus inputs to a proportional charge current, where the difference between the voltages applied to the minus and plus inputs represents the difference between the desired output voltage (nominal voltage) and the actual output voltage at the output terminal OUT, respectively, of the charge pump circuit 10.

[0034] Two serially coupled current mirrors provide a mirrored current of the charge current. The input of the first current mirror (NMOS transistors N2, N3) is coupled to the output of the OTA and the output of the second current mirror (PMOS transistors P2, P3) is coupled via diode D1 to the first (or top) plate of flying capacitor C_FLY. Current mirrors are shown here by way of example, however other circuits such as a current amplifier can be used equally well. The output current of the second current mirror is fed into the flying capacitor during the charging phase.

[0035] A stop circuit comprises a current bias means I_Bias in series with NMOS transistor N4 and is coupled between the positive voltage rail and the output of the OTA (please refer to FIG. 1). The stop circuit provides a stop signal STOP (read “STOP bar” i.e., the stop signal is active when negative). When the actual output voltage is larger than the desired voltage, that is when the output voltage is too high, the output current of the OTA goes negative and turns on NMOS transistor N4. This causes the drain of N4 to go negative, thereby issuing the stop signal. In the illustrative example of the stop circuit the control gate of N4 is coupled to a signal comprising the sum of a transistor threshold and transistor saturation voltage (V_th+V_sat) of transistor N4 at the drain current I_Bias.

[0036] Charge pump 12, comprising clocking means and a drive circuit, is coupled to a clock input CLOCK and the stop signal STOP. Charge pump 12 provides at its output terminal J a stepped waveform cycling between the voltage of the positive and negative voltage rail. The clocking means further comprises a Flip-Flop FF1 and a logic NAND gate G1, where the C input is coupled to clock input CLOCK, where the Clr input is coupled to the stop signal STOP, where the D input is tied to a logical “1”, and an output Q which alternates its state with every clock input. The stop signal freezes the output of Flip-Flop FF1 to “low”. The first input of logic NAND gate G1 is coupled to output Q and the second input is coupled to the clock input CLOCK. Flip-Flop FF1 and NAND gate G1 make sure that the clock restarts at an edge of the clock input CLOCK to avoid glitches.

[0037] The drive circuit comprises a CMOS driver with NMOS transistor N5 and PMOS transistor P5. In another preferred embodiment of the present invention a current limiting circuit, typically in the form of a current source CS, is coupled serially between the positive rail V_DD and transistor P5 for full circuit protection. Junction J between N5 and P5 serves as the output terminal of the drive circuit.

[0038] The second (or bottom) plate of flying capacitor C_FLY is coupled to the output terminal of the charge pump, where the second plate gets pumped when the voltage of the stepped waveform at junction J jumps to near the level of the positive voltage rail, thereby raising the potential of the charge at said first plate. When the voltage at junction J falls to near the level of the negative voltage rail, flying capacitor C_FLY can be charged by the current mirrors.

[0039] Output capacitive means C_out is coupled between output terminal OUT and the negative voltage rail. The plate of C_out coupled to output terminal OUT is also coupled to the first plate of C_FLY via a second diode D2. C_out stores the charges received from C_FLY when C_FLY is pumped. C_out supplies the output voltage V_out (actual output voltage) at output terminal OUT and further reduces ripples.

[0040] We now direct our attention to FIG. 2 which in circuit 20 shows in greater detail the OTA circuit and the stop circuit. V_reference and V_FB are the inputs to differential PMOS transistor pair P0 and P1, respectively. Their sources are coupled via current mirror PMOS transistors P10, P11 to V_DD. Current source transistor P10 receives its current from current reference I_Bias. P0 is coupled via a resistive means RL to current source transistor N0. P1 is coupled to current source transistor N1. NMOS transistor N4 is coupled between PMOS current source P12 and NMOS current source N2. The gate of N4 is coupled to the junction of P0 and RL. The value of RL is chosen so that at the gate of N4 is a voltage V_th+V_sat above ground. Elements previously discussed are indicated by like numerals and need not be described further.

[0041] Referring now to FIG. 3, we discuss the method of the invention of regulating the voltage of a charge pump:

• [0042] Block 1 describes providing a charge pump with constant frequency pulsing;
• [0043] Block 2 describes charging the flying capacitor with a current proportional to the output voltage error;
• [0044] Block 3 describes limiting the current during charging through current mirror means to provide short-circuit protection;
• [0045] Block 4 describes pulse skipping of said flying capacitor when the output voltage is too high.

[0046] While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.