VCO with switchable varactor for low KVCO variation

[0001] Not Applicable.

[0002] Certain embodiments of the invention relate to analog circuit design. More specifically, certain embodiments of the invention relate to a method and system for a voltage controlled oscillator (VCO) with switchable varactor for low KVCO variation.

[0003] A circuit that generates a signal for which an oscillating frequency of the signal is proportional to an applied voltage may be known as a voltage controlled oscillator (VCO). A device for which the capacitance value varies based on an applied voltage may be known as a variable reactance, or varactor. The oscillating frequency of a VCO may be controlled by utilizing a varactor. The value of KVCO may control the amount by which the oscillating frequency of a time varying signal generated by a VCO may change based on a change in the voltage level of a control signal. In operation, the value of KVCO in a VCO may vary widely due to a plurality of factors. A change in KVCO may change the rate at which the oscillating frequency of the VCO may change due to changes in the control voltage. One or more of these factors may also result in changes in the oscillating frequency of the time varying signal generated by the VCO independent from changes in the control voltage. In addition, an amplitude of the time varying signal may change due to one or more of these factors. Some conventional VCO designs may not be able to adapt the VCO circuitry to compensate for this plurality of factors such to stabilize values of KVCO, the oscillating frequency of the VCO for a given control voltage level, and the amplitude of the time varying signal generated by the VCO.

[0004] Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

[0005] A system and/or method is provided for a VCO with switchable varactors for low KVCO variation, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

[0006] These and other advantages, aspects and novel features of the present invention, as well as details of an illustrated embodiment thereof, will be more fully understood from the following description and drawings.

[0018] Certain embodiments of the invention may be found in a method and system for VCO with switchable varactor for low KVCO variation. FIG. 1 is a block diagram of an exemplary phase locked loop (PLL) circuit, in accordance with an embodiment of the invention. Referring to FIG. 1 there is shown a phase detector block 102, a charge pump block 104, a resistor 106, a plurality of capacitors 108 and 110, a voltage controlled oscillator (VCO) 112, a VCO control block 114, and a divide by N (+N) block 116. Also shown in FIG. 1 are a reference signal (Ref), a control voltage signal (V_cntl), a varactor control code, and time varying signals output positive (O_P), and output negative (O_N). The resistor 106, and plurality of capacitors 108 and 110, may be components in a loop filter. The loop filter may be characterized by an impedance that varies as a function of frequency, Z_loop(s), where the variable s may represent the frequency of a signal applied to the loop filter.

[0019] In operation, a PLL may receive a reference signal, Ref, that is an input to a phase detector 102. The phase detector 102 may compare the reference signal ref to the time varying signals that may be output from the VCO 112, O_P and O_N. The phase detector 102 may output a signal based on the phase difference between the reference signal, Ref, and the time varying signals, O_P and O_N. Prior to comparison at the phase detector block 102, the time varying signals, O_P and O_N, may be processed by the divide by N block 116. The output from the phase detector may be received by the charge pump block 104, which may generate a current, i(s). The average direct current (DC) component of the current i(s) may be proportional to the phase difference between the reference signal, Ref, and the signal generated by the processing of the time varying signals O_P and O_N by the divide by N block 116. The current generated by the charge pump block 104, i(s), may be applied to the loop filter to produce a control voltage V_cntl:
V_cntl=Z_loop(s)i(s)  equation [1]

[0020] The control voltage signal, V_cntl, may be input to the VCO 112. The VCO 112 may generate the time varying signals, O_P and O_N, based on the control voltage signal, V_cntl, and the varactor control code. The varactor control code may be generated by the VCO control block 114. The VCO control block 114 may utilize machine readable storage having stored thereon, a computer program having at least one code section that is executable by a machine, which causes the machine to generate a varactor control code. The varactor control code may comprise a plurality of binary bits.

[0021] FIG. 2 is a chart illustrating exemplary oscillating frequency versus control voltage, in accordance with an embodiment of the invention. With reference to FIG. 2, there is shown a plurality of graphs 202, 204, 206, 208, 210, 212, 214, and 216. Each of the plurality of graphs 202, 204, 206, 208, 210, 212, 214, and 216 may represent a series of measurements of the oscillating frequency, F_VCO, of a time varying signal, such as, for example, O_P or O_N, that is output from a VCO 112 based on a control voltage V_cntl. The variable KVCO may be defined as the change in F_VCO based on a change in V_cntl:

[0022] $\begin{array}{cc}\mathrm{KVCO}=\frac{d{F}_{\mathrm{VCO}}}{d{V}_{\mathrm{cntl}}}& \mathrm{equation}\left[2\right]\end{array}$
where KVCO may be represented in FIG. 2 based on the slopes of the graphs 202, 204, 206, 208, 210, 212, 214, and 216.

[0023] In operation, the value of KVCO may vary from a nominal value, KVCO_nominal, by 50% to 200%:
0.5 KVCO_nominal≦KVCO≦2 KVCO_nominal  equation [3]
A change in KVCO may represent a rate at which the oscillator frequency of the VCO, F_VCO, may change based on a change in the control voltage V_cntl.

[0024] The value of KVCO may change based on a plurality of factors. For example, the value of KVCO may change based on the amplitude of the time varying signals, O_P and O_N, such that for large amplitudes of the time varying signals, the value of KVCO may be smaller. In this regard, factors that cause a change in the amplitude of the time varying signals, O_P and O_N, may induce a corresponding change in the value of KVCO.

[0025] Various embodiments of the invention may control factors that cause a change in the amplitude of the time varying frequency signals, O_P and O_N. Other aspects of the invention may control factors that may cause a change in the oscillating frequency the signals O_P and O_N, which may be generated by the voltage controlled oscillator (VCO).

[0026] FIG. 3 is a block diagram of an exemplary system for VCO with switchable varactor for low KVCO variation, in accordance with an embodiment of the invention. With reference to FIG. 3, there is shown a first bank of varactors 302, a second bank of varactors 304, a plurality of switches 306 . . . 308, a plurality of inductors 310 and 312, a plurality of load capacitors 314 and 316, a current source circuit 318, and a positive feedback circuit 320. Also shown in FIG. 3 is a bias current input signal, I_bias, the time varying signals, O_P and O_N, a control voltage V_cntl, a supply voltage V_dd, and a ground reference voltage gnd. The ground reference voltage may also be referred to as a ground reference, or ground.

[0027] The first bank of varactors 302 and the second bank of varactors 304 may each comprise a plurality of varactors. Each varactor in the first bank of varactors 302 may be coupled to a corresponding varactor in the second bank of varactors 304, such that, for example, the first varactor in the first bank of varactors 302 may be coupled to the first varactor in the second bank of varactors 304, and so forth. Each coupled pair of varactors in the first bank of varactors 302 and the second bank of varactors 304 may be coupled to a switch from the plurality of switches 306 . . . 308. Each switch from the plurality of switches 306 . . . 308 may be coupled to a control voltage V_cntl, a supply voltage V_dd, and a ground reference voltage gnd.

[0028] Each varactor in the first bank of varactors 302 may be coupled to an inductor 310, to a load capacitor 314, and to a terminal of a positive feedback circuit 320. Each varactor in the second bank of varactors 304 may be coupled to an inductor 312, to a load capacitor 316, and to a different terminal of a positive feedback circuit 320 from the terminal on the positive feedback circuit 320 to which the first bank of varactors may be coupled. The load capacitors 314 and 316 may be coupled to the ground reference voltage gnd. Each of the inductors 310 and 312 may be coupled to a current source circuit 318. The current source circuit 318 may be coupled to a bias current input signal, I_bias, and to the supply voltage V_dd.

[0029] FIG. 4 is a diagram of an exemplary bank of varactors, which may be utilized in connection with an embodiment of the invention. With reference to FIG. 4, there is shown a bank of varactors 402. The bank of varactors 402 may comprise a plurality of varactors 404 . . . 406. Various embodiments of the invention may implement a varactor in the plurality of varactors 404 . . . 406 utilizing a variety of devices. A varactor in the plurality of varactors 402 may, for example, be implemented utilizing a diode. Alternatively, a varactor in the plurality of varactors 402 may be implemented utilizing a metal oxide semiconductor field effect device (MOSFET).

[0030] FIG. 5a is a diagram of an exemplary switch implemented as a plurality of single pole switches, which may be utilized in connection with an embodiment of the invention. With reference to FIG. 5a, there is shown a switch 502. The switch 502 may comprise a plurality of single pole switches 504, 506, 508, and 510. Individually, each of the single pole switches 504, 506, 508, and 510 may couple a single input to a single output. A single pole switch 504 may be coupled to each of the single pole switches 506, 508, and 510. When the plurality of single pole switches 504, 506, 508, and 510 are coupled as shown in FIG. 5a, the switch 502 may couple a single input to one of a plurality of outputs, or the switch 502 may couple a single output to one of a plurality of inputs.

[0031] FIG. 5b is a diagram of an exemplary switch implemented as a multi-pole switch, which may be utilized in connection with an embodiment of the invention. With reference to FIG. 5b, there is shown a switch 512. The switch 512 may comprise a multi-pole pole switch 514. The multi-pole switch 514 may couple a single input to one of a plurality of outputs, or the multi-pole switch 514 may couple a single output to one of a plurality of inputs. Various embodiments of the invention may utilize a switch that comprises aspects of 502 or 512.

[0032] FIG. 6 is an exemplary current source circuit design, which may be utilized in connection with an embodiment of the invention. With reference to FIG. 6, there is shown a current source circuit 602. The current source circuit 602 may comprise p-channel MOSFETs 604, and 606. Also shown in FIG. 6, is a bias current input signal, I_bias. A MOSFET may also be referred to as an FET, or transistor.

[0033] In operation, a bias current input signal, I_bias, may be supplied to the drain terminal, or drain, of the transistor 604. Associated with the bias current input signal, I_bias, is a bias voltage, V_bias, which may be applied to the gate terminal, or gate, of the transistor 604. The difference between the voltage applied between the gate of a transistor, and the voltage applied to the source terminal, of the source, of the same transistor, may be referred to as the gate to source voltage, v_gs. The drain current of a transistor, i_d, such as, for example transistor 604, may be proportional to the gate to source voltage, v_gs.

[0034] The current source circuit 602 may be referred to as a current mirror in that the value of the gate to source voltage v_gs that is applied to transistor 604 may also equal the value of v_gs that is applied to transistor 606. Therefore, a percentage change in the current i_d for transistor 604 may produce a comparable percentage change in the current i_d for transistor 606. The actual value of the change in i_d for transistor 604 may not equal the actual value of the change i_d in for transistor 606. One reason may be that the value of the transconductance g_m for transistor 604 may not equal the value of the transconductance g_m for transistor 606.

[0035] FIG. 7 is an exemplary positive feedback circuit design, which may be utilized in connection with an embodiment of the invention. With reference to FIG. 7, there is shown a positive feedback circuit 712. The positive feedback circuit 712 may comprise n-channel transistors 714, and 716.

[0036] In operation, a voltage at the drain of transistor 714 may be applied to the gate of transistor 716. A voltage at the drain of transistor 716 may be applied to the gate of transistor 714. The voltage at the source of transistor 714 may be equal to the voltage at the source of transistor 716. The impedance coupled to the drain of transistor 714 may be referred to as Z₇₁₄(s), where the impedance Z₇₁₄(s) may vary based on the oscillating frequency, s, of the signal applied at the drain of transistor 714. The impedance coupled to the drain of transistor 716 may be referred to as the impedance Z₇₁₆(s), where Z₇₁₆(s) may vary based on the oscillating frequency, s, of the signal applied at the drain of transistor 716.

[0037] The positive feedback in the positive feedback circuit 712 may result in a decrease of the voltage at the drain of a transistor, such as, for example, transistor 714, leading to a further decrease in the same voltage based on the feedback in the positive feedback circuit 712. Conversely, an increase in the voltage at the drain of a transistor may lead to a further increase in the same voltage based on the feedback mechanism in the positive feedback circuit 712.

[0038] FIG. 8 is an exemplary circuit design for a VCO with switchable varactor for low KVCO variation, in accordance with an embodiment of the invention. With reference to FIG. 8, there are shown p-channel transistors 802 and 804, inductors 806 and 808, n-channel transistors 810 and 812, load capacitors 814 and 816, a plurality of varactors 818 . . . 820, and 822 . . . 824, and a plurality of switches 826 . . . 828. The plurality of varactors 818 . . . 820 may comprise a first bank of varactors, and the plurality of varactors 822 . . . 824 may comprise a second bank of varactors. The transistors 802 and 804 may be components in a current source circuit 602. The transistors 810 and 812 may be components in a positive feedback circuit 712. Also shown in FIG. 8 is a bias current input signal, I_bias, the time varying signals, O_P and O_N, a control voltage V_cntl, a supply voltage V_dd, and a ground reference voltage gnd.

[0039] A varactor in the plurality of varactors 818 . . . 820, and 822 . . . 824 may be implemented as an n-channel MOSFET, or NMOS transistor, for which the drain is coupled to the source. The capacitance of a varactor, C_var, in the plurality 818 . . . 820 may be based on the difference in the voltage level of the time varying signal, O_P, applied to the gate of a varactor in the plurality 818 . . . 820, and the voltage level coupled to the drain and source of the same varactor in the plurality 818 . . . 820 via a corresponding switch in the plurality of switches 826 . . . 828. The capacitance of a varactor in the plurality 822 . . . 824 may be based on the difference in the voltage level of the time varying signal, O_N, applied to the gate of a varactor in the plurality 822 . . . 824, and the voltage level coupled to the drain and source of the same varactor in the plurality 822 . . . 824 via a corresponding switch in the plurality of switches 826 . . . 828.

[0040] When the voltage level of the time varying signal, O_P, coupled to the gate of a varactor, implemented as an NMOS transistor, in the plurality of varactors 818 . . . 820 is greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain of the same varactor, the capacitance of that varactor may reach a maximum capacitive value C_max. When the voltage level of the time varying signal, O_P, coupled to the gate of a varactor, implemented as an NMOS transistor, in the plurality of varactors 818 . . . 820 is not greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain of the same varactor, the capacitance of that varactor may reach a minimum capacitive value C_min. In an exemplary normal NMOS transistor, the gate to source threshold voltage level may approximately equal 600 millivolts. In an exemplary accumulation type NMOS transistor, the gate to source threshold voltage level may approximately equal 0 volts.

[0041] The average value of the capacitance of a varactor implemented as an NMOS transistor, Avg(C_var), may increase as the proportion of time increases during which the time varying signal O_P is greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain of the same varactor. Therefore, if the voltage level of V_dd is greater than the voltage levels of the control voltage V_cntl and gnd, and if the voltage level of V_cntl is greater than the voltage level of the ground, gnd:
Avg(C_var(gnd)>Avg(C_var(V_cntl))>Avg(C_avg(V_dd))  equation [4]
where Avg(C_var(V_dd)) may represent the average value of the capacitance of a varactor when the drain and source are coupled to the supply voltage V_dd, Avg(C_var(V_cntl)) may represent the average value of the capacitance of a varactor when the drain and source are coupled to the control voltage V_cntl, and Avg(C_var(gnd)) may represent the average value of the capacitance of a varactor when the drain and source are coupled to the ground, gnd. If the voltage level of V_dd is greater than the voltage level of the amplitude of the time varying signal O_P, then the Avg(C_var(V_dd)) may be equal to the minimum capacitance C_min. If the voltage level of the amplitude of the time varying signal O_P is greater than gnd, then Avg(C_var(gnd)) may be equal to the maximum capacitance C_max.

[0042] If the voltage level of the amplitude of the time varying signal O_P is small, then the Avg(C_var(V_cntl)) may be more sensitive to small changes in V_cntl because small changes in the control voltage V_cntl may result in large changes in the portion of time during which O_P is greater than the sum of the gate to source threshold voltage level, and the voltage level of the control voltage V_cntl. If the voltage level of the amplitude of the time varying signal O_P is large, then the Avg(C_var(V_cntl)) may be less sensitive to small changes in the control voltage V_cntl because small changes in V_cntl may not result in large changes in the portion of time during which O_P is greater than the sum of the gate to source threshold voltage level, and the voltage level of the control voltage V_cntl.

[0043] The value of the total capacitance, C_tot,P, for the half of the voltage controlled oscillator (VCO) comprising the second bank of varactors 818 . . . 820 may be represented by:
C_tot,P=C_load+iC_min+jC_max+kAvg(C_var(V_cntl))  equation [5]
where i may represent the number of varactors among the plurality of varactors 818 . . . 820 that are coupled to the supply voltage V_dd, j may represent the number of varactors among the plurality of varactors 818 . . . 820 that are coupled to the ground, gnd, and k may represent the number of varactors among the plurality of varactors 818 . . . 820 that are coupled to the control voltage V_cntl. C_load may represent the capacitance of the load capacitor 814. Among the components of C_tot,P in equation [5], the value of C_var(V_cntl) may vary based on the control voltage V_cntl.

[0044] When the voltage level of the time varying signal, O_N, coupled to the gate of a varactor implemented as an NMOS transistor in the plurality of varactors 822 . . . 824 is greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain of the same varactor, the capacitance of that varactor may reach a maximum capacitive value C_max. When the voltage level of the time varying signal, O_N, coupled to the gate of a varactor in the plurality of varactors 822 . . . 824 is not greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain of the same varactor, the capacitance of that varactor may reach a minimum capacitive value C_min.

[0045] The average value of the capacitance of a varactor implemented as an NMOS transistor, Avg(C_var), may increase as the proportion of time increases during which the time varying signal O_N is greater than the sum of the gate to source threshold voltage level, and the voltage level coupled to the source and drain. Therefore, if the voltage level of V_dd is greater than the voltage levels of V_cntl and gnd, and if the control voltage V_cntl is greater than the voltage level of the ground, gnd, the relationship between Avg(C_var(V_dd)), Avg(C_var(V_cntl)), and Avg(C_var(gnd)) may be as expressed in equation [4]. If the voltage level of the supply voltage V_dd is greater than the voltage level of the amplitude of the time varying signal O_N, then the Avg(C_var(V_dd)) may be equal to the minimum capacitance C_min. If the voltage level of the amplitude of the time varying signal O_N is greater than ground, gnd, then Avg(C_var(gnd)) may be equal to the maximum capacitance C_max.

[0046] If the voltage level of the amplitude of the time varying signal O_N is small, then the Avg(C_var(V_cntl)) may be more sensitive to small changes in the control voltage V_cntl because small changes in V_cntl may result in large changes in the portion of time during which O_N is greater than the sum of the gate to source threshold voltage level, and the voltage level of the control voltage V_cntl. If the voltage level of the amplitude of the time varying signal O_N is large, then the Avg(C_var(V_cntl)) may be less sensitive to small changes in the control voltage V_cntl because small changes in V_cntl may not result in large changes in the portion of time during which O_N is greater than the sum of the gate to source threshold voltage level, and the voltage level of the control voltage V_cntl.

[0047] The value of the total capacitance, C_tot,N, for the half of the voltage controlled oscillator (VCO) comprising the second bank of varactors 822 . . . 824 may be represented by:
C_tot,N=C_load+lC_min+mC_max+nAvg(C_var(V_cntl))  equation [6]
where l may represent the number of varactors among the plurality of varactors 822 . . . 824 that are coupled to the supply voltage V_dd, m may represent the number of varactors among the plurality of varactors 822 . . . 824 that are coupled to the ground, gnd, and n may represent the number of varactors among the plurality of varactors 822 . . . 824 that are coupled to the control voltage V_cntl. C_load may represent the capacitance of the load capacitor 816. Among the components of C_tot,N in equation [6], the value of C_var(V_cntl) may vary based on the control voltage V_cntl.

[0048] In addition to voltage, value of the capacitance of the varactor, C_var, may depend upon other factors. The amount of capacitance of a varactor when implemented utilizing a MOSFET may be based on the physical geometry of the transistor. Manufacturing, or operating temperature variations among varactors, and C_ox variations, may result in variations in the value of the capacitance among the plurality of varactors 818 . . . 820, and 822 . . . 824. Differences in threshold voltages among the varactors may also result in variations in the value of the capacitance among the plurality of varactors 818 . . . 820, and 822 . . . 824.

[0049] The inductors 806 and 808, the load capacitors 814 and 816, and the first and second banks of varactors 818 . . . 820 and 822 . . . 824, may comprise a tank which may implement a bandpass filter. The current source circuit, comprising transistors 802 and 804, may supply energy to the tank that generates time varying signals O_P and O_N with an oscillating frequency F_osc that may be expressed as:

[0050] $\begin{array}{cc}{F}_{\mathrm{osc}}=\frac{2\pi }{\sqrt{L_{\mathrm{tot}}{C}_{\mathrm{tot}}}}& \mathrm{equation}\left[7\right]\end{array}$
where L_tot may represent the total inductance value of the inductors 806 and 808, and C_tot may represent the sum of the capacitance values of the load capacitor 814 and 816, and of each varactor in the first and second banks of varactors 818 . . . 820 and 822 . . . 824, as expressed in equations [5] and [6]. The total inductance value L_tot may be expressed as:
L_tot=L₈₀₆+L₈₀₈  equation [8]
where L₈₀₆ may represent the inductance value of the inductor 806, and L₈₀₈ may represent the inductance value of the inductor 808. The total capacitance value C_tot may be expressed as:

[0051] $\begin{array}{cc}{C}_{\mathrm{tot}}=\frac{C_{\mathrm{tot},N}{C}_{\mathrm{tot},P}}{C_{\mathrm{tot},N}+C_{\mathrm{tot},P}}& \mathrm{equation}\left[9\right]\end{array}$
where C_tot,P may represent the capacitance of the first bank of varactors as expressed in equation [5], and C_tot,N may represent the capacitance of the second bank of varactors as expressed in equation [6]. For the capacitance value of C_tot,P approximately equal to the capacitance value of C_tot,N, the capacitance value of C_tot may be approximately equal to ½C_tot,P, or ½C_tot,N.

[0052] The oscillating frequency, F_osc, may represent the center frequency in the pass band of the bandpass filter implemented by the tank. The value of the center frequency divided by the bandwidth of the bandpass filter may represent the Q factor, or Q, of the tank. The Q factor for the tank may be expressed as:

[0053] $\begin{array}{cc}Q=\frac{2\pi F_{\mathrm{osc}}L}{R_s}& \mathrm{equation}\left[10\right]\end{array}$
where R_s may represent the parasitic resistance associated with the inductors 806 and 808.

[0054] The parasitic resistance, R_s, may dissipate the energy of the time varying signals O_P and O_N, with an oscillating frequency, F_osc, that may be generated in the tank. The positive feedback circuit, comprising transistors 810 and 812, may supply energy that reinforces the frequency oscillation in the tank. As a result, the tank may be able to sustain the time varying signals O_P and O_N with an oscillating frequency F_osc.

[0055] The value of Q may influence the amplitude of the time varying signals O_P and O_N. A change in the bias current supplied by the current source circuit may increase the amount of energy to support frequency oscillation in the tank. This may also change the amplitude of the time varying signals O_P and O_N. A change in the amplitude of the time varying signals O_P and O_N may produce a change the value KVCO. Because the oscillating frequency, F_osc, may be dependent on C_tot, the factors which may result in variations in the capacitance of a varactor in the first and second banks of varactors 818 . . . 820, and 822 . . . 824, may also change the oscillating frequency, F_osc, of the time varying signals O_P and O_N, which are output from the voltage controlled oscillator (VCO).

[0056] A switch among the plurality of switches 826 . . . 828 may couple a corresponding varactor in the plurality of varactors 818 . . . 820, and a corresponding varactor in the plurality of varactors 822 . . . 824, to a supply voltage, V_dd, a control voltage, V_cntl, or a ground voltage, gnd. The level of capacitance in varactors that are coupled to V_dd or gnd voltage levels in the first bank of varactors, and in the second bank of varactors may not vary based on changes in the control voltage V_cntl. The level of capacitance in varactors that are coupled to the control voltage V_cntl in the first bank of varactors, and in the second bank of varactors may vary based on changes in V_cntl. As the number of varactors coupled to the control voltage V_cntl is increased, a greater portion of the total capacitance in the tank, C_tot, may vary based on V_cntl. This, in turn, may result in the oscillating frequency for the tank, F_osc, changing more rapidly for a given change in the control voltage V_cntl. According to equation [2], the change in an oscillating frequency based on a change in V_cntl may be defined as the rate of change in the oscillating frequency, which may be represented by KVCO. Thus, by utilizing the switches in the plurality of switches 826 . . . 828, to couple varactors to the control voltage V_cntl in the first bank of varactors 818 . . . 820, and in the second bank of varactors 822 . . . 824, the value of KVCO may be tuned.

[0057] Similarly, the value of total capacitance in the tank C_tot, may be tuned to compensate for other variations that may affect KVCO such as, for example, C_ox variation, threshold voltage variation, inductance value variation in the inductors 806 and 808, and operating temperature variation. Each switch in the plurality of switches 826 . . . 828 may be controlled utilizing a plurality of binary bits. The binary value of the plurality of binary bits may be based on a varactor control code. For example, for variations that result in an increase in C_tot, the switches in the plurality of switches 826 . . . 828 may be controlled such that the number of varactors in the first and second banks of varactors, 818 . . . 820 and 822 . . . 824, which are coupled to the ground voltage, gnd, may be decreased, and the number of varactors in the first and second banks of varactors, 818 . . . 820 and 822 . . . 824, which are coupled to the supply voltage, V_dd, may be increased. With reference to equations [5] and [6], i and l may be decreased and j and m may be increased. As a result, the oscillating frequency, F_osc of the time varying signals O_P and O_N from the tank of the VCO may be controlled.

[0058] For variations that result in a decrease in the total capacitance in the tank, C_tot, the switches in the plurality of switches 826 . . . 828 may be controlled such that the number of varactors, in the first and second banks of varactors, 818 . . . 820 and 822 . . . 824, which are coupled to the ground voltage, gnd, may be increased, and the number of varactors, in the first and second banks of varactors 818 . . . 820 and 822 . . . 824, which are coupled to V_dd may be decreased. With reference to equations [5] and [6], i and l may be increased and j and m may be decreased. As a result, the oscillating frequency, F_osc of the time varying signals, O_P and O_N, from the tank of the VCO may be controlled.

[0059] FIG. 9 is a flow chart illustrating an exemplary method for switching varactors in a VCO with switchable varactor for low KVCO variation, in accordance with an embodiment of the invention. With reference to FIG. 9, in step 902, values for the oscillating frequency F_osc, and KVCO may be set. In step 904, the oscillating frequency F_osc and KVCO for a VCO 112 may be detected. In step 906, the detected F_osc and KVCO from step 904 may be evaluated to determine if they are within a target range determined in step 902. If F_osc and KVCO are within range, the current varactor switch settings may be maintained.

[0060] In step 910, a varactor switching strategy may be determined if F_osc and KVCO are not within the target range in step 906. Step 912 may determine if any varactors are to be coupled to the supply voltage, V_dd. Step 914 may couple the selected varactors to V_dd if step 912 determined that varactors are to be coupled to V_dd that were not previously coupled to V_dd. Step 916 may determine if any varactors are to be coupled to the control voltage, V_cntl. Step 918 may couple the selected varactors to V_cntl, if step 916 determined that varactors are to be coupled to V_cntl that were not previously coupled to V_cntl. Step 920 may determine if any varactors are to be coupled to the ground voltage, gnd. Step 922 may couple the selected varactors to gnd if step 920 determined that varactors are to be coupled to gnd that were not previously coupled to gnd.

[0061] FIG. 10 is a flow chart illustrating an exemplary method for unswitching varactors in a VCO with switchable varactor for low KVCO variation, in accordance with an embodiment of the invention. With reference to FIG. 10, in step 1002, values for the oscillating frequency F_osc, and KVCO may be set. In step 1004, the oscillating frequency F_osc and KVCO for a VCO 112 may be detected. In step 1006, the detected F_osc and KVCO from step 1004 may be evaluated to determine if they are within a target range determined in step 1002. If F_osc and KVCO are within range, the current varactor switch settings may be maintained.

[0062] In step 1010, a varactor switching strategy may be determined if F_osc and KVCO are not within the target range in step 1006. Step 1012 may determine if any varactors are to be decoupled from the supply voltage, V_dd. Step 1014 may decouple the selected varactors from V_dd if step 1012 determined that varactors are to be decoupled from V_dd that were previously coupled to V_dd. Step 1016 may determine if any varactors are to be decoupled from the control voltage, V_cntl. Step 1018 may decouple the selected varactors from V_cntl if step 1016 determined that varactors are to be decoupled from V_cntl that were previously coupled to V_cntl. Step 1020 may determine if any varactors are to be decoupled from the ground voltage, gnd. Step 1022 may decouple the selected varactors from gnd if step 1020 determined that varactors are to be decoupled from gnd that were previously coupled to gnd.

[0063] Various embodiments of the invention may provide a method and system for a voltage controlled oscillator (VCO) with switchable varactors for low KVCO variation. In various embodiments of the invention, a total capacitance in a circuit may be modified to compensate for variations in VCO circuitry based on the switching of varactors. As a result, a change in KVCO may be minimized. Since KVCO may represent the change in the oscillating frequency of the VCO based on the change in a control voltage, minimizing the change in KVCO may minimize the variation of the phase locked loop bandwidth. Minimizing the change in KVCO may enable the oscillating frequency to be generated more predictably based on the level of a control voltage than may be the case in some conventional VCO circuit designs. Adapting the value of the capacitance in a VCO by switching a plurality of varactors may also control the oscillating frequency of the time varying signal generated by the VCO, in addition to controlling a change in the oscillating frequency that may result from variations in the VCO circuitry.

[0064] Accordingly, the present invention may be realized in hardware, software, or a combination of hardware and software. The present invention may be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software may be a general-purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein.

[0065] The present invention may also be embedded in a computer program product, which comprises all the features enabling the implementation of the methods described herein, and which when loaded in a computer system is able to carry out these methods. Computer program in the present context means any expression, in any language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to another language, code or notation; b) reproduction in a different material form.

[0066] While the present invention has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the present invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the present invention without departing from its scope. Therefore, it is intended that the present invention not be limited to the particular embodiment disclosed, but that the present invention will include all embodiments falling within the scope of the appended claims.