Bandgap reference circuits

[0001] The invention relates to bandgap circuits, and more particularly, to bandgap reference circuits capable of generating bandgap voltage without varying temperature and manufacturing variations.

[0002] In integrated circuits, while reference generators are required output voltages thereof are typically fixed at 1.23V and are not applicable in low voltage operation.

[0003] FIG. 1 shows a conventional reference voltage generator with temperature compensation. As shown, the reference voltage generator includes a PMOS transistor M11, three resistors R10˜R13, an operational amplifier OP11, bipolar junction transistor (BJT) Q12, and eight parallel connected BJTs Q11. The voltage V_BE1 is generated between the emitter terminals and the base terminals of the BJTs Q11, and a current I_C1 (not shown) flows through each BJT Q11. The voltage V_BE2 is generated between the emitter terminals and the base terminals of the BJTs Q12, and the current I_C2 flows through the BJT Q12. The PMOS transistor M11 includes a source terminal coupled to an operating voltage VCC, a gate terminal coupled to an output terminal of the amplifier OP11, and a drain terminal coupled to the resistor R13. The resistor R10 has a first end coupled to the resistor R11 and the positive input terminal of the operational amplifier OP11, and the other end coupled to the emitter terminals of the parallel connected BJTs Q11. The resistor R12 includes one end coupled to the resistors R11 and R13 and the other end coupled to the negative input terminal of the amplifier and the emitter terminal of the BJT Q12.

[0004] The operational amplifier OP11 includes a positive input terminal coupled to the connection (node A) between the resistors R10 and R11, and a negative input terminal coupled to the connection (node B) between the resistor R12 and the emitter terminal of the BJT Q12. The operational amplifier OP11 normalizes the voltages on the nodes A and B, and generates a bandgap voltage V_BG at the connection between the resistor R13 and the drain terminal of the PMOS transistor M11.

[0005] $V_{\mathrm{BG}}=V_{\mathrm{BE2}}+\frac{V_T\ln \left(\frac{I_{\mathrm{C2}}}{I_{\mathrm{C1}}}\right)}{R_{10}}\left[\frac{R_{11}}{R_{12}}\times R_{12}+\left(1+\frac{R_{11}}{R_{12}}\right)R_{13}\right],\mathrm{wherein}{V}_T=\frac{\mathrm{KT}}{q},\mathrm{and}$
the parameter V_T is a positive temperature coefficient. Thus, the voltage across the resistors R12 and R13 has a positive temperature coefficient, and the voltage V_BE2 a negative temperature coefficient. Consequently, a stable voltage V_BG unaffected by temperature and manufacturing variations is obtained.

[0006] The reference voltage V_BG with temperature compensation, however, is limited to 1.23V because the negative temperature coefficient is a constant. Thus, this conventional reference circuit cannot provide required reference voltage for low voltage operation.

[0007] Embodiments of the invention provide a bandgap reference circuit, in which a current generator includes a first bipolar junction transistor (BJT) and generates a first positive temperature coefficient current thereby producing a negative temperature coefficient voltage between a base terminal and an emitter terminal of the first bipolar junction transistor. A single-end gain amplifier includes a positive input terminal coupled to the emitter terminal of first the bipolar junction transistor and an output terminal. A first resistor is coupled between the output terminal of the single-end gain amplifier and an output terminal of the bandgap reference circuit to generate a first current. A current-to-voltage converter is coupled to the first resistor to convert the first positive temperature coefficient current and the first current to a bandgap voltage.

[0008] Also provided is another bandgap reference circuit. In the bandgap reference circuit, a current generator has first bipolar junction transistors (BJTs) connected in parallel and generates a first positive temperature coefficient current, thereby producing a negative temperature coefficient voltage between base terminals and emitter terminals of the first bipolar junction transistors. A single-end gain amplifier includes a positive input terminal coupled to the emitter terminals of the first bipolar junction transistors and an output terminal. A first resistor is coupled between the output terminal of the single-end gain amplifier and an output terminal of the bandgap reference circuit to generate a first current. A current-to-voltage converter is coupled to the first resistor to convert the first positive temperature coefficient current and the first current to a bandgap voltage.

[0009] Also provided is another bandgap reference circuit. In the bandgap reference circuit, a current generator includes a first bipolar junction transistor (BJT) to generate a first positive temperature coefficient current and a plurality of second bipolar junction transistors connected in parallel to generate a second positive temperature coefficient current. A first resistor is coupled between an emitter terminal of the first bipolar junction transistor and an output terminal of the bandgap reference circuit to generate a first current. A second resistor is coupled between the output terminal of the bandgap reference circuit and emitter terminals of the second bipolar junction transistors to generate a second current. A current-to-voltage converter is coupled to the first and second resistors to convert the first and second positive temperature coefficient currents and the first and second currents to a bandgap voltage.

[0018] FIG. 2 shows a bandgap reference circuit of embodiments of the invention. A current generator 20 includes bipolar junction transistor (BJT) Q21, and generates a positive temperature coefficient current I₁ between the emitter terminal and base terminal of the BJT Q21. A resistor R21 is coupled between the emitter terminal of the BJT Q21 and the output terminal (node) OT of the bandgap reference circuit 200 to generate a negative temperature coefficient current I_VBE1 or a positive temperature coefficient current I_VBE2. A current-to-voltage converter 22 converts the positive temperature coefficient current I₁ and the negative temperature coefficient current I_VBE1 or a positive temperature coefficient current I_VBE2 to a bandgap voltage V_BG.

[0019] It should be noted that the resistor R21 generates the negative temperature coefficient current I_VBE1 when the bandgap voltage is less than that between the emitter terminal and base terminal of the BJT Q21. Conversely, the resistor R21 generates the positive temperature coefficient current I_VBE2 when the bandgap voltage exceeds the voltage between the emitter terminal and base terminal of the BJT Q21.

First Embodiment

[0020] FIGS. 3a and 3b show a bandgap reference circuit of a first embodiment of the invention. As shown in FIG. 3a, the bandgap reference circuit 300 includes three PMOS transistors M31˜M33, three resistors R30˜R32, an operational amplifier OP31, a single-end gain amplifier OP32, a BJT Q32 and parallel connected BJTs Q31.

[0021] The PMOS transistors M31˜M33, resistor R30, an operational amplifier OP31, a single-end gain amplifier OP32, BJT Q32 and parallel connected BJTs Q31 constitute a current generator to generate the positive temperature coefficient current I₁. The base terminals and the Collector terminals of the BJTs Q31 are coupled to a ground voltage, with the voltage V_BE1 (not shown) between the base terminal and emitter terminals, and the current I_C1 through each BJT Q31. Further, the base terminal and Collector terminal of the BJTs Q32 are coupled to the ground voltage, with the voltage V_BE2 between the base terminal and emitter terminal, and the current I₁ through the BJT Q32, wherein the voltage V_BE2 is a negative temperature coefficient voltage.

[0022] The source terminals of PMOS transistors M31˜M33 are coupled to an operating voltage VCC, gate terminals of which are coupled to the output terminal of the operational amplifier OP31. The resistor R30 includes an end coupled to the emitter terminals of the BJTs Q31 and the other end coupled to the drain terminal of the PMOS transistor M31 and the positive input terminal of the operational amplifier OP31. The drain terminal of the PMOS transistor M32 is coupled to the negative input terminal of the operational amplifier OP31, the emitter terminal of the BJT Q32 and the positive input terminal of the single-end gain amplifier OP32.

[0023] The single-end gain amplifier OP32 includes a negative input terminal coupled to an output terminal thereof. The voltage at the output terminal of the amplifier OP32 is also V_BE2 because the positive input terminal, the negative input terminal and the output terminal of the single-end gain amplifier OP32 have the same voltage level.

[0024] The resistor R31 is coupled between the output terminal of the single-end gain amplifier OP32 and the output terminal OT of the bandgap reference circuit, the current through the resistor R31 is I₂. As shown in FIG. 3a, the bandgap voltage is less than the voltage between the base terminal and the emitter terminal of the BJT Q32, and thus, the current I₂ through the resistor R31 is a negative temperature coefficient current.

[0025] Because there is no current between the positive and negative input terminals, the current I₁ through the BJT Q32 exceeds the current I_C1 through each BJT Q31 of the parallel BJTs such that the voltage across the resistor R30 is a positive temperature coefficient voltage, if the size of the PMOS transistors M31˜M33 is adequate. In the example shown in FIG. 3a, the PMOS transistors M31˜M33 have the same size such that the current through the BJT Q32 and the total current through parallel connected BJTs Q31 are both I₁. Thus, the resistor R32 combines the positive temperature coefficient current I₁ with the negative temperature coefficient current I₂ to a current I_REF, and converts to a bandgap voltage V_BG unaffected by temperature and manufacturing variations.

[0026] $V_{\mathrm{BG}}=\left(I_1+I_2\right)\times \mathrm{R32}=\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R30}}\right)+\left(\frac{V_{\mathrm{BE2}}-V_{\mathrm{BG}}}{\mathrm{R31}}\right)\right]\times \mathrm{R32}\therefore V_{\mathrm{BG}}=\left(\frac{\mathrm{R31}\times \mathrm{R32}}{\mathrm{R31}+\mathrm{R32}}\right)\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R30}}\right)+\left(\frac{V_{\mathrm{BE2}}}{\mathrm{R31}}\right)\right]$

[0027] As shown in FIG. 3b, the bandgap reference circuit 310 is similar to the circuit 300 in FIG. 3a except that, in circuit 310, the generated bandgap voltage V_BG exceeds the voltage between the base terminal and the emitter of the BJT Q32. Thus, the current I₂ through the resistor R31 is a positive temperature coefficient current. The resistor R32 combines the positive temperature coefficient current I₁ with the positive temperature coefficient current I₂ to a current I_REF, and converts to a bandgap voltage V_BG unaffected by temperature and manufacturing variations.

Second Embodiment

[0028] FIGS. 4a and 4b show a bandgap reference circuit of a second embodiment of the invention. As shown, the bandgap reference circuit 400 is similar to the circuit 300 shown in FIG. 3a except that the positive input terminal of the single-end amplifier 32 is coupled to resistor R30 and the emitter terminals of the parallel connected BJTs Q31 rather than the drain terminal of the PMOS transistor, the emitter terminal of the BJT Q32 and the negative input terminal of the operational amplifier OP31. The resistor R31 is coupled between the output terminal of the single-end gain amplifier OP32 and the output terminal OT of the bandgap reference circuit, the current through the resistor R31 is I₂. As shown in FIG. 4a, the bandgap voltage is less than the voltage between the base terminal and the emitter terminal of the BJT Q32, and thus, the current I₂ through the resistor R31 is a negative temperature coefficient current.

[0029] As shown in FIG. 4b, the bandgap reference circuit 410 is similar to the circuit 310 shown in FIG. 3a except that the positive input terminal of the single-end amplifier 32 is coupled to resistor R30 and the emitter terminals of the parallel connected BJTs Q31 rather than the drain terminal of the PMOS transistor, the emitter terminal of the BJT Q32 and the negative input terminal of the operational amplifier OP31. Further, in the circuit 410, the generated bandgap voltage V_BG exceeds the voltage between the base terminal and the emitter of the BJT Q32. Thus, the current I₂ through the resistor R31 is a positive temperature coefficient current. The resistor R32 combines the positive temperature coefficient current I₁ with the positive temperature coefficient current I₂ to a current I_REF, and converts to a bandgap voltage V_BG unaffected by temperature and manufacturing variations.

Third Embodiment

[0030] FIGS. 5a and 5b show a bandgap reference circuit of a third embodiment of the invention. As shown in FIG. 5a, the bandgap reference circuit 500 includes PMOS transistors M51˜M53, resistors R50, R51a, R51b and R52, an operational amplifier OP51, a BJT Q52 and parallel connected BJTs Q51.

[0031] In FIG. 5a, the PMOS transistors M51˜M53, the resistor R50, the operational amplifier OP51, the BJT Q52 and the parallel connected BJTs Q51 constitute the current generator to generate the positive temperature coefficient current I₁. The resistor R52 serves as a current-to-voltage converter. The parallel connected BJTs have N BJTs Q51, the base terminals and emitter terminals of the parallel connected BJTs Q51 are coupled to the ground voltage. The voltage between the base terminals and emitter terminals of the parallel connected BJTs Q51 is V_BE1 (not shown), and the current through each BJT Q51 is I_C1. Further, the base terminal and emitter terminal of the BJT Q52 are both coupled to the ground voltage, with the voltage V_BE2 between the base terminal and emitter terminal, wherein the voltage V_BE2 is a negative temperature coefficient voltage, with the current through the BJT Q52 is I₁.

[0032] The source terminals of the PMOS transistors M51˜M53 are coupled to an operating voltage VCC, and gate terminals of which are coupled to the output terminal of the operational amplifier OP51. The drain terminal of the PMOS transistor M51 is coupled to the positive terminal of the operational amplifier OP51 and the resistors R50 and R51a. The drain terminal of the PMOS transistor M52 is coupled to the negative terminal of the operational amplifier OP51, the resistor R51b, and the emitter terminal of the BJT Q52. The drain terminal of the PMOS transistor M53 is coupled to the resistors R51a, R51b and R52.

[0033] The resistor R51a is coupled between the positive input terminal of the operational amplifier OP51 and the output terminal OT of bandgap reference circuit 500, wherein the current through the resistor R51a is I₂. The resistor R51b is coupled between the negative input terminal of the operational amplifier OP51 and the output terminal OT of bandgap reference circuit 500, wherein the current through the resistor R51a is also I₂, if R51a=R51b

[0034] It should be noted that an optional single-end gain amplifier can also be disposed between node A and the resistor R51a or between node B and the resistor R51b (not shown).

[0035] As shown in FIG. 5a, the generated bandgap voltage V_BG is less than the voltage between the base terminal and the emitter terminal of the BJT Q52, such that the currents I₂ through the resistors R51a and R51b are negative temperature coefficient currents.

[0036] The current I₁ through the BJT Q52 exceeds the current I_C1 through each BJT Q51 of the parallel BJTs such that the voltage across the resistor R50 is a positive temperature coefficient voltage, if the size of the PMOS transistors M51˜M53 is designed adequate. For example, the PMOS transistors M51˜M53 are the same size and the resistors R51a and R51b also are the same size, such that the current through the BJT Q52 and the total current of the currents through parallel connected BJTs Q51 are both I₁, wherein resistances of R51a and R51b are both R51. Thus, resistor R52 combines the positive temperature coefficient current I₁ with the three negative temperature coefficient currents I₂ to a current I_REF, and converts to a bandgap voltage VBG unaffected by temperature and manufacturing variations.

[0037] $V_{\mathrm{BG}}=\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R50}}\right)+3\times \left(\frac{V_{\mathrm{BG}}-V_{\mathrm{BE2}}}{\mathrm{R51}}\right)\right]\times \mathrm{R52}\therefore V_{\mathrm{BG}}=\left(\frac{\mathrm{R51}\times \mathrm{R52}}{\mathrm{R51}-3\mathrm{R52}}\right)\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R50}}\right)+\left(\frac{3V_{\mathrm{BE2}}}{\mathrm{R51}}\right)\right]$

[0038] As shown in FIG. 5b, the bandgap reference circuit 510 is similar to the circuit 500 in FIG. 5a except that, in circuit 510, the generated bandgap voltage V_BG exceeds the voltage between the base terminal and the emitter of the BJT Q52. Thus, the currents I₂ through the resistor R51a and R51b are positive temperature coefficient currents. The resistor R52 combines the positive temperature coefficient current I₁ with the three positive temperature coefficient currents I₂ to a current I_REF, and converts to a bandgap voltage V_BG unaffected by temperature and manufacturing variations.

[0039] $V_{\mathrm{BG}}=\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R50}}\right)-3\times \left(\frac{V_{\mathrm{BG}}-V_{\mathrm{BE2}}}{\mathrm{R51}}\right)\right]\times \mathrm{R52}\therefore V_{\mathrm{BG}}=\left(\frac{\mathrm{R51}\times \mathrm{R52}}{\mathrm{R51}+3\mathrm{R52}}\right)\left[\left(\frac{V_T\ln \frac{I_1}{I_{\mathrm{C1}}}}{\mathrm{R50}}\right)+\left(\frac{3V_{\mathrm{BE2}}}{\mathrm{R51}}\right)\right]$

[0040] FIG. 6a shows simulated output of the bandgap reference circuit shown in FIG. 3a under different operating voltages. FIG. 6b shows simulated output of the bandgap reference circuit shown in FIG. 5a under different operating voltages. As shown in FIGS. 6a and 6b, the bandgap voltages generated by the bandgap reference circuits 310 and 510 do not vary demonstrably with temperature and manufacturing variations under different voltage operations.

[0041] While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the disclose is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.