AC/DC converter with power factor correction

[0001] The present invention relates to AC/DC converters, and more particularly with single stage AC/DC converters with input current shaped to deliver a power factor equal to unity.

[0002] Traditional switch mode AC/DC converters generate highly distorted AC current, which pollutes an AC line with high harmonics content. A conventional technique to correct this problem uses power factor correction or AC current shaping. The first power factor correction devices, which are widely used now, were constructed as a separate preregulator to form a front end AC/DC converter, which is followed by a main DC/DC converter. However, including an additional converter made the total system more complex, less efficient and pricey, though technically, the power factor was achieved close to unity.

[0003] Later, a single stage single switch power factor corrected AC/DC device was suggested. (See Richard Redl et al., “A New Family of Single-Stage Isolated Power Factor Correctors with Fast Regulation of the Output Voltage”, IEEE PESC, 1994, pp. 1137–1144.) The schematic of this converter is presented in FIG. 1, and its current waveform is presented in FIG. 2.

[0004] From voltseconds balance of the inductor L:

[0005] $\begin{array}{cc}{D}_1=\frac{V_{i}D}{V_c}+{\mathrm{nV}}_o-V_i& \left(1\right)\end{array}$
Average input current:

[0006] $\begin{array}{cc}{I}_{\mathrm{av}}=\mathrm{TD}\left(D+D_1\right)\frac{V_i}{2L}={\mathrm{TD}}^2\frac{V_i}{2L}\frac{\left(V_c+{\mathrm{nV}}_o\right)}{V_i}& \left(2\right)\end{array}$
where T-period of the switching cycle,

[0007] D is the Duty cycle of the positive slope,

[0008] D₁ is the Duty cycle of the negative slope,

[0009] V_c is the Voltage across the bulk capacitor,

[0010] V_o is the Output voltage,

[0011] n is the transformer ratio,

[0012] V_i is the instantaneous value of the input voltage.

[0013] The current becomes modulated by Vi or sin θt, or power factor=1 only when V_c+nV_o/V_i>>1. That condition leads designers to keep the voltage across the bulk capacitor C very high to avoid input current distortions.

[0014] A number of solutions was proposed to improve the single stage single switch isolated AC/DC converter with power factor correction:

• [0015] U.S. Pat. No. 6,069,801 Hodge et al.
• [0016] U.S. Pat. No. 6,038,146 Luo at al.
• [0017] U.S. Pat. No. 6,272,027 Fraidlin et al.
• [0018] U.S. Pat. No. 6,108,222 Liang
• [0019] U.S. Pat. No. 6,108,218 Igarashi
• [0020] U.S. Pat. No. 5,757,626 Jovanovic et al.
• [0021] U.S. Pat. No. 5,991,172 Jovanovic et al.
• [0022] Jun-Young Lee et al. “A New Single-Stage AC/DC Converter with High Efficiency and High Power Factor,” INETELEC 1996, pp. 263–270.
• [0023] M. Daniele et al., “A Single Stage Power Factor Corrected AC/DC Converter”, INTELEC 1996, pp. 256–262
• [0024] Chow et al., “A Novel Method for Elimination of Line-Current Harmonics in Single-Stage PFC Switching Regulators”, IEEE Transactions on Power Electronics, Vol. 13, No 1, 1998, pp 75–83.

[0025] However these solutions either have not satisfactorily reduced the voltage stress on converter elements or introduced quite complex circuits for practical implementations. All of them present low frequency ripple at the output voltage due to the fact that in a single stage AC/DC converter, instantaneous input power is not equal to instantaneous output power, despite the fact that average input power and output power are balanced. To filter low frequency ripple, big capacitance values of the input bulk capacitor are required, which is expensive as it's a high voltage element. And even, if this capacitor is used, it still will not eliminate all low frequency ripple, making such a converter unacceptable for some specific applications, like voice processing systems in telecommunication.

[0026] Average current in the conventional circuit of FIG. 3 still has the same problems as the one in FIG. 1, where

[0027] $\begin{array}{cc}{I}_{\mathrm{av}}={\mathrm{TD}}^2\frac{V_i}{2L}\left(\frac{V_c}{V_i}\right)& \left(3\right)\end{array}$

[0028] One conventional fix to this problem uses a comprehensive controller to manipulate the frequency by the following law:

[0029] $\begin{array}{cc}T=T_{\mathrm{on}}\left(1-\frac{V_i}{V_c}\right),& \left(4\right)\end{array}$

[0030] However, this approach introduces variable frequency, creating its own set of problems.

[0031] In isolated switch mode power converters where transformers are used, some very challenging tasks should be accomplished: transformer reset, handling energy stored in the leakage inductance of the windings, and turning switches on and off with minimum losses (“softswitching”). U.S. Pat. Re. 36,098, titled “Optimal resetting of the transformer's cores in single ended forward converters”, gives a technical solution for a transformer reset in the forward type of converters. Application of this technique to the flyback type of converters would be useless by definition of a flyback as a system where energy, stored in the core, is returned to the load (“transformer reset”). U.S. Re. 36,098 also does not address the issue of utilizing energy, stored in the leakage inductance, which is very critical for high efficiency of any type of converter. To achieve that, unlike in the U.S. Re. 36,098, the circuit should resonate with the leakage inductance, which is at least in order of magnitude smaller than magnetizing inductance, making the resonance frequency of the circuit much, much higher than in Re. 36,098 and setting quite different and more challenging requirements for the circuit itself and any associated control circuits.

[0032] Another technical task facing designers of the isolated switching converters is feedback structure for automatic output regulation. An optocoupler between primary and secondary circuits is used in most typical solutions. However, even the best optocouplers on the market today bring a lot of limits to the feedback and quite low bandwidth. That's why there is an attempt now to switch voltage sensing of the output from primary side of the transformer, as described in U.S. Pat. Nos. 5,757,625 and 5,438,499.

[0033] However, the referenced prior art is using quite complicated analog circuits to derive a signal, representative of output voltage. Actual circuits are performing analog simulation of the converter, based on some sensed signals. The cost of the controllers is high, and the accuracy is questionable.

[0034] Accordingly, there exists a need for a switch mode AC/DC converter with input AC current shaped to limit high harmonics content and with voltage across the bulk capacitor well contained. To achieve high efficiency, this converter should utilize stored leakage inductance and provide, if necessary, a soft switching and secondary synchronous rectification. Further, the feedback structure of the isolated AC/DC converter should be simplified by sensing the feedback signal from the primary side of the transformer. The present invention addresses such a need.

[0035] A switch mode AC/DC converter with input current shaped for unity power factor. Input current is modulated by input voltage, and input inductor and isolation transformer are driven with the same duty ratio, with a low voltage across bulk capacitor. This voltage is determined only by input voltage amplitude. Energy stored in the leakage inductance of the transformer is returned back to the internal DC source. A soft switching circuit is connected to the primary side, eliminating the need for high side drive. Sources of the main and auxiliary switches and primary winding of the transformer are connected to ground for easy primary voltage sensing. Overvoltage protection circuit of the output is connected to exclusively primary side signals. Secondary synchronous rectifier is driven by a circuit synchronized with the system clock. The circuit can be coupled to either the primary or the secondary winding of the isolation transformer.

[0060] FIG. 4 illustrates an embodiment of an AC/DC converter 400 in accordance with the present invention. The AC/DC rectifier D1–D4 (401) of the converter 400 is connected with its positive terminal to the first terminal of the input inductor L (402), and with negative terminal to a ground node. The first terminal of the switch S1 (403) is connected to the second terminal of the input inductor L (402) and positive terminal of the bulk capacitor C (404). The second terminal of switch S1 (403) is connected to the first terminal of the isolation transformer T (405) and the ground node. The second terminal of transformer T (405) is coupled with the negative terminal of the bulk capacitor C (404) via an isolating diode D5 (406), connected with its anode to the transformer T (405) and cathode to the bulk capacitor C (404). The negative terminal of the bulk capacitor C (404) is connected to the first terminal of the inductor L (402) via an isolating diode D6 (407), connected with its anode to the capacitor C (404) and cathode to inductor L (402). The secondary winding of the transformer T (405) is coupled to the load (412) via blocking diode D7 (408). The control system CC1 (409) is connected to the control terminal of the switch S1 (403) and includes the output voltage feedback loop FB1 (410). The equivalent diagrams of the converter 400 are presented in FIGS. 5a–5c, and its waveforms in FIG. 6.

[0061] FIG. 5a illustrates interval to-tl, where the input inductor L (402) stores energy from the input and magnetizes inductance of the transformer T (405) from bulk capacitor C (404).

[0062] FIG. 5b illustrates interval t₁–t₂, where the input inductor L (402) is discharging its energy into the bulk capacitor C (404), and transformer T (405) is transferring its stored energy to the output.

[0063] FIG. 5c illustrates interval t₂–t₃, where all storage elements are empty, except for the output filter capacitor C_o (411) which supports the load current.

[0064] FIG. 6a illustrates waveforms for an input AC current.

[0065] FIG. 6b illustrates waveforms for an input inductor.

[0066] FIG. 6c illustrates waveforms for a primary transformer.

[0067] FIG. 6d illustrates waveforms for a secondary transformer.

[0068] For the converter 400 in FIG. 4, the following relationship are valid, assuming that within the input frequency cycle, the duty ratio D=const:

Input current i

[0069] $\begin{array}{cc}L\frac{di}{dt}=V_i& \left(5\right)\\ \mathrm{di}=\frac{V_i}{L}\mathrm{dt}& \left(7\right)\\ i=\frac{V_i\mathrm{DT}}{L}=\frac{\mathrm{DT}}{L}{V}_m\sin \omega t=I_m\sin \omega t& \left(8\right)\end{array}$
where V_m is the amplitude of the input voltage, and

[0070] I_m is the amplitude of the average input current.

[0071] Equation (8) is an analytical expression of the shaped primary current, and theoretically it does not have any higher than main harmonics (See FIG. 6).

The input current amplitude:

[0072] $\begin{array}{cc}{I}_m=\frac{\mathrm{DT}}{L}{V}_m& \left(9\right)\end{array}$
For further analysis, assume a discontinuous mode of operation for both input inductor L (402) and transformer T (405).
As illustrated in FIG. 6, peak inductor current at positive slope:

[0073] $\begin{array}{cc}\mathrm{ip}=\frac{\mathrm{TD}}{L}{V}_m\sin \omega t& \left(10\right)\end{array}$
The same current at negative slope:

[0074] $\begin{array}{cc}\mathrm{ip}=\frac{V_c}{L}{D}_{2}T& \left(11\right)\end{array}$
where D₂ is the duty cycle of the negative slope in the inductor.
Equalizing equations (10) and (11), the expression for D₂:

[0075] $\begin{array}{cc}{D}_2=D\left(\frac{V_m}{V_c}\right)\sin \omega t& \left(12\right)\end{array}$
Or D₂ is modulated by sin ωt, and the average value of D₂:

[0076] $\begin{array}{cc}{D}_{2\mathrm{av}}=\left(\frac{1}{\pi }\right){\int }_0^{\pi }\left(\frac{{\mathrm{DV}}_m}{V_c}\right)\sin \omega td\left(\omega t\right)=\frac{2{\mathrm{DV}}_m}{\pi V_c}& \left(13\right)\end{array}$
Voltsecond balance of the transformer:

[0077] $\begin{array}{cc}\frac{V_{c}D}{n}=V_0{D}_1& \left(14\right)\end{array}$
where D₁ is the duty ratio of the flyback transformer reset.
Transfer coefficients:

[0078] $\begin{array}{cc}\frac{V_c}{V_o}=n\frac{D_1}{D}& \left(15\right)\\ \frac{V_m}{V_c}=\left(\frac{\pi }{2}\right)\left(\frac{D_{2\mathrm{av}}}{D}\right)& \left(16\right)\end{array}$
Peak energy in the input inductor:

[0079] $\begin{array}{cc}{W}_i=L\left(\frac{{\mathrm{ip}}^2}{2}\right)=\frac{L}{2}{\left(\frac{\mathrm{DT}}{L}{V}_m\sin \omega t\right)}^2=\left(\frac{D^2{T}^2{V}_m^2}{2L}\right){\sin }^2\omega t& \left(17\right)\end{array}$
Average energy in one half of the cycle:

[0080] $\begin{array}{cc}{W}_{\mathrm{av}}=\left(\frac{1}{\pi }\right)\left(\frac{D^2{T}^2{V}_m^2}{2L}\right){\int }_0^{\pi }\left({\sin }^2\omega t\right)d\left(\omega t\right)=\frac{D^2{T}^2{V}_m^2}{4L}& \left(18\right)\end{array}$
And input power:

[0081] $\begin{array}{cc}{P}_{\mathrm{in}}=\frac{D^2{\mathrm{TV}}_m^2}{4L}& \left(19\right)\end{array}$
Peak primary current in the transformer:

[0082] $\begin{array}{cc}{I}_p=\frac{V_c\mathrm{DT}}{L_m}& \left(20\right)\end{array}$
Transformer power (assuming 100% efficiency):

[0083] $\begin{array}{cc}{P}_{\mathrm{tr}}=\frac{L_m{I}_p^2}{2T}=\frac{D^2{\mathrm{TV}}_c^2}{2L_m}& \left(21\right)\end{array}$
As P_in=P_tr,

[0084] $\begin{array}{cc}\frac{D^2{\mathrm{TV}}_m^2}{4L}=\frac{D^2{\mathrm{TV}}_c^2}{2L_m}& \left(22\right)\end{array}$
Or

[0085] $\begin{array}{cc}{V}_c=V_m\sqrt{\frac{L_m}{2L}}& \left(23\right)\end{array}$
Output power:

[0086] $\begin{array}{cc}{P}_{\mathrm{out}}=I_o{V}_o& \left(24\right)\\ \frac{D^2{\mathrm{TV}}_m^2}{4L}=I_o{V}_o& \left(25\right)\end{array}$
Duty cycle:

[0087] $\begin{array}{cc}D=\frac{1}{V_m}\sqrt{4{\mathrm{fLI}}_o{V}_o}& \left(26\right)\end{array}$
where f=1/T−frequency of the converter
From equation (25),

[0088] $\begin{array}{cc}L=\frac{D^2{V}_m^2}{4I_o{V}_o}& \left(27\right)\end{array}$
The value of the inductance shall be found at V_m=V_min and I_o=I_omax. Assuming D=0.5,

[0089] $\begin{array}{cc}L=\frac{V_{\min }^2}{16{\mathrm{fP}}_{\max }}& \left(28\right)\end{array}$
It follows from equations (21) and (24) that

[0090] $\begin{array}{cc}{L}_m=\frac{V_{\mathrm{cmin}}^2}{8{\mathrm{fP}}_{\max }}& \left(29\right)\end{array}$
It is recommended to select

[0091] $\begin{array}{cc}{V}_{\mathrm{cmin}}=\frac{V_{\min }}{\sqrt{2}}& \left(30\right)\end{array}$
Then

[0092] $\begin{array}{cc}L=L_m\mathrm{and}n=\frac{V_{\min }}{V_o\sqrt{2}}& \left(31\right)\end{array}$

[0093] A similar analysis may be done for the converter 400 in FIG. 4, working in the continuous mode of operation.

From equation (8) average AC input current:

[0094] $\begin{array}{cc}{I}_{\mathrm{av}}=\left(\frac{V_m{\mathrm{TD}}^2}{2L}\right)\sin \omega t& \left(32\right)\end{array}$
And input power:

[0095] $\begin{array}{cc}{P}_{\mathrm{ac}}=\frac{1}{\pi }{\int }_0^{\pi }{V}_m\left(\frac{V_m{\mathrm{TD}}^2}{2L}\right)\sin \omega t(d\left(\omega t\right))=\frac{V_m^2{\mathrm{TD}}^2}{4L}& \left(33\right)\end{array}$
RMS value of AC input current:

[0096] $\begin{array}{cc}{I}_{\mathrm{rms}}=\sqrt{\frac{1}{\pi }{\int }_0^{\pi }\left(\frac{V_m{D}^{2}T}{2L}\right)2{\sin }^2\omega t(d\left(\omega t\right))}=\frac{V_m{D}^{2}T}{2L}& \left(34\right)\end{array}$
Power factor:

[0097] $\begin{array}{cc}{P}_f=\frac{V_{\mathrm{rms}}}{P_{\mathrm{ac}}}=\frac{\left(\frac{V_m}{2}\right)\left(\frac{V_m{D}^{2}T}{2L}\right)}{\left(\frac{V_m^2{\mathrm{TD}}^2}{4L}\right)}=1& \left(35\right)\end{array}$
Total harmonic distortion, THD:

[0098] $\begin{array}{cc}\mathrm{THD}=\sqrt{\left(\frac{{\cos }^2\Psi }{P_f^2}\right)-1}& \left(36\right)\end{array}$
Due to used technique of input current modulation:
Ψ=0  (37)
and Pf=1 from 35, so
THD=0,  (38)
or the input current is ideally shaped to have a sinusoidal waveform without any content of harmonics higher than the first.

[0099] Power factor Pf in the converter 400 at any operating condition is equal to unity. This provides a major advantage over the prior art, where Pf is approaching unity only at some special operating conditions, mostly at unacceptably high voltage at the bulk capacitor C.

[0100] FIG. 7 illustrates another embodiment of the converter in accordance with the present invention. The converter 700 has a diode D8 (701) connected with its cathode to one of the AC terminals and with its anode to the resistor R1 (702) coupled to the negative terminal of the bulk capacitor C (404). This will provide an initial charge to the bulk capacitor C (404) to improve conditions of the circuit start up.

[0101] The transformer T (405) in the converter 800 illustrated in FIG. 8 is connected between a ground node and a negative terminal of the bulk capacitor C (404). Compared to the converter 400 in FIG. 4, the isolation diode D5 (406) is dropped to improve efficiency. This converter configuration is valid when the design is done in a such manner that:

[0102] a) V_c>V_m at any conditions, or

[0103] b) the transformer T (405) operates in the continuous mode and 2V_c>V_m at any conditions.

[0104] To improve further the efficiency, a leakage energy recovery circuit added to the converter 900 illustrated in FIG. 9. A diode D9 (901) and capacitors C1 (902) and C2 (903) are connected across the primary winding of the transformer T (405). When switch S1 (403) is off, the energy stored in the leakage inductance of T (405) will be transferred to capacitors C1 (902) and C2 (903) through a resonance process. Voltage across C2 (903) is used for driving a controller. When voltage across capacitors C1 and C2 is equal to V_c, the energy stored in capacitors C1 (902) and C2 (903) will be transferred to inductor L (402), when it is in the reset mode. For this purpose, inductor L (905) is equipped with an overwinding L(2) with the same number of turns as the main winding L(1), but for much lower current. The overwinding L(2) is connected between the ground node and the cathode of isolation diode D10 (904), which anode is coupled to the cathode of diode D9 (901).

[0105] Another aspect of the invention is to provide a high efficiency converter 1000 illustrated in FIG. 10 by utilizing secondary synchronous rectification and providing primary sensing for a closed feedback loop (1001). A synchronous rectifier element S2 (1004) is connected between the secondary winding W2 of the transformer T (1002) and positive terminal of the output. Its control terminal is connected to a secondary control circuit CC2 (1003), coupled to the second secondary winding W3 of the transformer T (1002).

[0106] When a voltage across a second secondary winding W3 of transformer T (1002) is becoming negative at the dot, the secondary control circuit CC2 (1003) turns on the switch S2 (1004). Further performance of the converter 1000 is illustrated in FIG. 11. When voltage at the dot of winding W3 goes positive, it starts to charge the integrator I1 (1111). At the negative swing of the winding W3, sensed by logic L1 (1113), the integrator I1 (1111) fixes voltseconds, applied to the transformer T (1002). Logic L1 (1113) now resets the integrator I1 (1111) with the negative voltage applied to it from the winding W3. When the integrator I1(1111) reaches 0 volts, the positive and negative voltseconds of the transformer (1002) are balanced, and the transformer T (1002) has completed its reset. For the secondary control circuit CC2 (1003), it's a signal to turn S2 (1004) off. A comparator C3 (1112) senses the 0 volt output of the integrator I1 (1111) and activates logic L1 (1113). Logic L1 (1113) has a certain delay before it sets the driver (1114) in condition to turn off the switch S2 (1004). That overdrives the switch S2 (1004), allowing some negative current through it for time Δt2. The overdrive of the switch S2 (1004) is needed for primary feedback sensing. In terms of power processing, this overdrive does not compromise the efficiency of the converter 1000 as the energy will be returned to the bulk capacitor C (404) by the primary side of the transformer T (1002). Moreover, with more complicated power stage designs, this feature may be used for a primary S1 (403) switch softswitching, enabled by the secondary switch S2 (1004).

[0107] The sensing of the feedback signal on the primary side of the transformer T (1002) is illustrated by FIG. 12. Integrator I2 (1201) of the control Circuit CC1 (409) is connected to the primary winding W1 of the transformer T (1002) via a resistive divider (not shown). Integrator I2 (1201), logic L2 (1203), comparator C3 (1202), and winding W1 are performing the same voltseconds balancing identification as it was described in the secondary control circuit CC2 (1003). When the comparator C3 (1202) triggers logic L2 (1203), it is the best time to sense the output voltage as current in the secondary winding W2, it is very close to 0 volts, and internal voltage drops are eliminated. Overdrive of the switch S2 (1004) is intended to make the sense window wide enough not to require too high an accuracy from controllers CC1 (409) and CC2 (1004). Logic L2 (1203) activates sample and hold circuit SHA1 (1204) which samples the reflected to primary side output voltage, and applies it to the input of the error amplifier E1 (1205). In contrast, a graph of the reflected primary secondary voltage is presented in FIG. 13 for a prior art flyback transformer. FIG. 14 illustrates a graph of the primary secondary voltage for the converter 1000. In FIG. 13, there is only one instant when reflected voltage is equal to the output voltage. However accurate identification of this instant is practically impossible. An attempt to implement it may lead to a delayed measurement when voltage across the transformer collapsed, leading to gross error of the feedback representation of the output voltage. In FIG. 14, however, due to overdrive of the switch S2 (1004), the collapse of the voltage across the transformer T (1002) is delayed, giving to the controller CC1 (409) comfortable time to sample the reflected signal on winding W1 of the transformer T (1002).

[0108] Another embodiment of a converter 1500 in accordance with the present invention is illustrated in FIG. 15. A winding W4 (1502) is connected to the positive terminal of the bulk capacitor C (404) via an isolating diode D11 (1503). The second terminal of this winding W4 is connected to the cathode of diode D9 (901). An auxiliary switch S3 (1504) is connected between the ground node and the anode of diode D11 (1503). When switch S1 (403) turns off, energy stored in the leakage inductance of the primary winding W1 of the transformer T (1501) is transferred via diode D9 (901) into capacitors C1 (902) and C2 (903), and leakage inductance of the winding W1 resonates with capacitors C1 (902) and C2 (903). If further energy, stored in the core, is required to be recycled, the magnetizing inductance of the transformer T (1501) resonates with capacitors C1 (902) and C2 (903) through the winding W4 (1502) and switch S3 (1504). The switch S3 (1504) is bi-directional, allowing reverse flow of energy from capacitors C1 (902) and C2 (903) into the transformer core. At this time, switch S3 (1504) is opened, enabling a softswitching turn on of the switch S1 (403). Leakage energy of the winding W4 (1502) is returned back to the bulk capacitor C (404) via diodes D11 (1503) and D9 (901).

[0109] A converter 1600 implemented with N type MOSFET switches Q1 and Q3 is presented in FIG. 16. As illustrated, both switches Q1 (1601) and Q3 (1602) are connected with their sources to the ground node. This is a substantial advantage over the prior art when the auxiliary switch is located at high side, or a P channel MOSFET is used. In both cases of the prior art, a complicated driver of the auxiliary switch is required. In the converter 1600, driving both MOSFETs is quite simple.

[0110] Equivalent diagrams of the converter 1600 in FIG. 16 are presented in FIGS. 17a–17e, with their waveforms illustrated in FIG. 18. As we can see from the diagrams of FIG. 18, included in the converter 1600 is an active clamp circuit Q3 (1602), W4 (1502), D11 (1503), C1 (902), C2 (903) which enables leakage energy utilization from all involved windings and softswitching of the main and auxiliary switches. It may be designed in a such manner that it changes the shape of the secondary current: from a triangle current on FIG. 6d to a practically half sinusoidal on FIG. 18d, bringing down the secondary RMS current and losses and allowing blocking diode D7 (408) to turn off with 0 current and no ringing.

[0111] A converter 1900 illustrated in FIG. 19 has a flyback winding W5 (1902) connected through a diode D12 (1903) to the Vcc capacitor C3 (1901). The converter 1900 is another convenient way of generating Vcc voltage.

[0112] Another object of the invention is to provide an AC/DC converter with input current shaped by sinusoidal modulation and having voltage across the bulk capacitor constant when the amplitude of input voltage is variable. As it follows from equation (23) that can be achieved if input inductance values are being changed such that:

[0113] $\begin{array}{cc}\frac{V_m^2}{L}=\mathrm{const},\mathrm{or}L={\mathrm{aV}}_m^2& \left(39\right)\end{array}$

[0114] where a=const,

assuming the magnetizing inductance of the transformer Lm (405) is also constant.

[0115] The AC/DC converter 2000 illustrated in FIG. 20 with input current shaped by sinusoidal modulation has a rectifier D1–D4 (401), which is connected with its positive terminal to the first terminal of the input inductor L (2001), and with negative terminal to the ground node. The first terminal of the switch S1 (403) is connected to the second terminal of the input inductor L (2001) and positive terminal of the bulk capacitor C (404). The second terminal of switch S1 (403) is connected to the first terminal of the isolation transformer T (405) and the ground node. The second terminal of transformer T (405) is coupled with the negative terminal of the bulk capacitor C (404) via an isolating diode D5 (406), connected with its anode to the transformer T (405) and the cathode to the bulk capacitor C (404). The negative terminal of the bulk capacitor C (404) is connected to the first terminal of the inductor L (2001) via an isolating diode D6 (407), connected with its anode to the capacitor C (404) and its cathode to inductor L (2001). The secondary winding of the transformer T (405) is coupled to the load (412) via blocking diode D7 (408). The input inductor L (2001) has a secondary winding L(3), which is being used to magnetize the inductor L (2001) and change its inductance to maintain the validity of equation (39). The winding L3 is driven by a control circuit comprising the integrator I3 (2002), comparator C3 (2003), P channel FET Q4 (2004), peak detector Pk (2005), oscillator OSC3 (2006), averaging R—C Filter F (2007), and AND3 circuit (2008).

[0116] The peak detector Pk (2005) is connected to the AC input voltage and samples the amplitude of the input voltage. The output signal of the peak detector Pk (2005) is
V_pk=K₁V_m  (40)
The input of the integrator I3 (2002) is connected to the reference constant voltage. Output voltage of the integrator I3 (2002) is
V_i3=(K₂V_ref)t  (41)
The comparator C3 (2003) has a set signal equal to Vpk. When output of the integrator I3 (2002) reaches the value of Vpk, the comparator C3 (2003) triggers the logic to start the integrator I3 (2002) reset:
K₁V_m=(K₂V_ref)t  (42)
Finding t from equation (42):

[0117] $\begin{array}{cc}t=\frac{K_1{V}_m}{K_2{V}_{\mathrm{ref}}}& \left(43\right)\end{array}$
Average voltage at the output of Filter F (2007):

[0118] $\begin{array}{cc}\frac{V_{\mathrm{i3}}t}{T}=\frac{K_1{V}_m{K}_1{V}_m}{K_2{V}_{\mathrm{ref}}T}={\mathrm{KV}}_m^2& \left(44\right)\end{array}$
Where a constant coefficient K is equal to:

[0119] $\begin{array}{cc}K=\frac{K_{12}}{K_2{V}_{\mathrm{ref}}T}& \left(45\right)\end{array}$
where K₁ and K₂ are also constant coefficients.

[0120] P channel FET Q4 (2004) is working in the linear region regulating its conductance inversely proportional to the signal KV_m², applied at its gate. The on resistance of Q4 (2004):
RQ4=K₃V_m²  (46)
And magnetizing current in L(3):

[0121] $\begin{array}{cc}\mathrm{IL}\left(3\right)=\frac{\mathrm{Vcc}}{K_3{\mathrm{KV}}_m^2}& \left(47\right)\end{array}$
is exactly in compliance with equation (39) provided that inductance L(3) is inversely proportional to the magnetizing current, keeping V_c=const, while V_m changes.

[0122] Any of the switches S1–S3 in the above embodiments may be substituted by a selection of various types. For example, as illustrated in FIG. 21, MOSFETs (2101 and 2102) may be used as substitutes.

[0123] Yet another objective of the invention is to provide a switch mode AC/DC converter with input AC current shaped to limit high harmonics content and exclude low frequency ripple voltage from the output voltage. The proposed converter 2200 is illustrated in FIG. 22. An AC/DC rectifier (401) is connected to the first terminal of the input inductor L (402). Second terminal of the inductor L (402) is connected to the positive terminal of the bulk capacitor C (404) and two switches S4 (2202) and S5 (2203), with the first of them (S4 2202) coupled to the negative terminal of the rectifier and the second (S5 2203) to the first terminal of the isolation transformer Lm (405). Second terminal of the isolation transformer Lm (405) is coupled via a diode D5 (406) to the negative terminal of the bulk capacitor C (404). The secondary winding of the isolation transformer Lm (405) is configured in a flyback type of architecture.

[0124] Low frequency ripple appearing across the bulk capacitor C (404) is presented in FIG. 23. Average charging current +Ic within half of a cycle of input voltage is given by equation (32):

[0125] $\begin{array}{cc}+\mathrm{Ic}=\left(\frac{V_m{\mathrm{TD}}^2}{2L}\right)\sin \omega t& \left(48\right)\end{array}$
Charging capacitor C (404) with this current during half a cycle of input voltage t=π/w would give the following rise of voltage across this capacitor C (404):

[0126] $\begin{array}{cc}{V}_{\mathrm{cm}}+=\frac{V_{m}T\left(D^2\right)}{\omega \mathrm{LC}}& \left(49\right)\end{array}$
The discharging current −Ic is approximated by an average isolation transformer current:

[0127] $\begin{array}{cc}-\mathrm{Ic}=\frac{V_{c}T\left(D^2\right)}{2\mathrm{Lm}}& \left(50\right)\end{array}$
The peak discharge voltage by this current:

[0128] $\begin{array}{cc}{V}_{\mathrm{cm}}-=\frac{V_{c}T\left(D^2\right)}{2\omega \mathrm{LmC}}& \left(51\right)\end{array}$
Substituting Vm in (49) by Vc from (23), taking difference between Vc+ and Vc− at t=π/2ω, the expression of the relative to Vc amplitude of ripple V+ is found to be:

[0129] $\begin{array}{cc}V+r=V_c\left(\frac{T}{16\omega C}\right)\left(\frac{1}{\sqrt{\mathrm{LLm}}}-\frac{1}{2L}\right)& \left(52\right)\end{array}$
If a desired ripple is expressed in %, K %, then the correspondent value of capacitance C (404) will be:

[0130] $\begin{array}{cc}C=\left(\frac{T}{0.16K\%\omega }\right)\left(\frac{1}{\sqrt{\mathrm{LLm}}}-\frac{1}{2L}\right)& \left(53\right)\end{array}$

[0131] A numeric analysis of equation (53) shows that the values of C (404) are well within the limits used today in the AC/DC off-line converters with non sinusoidal AC input current. However, the converter 2200 in FIG. 22 corrects this problem. The control circuit CC4 (2201) coupled to switches S4 (2202) and S5 (2203) has two feedbacks which control switches S4 (2202) and S5 (2203) separately: slow S4 (2202) and fast S5 (2203). In average, both duty cycles are equal, however in the area “a”, see FIG. 24, where the instantaneous voltage across the capacitor C (404) is less than average Vc, the duty ratio of switch S5 (2203) is higher than switch S4 (2202). In the area “b”, when the instantaneous voltage across capacitor C (404) is over Vc, the duty ratio of switch S5 (2203) is smaller than for switch S4 (2202).

[0132] The converter 2200 in FIG. 22 is a single stage two switch AC/DC converter. It should be noted that each of the switches S4 (2202) and S5(2203) carries only its circuit share of current, while S1 (403) in the converter 400 of FIG. 4 is stressed by a sum of both currents.

[0133] Switches S4 (2202) and/or S5 (2203) may be substituted with other adequate devices, such as N-channel MOSFETs.

[0134] Foregoing described embodiments of the invention are provided as illustrations and descriptions. They are not intended to limit the invention to precise form described. In particular, it is contemplated that functional implementation of invention described herein may be implemented equivalently in hardware, software, firmware, and/or other available functional components or building blocks, and that networks may be wired, wireless, or a combination of wired and wireless. Other variations and embodiments are possible in light of above teachings, and it is thus intended that the scope of invention not be limited by this Detailed Description, but rather by Claims following.