Error correction method, apparatus and program product

[0001] The present disclosure relates to the subject matter contained in Japanese Patent Application No. 2002-349563 filed on Dec. 2, 2002, which is incorporated herein by reference in its entirety.

[0002] 1. Field of the Invention

[0003] The present invention relates to an error correction method, an apparatus and a program product for performing error correction for data.

[0004] 2. Description of the Related Art

[0005] Data recorded on a disk such as a DVD (Digital Versatile Disc) include data (ECC: Error Correction Code) blocks, wherein correction codes have been added to original data, and when the data are read from the disk, error corrections are performed for all the ECC blocks. An ECC block, which is the minimum data recording unit, is composed of user data in 16 sectors of 2048 bytes each, a total memory capacity of 32 K bytes, and includes added error codes. By performing an error correction for each ECC block, the reliability of the data can be improved. In an ECC block, each row includes 182 bytes and each column includes 208 bytes, and the error correction can be performed for up to five bytes in one row. When there is an error exceeding five bytes in a row, the row is defined as an error correction incapable row. This error correction process is performed for all 208 rows (hereinafter referred to a C1 error correction). And when there is an error exceeding 16 bytes in one column, this column is defined as an error correction incapable column. This error correction process is performed for all 182 columns (hereinafter referred to as a C2 error correction).

[0006] A disk reproduction apparatus, which reduces the data, to which the ECC data has been added, recorded on a disk, performs an error correction process for each ECC block, and performs other processes, such as data decompression, and outputs an audio signal and a video signal.

[0007] However, since the error correction process is conventionally limited to a predetermined single type, EDC (Error Defection Code) errors tend to occur frequently when the quality of the data is poor, and deterioration of the error correction capability occurs.

[0008] The invention was made in view of such a conventional circumference and an object of the invention is to solve a problem of an occurrence of a deterioration of the error correction capability.

[0009] In order to achieve the object, according to a first aspect of the invention, there is provided an error correction method for performing error correction for data to which error correction data have been added, the method including: selecting a first error correction algorithm from a plurality of error correction algorithms having different correction strengths; employing the selected first error correction algorithm to perform error correction for the data; determining whether or not the first error correction algorithm is capable of correcting errors in the data; selecting a second error algorithm from the plurality of error correction algorithms when it is determined that the first error correction algorithm is not capable of correcting errors in the data; and employing the selected second error correction algorithm to perform error correction for the data.

[0010] According to a second aspect of the invention, there is provided an error correction apparatus for performing error correction for data to which error correction data have been added, including: an error correction unit configured to perform error correction for the data using a first error correction algorithm that has been selected from among a plurality of error correction algorithms having different correction strengths; a determination unit configured to determine whether or not the error correction for the data using the first error correction algorithm is capable; and a controlling unit configured to select a second error correction algorithm from the plurality of error correction algorithms and to control the error correction unit to perform error correction using the second error correction algorithm, for the data in which determined that the error correction using the first error correction algorithm is incapable.

[0011] According to a third aspect of the invention, there is provided an error correction program product for causing a computer system to execute procedures for performing error correction for data to which error correction data have been added, the program product including: a unit for selecting a first error correction algorithm from a plurality of error correction algorithms having different correction strengths; a unit for employing the selected first error correction algorithm to perform error correction for the data; a unit for determining whether or not the first error correction algorithm is capable of correcting errors in the data; a unit for selecting a second error algorithm from the plurality of error correction algorithms when it is determined that the first error correction algorithm is not capable of correcting errors in the data; and a unit for employing the selected second error correction algorithm to perform error correction for the data.

[0015] A preferred exemplary embodiment of the present invention will now be described.

[0016] FIG. 1 is a block diagram showing the configuration of a reproduction system in which an error correction apparatus according to the present invention is mounted. In the error correction apparatus, as shown in FIG. 1, a spindle motor 2 rotates a disk 1 on which data are recorded, and a pickup 3 located near the disk 1 optically reads the data.

[0017] The data recorded on the disk 1 are read by the pickup 3 and outputted to the RF equalizer (RFEQ) 4. The RF equalizer 4 corrects variance of frequency characteristic, which occurs due to changes in the inner and outer speeds of the disk 1 relative to the speed of the pickup 3, included in the data output from the pickup 3. The data output from the RF equalizer 4 is inputted to an error correction circuit 6 via a binarization circuit 5 and being performed an error correction by the error correction circuit 6. A decoder 7 decodes the data output from the error correction circuit 6 and outputs the decoded data as audio or video output.

[0018] An error determination unit 8a for a computer (hereinafter referred to as a microcomputer) 8 employs the output of the error correction circuit 6 to determine whether there are error correction incapable data. Then, the microcomputer 8 permits the error correction circuit 6 to perform an error correction based on an error correction algorithm, which is selected from among a plurality of error correction algorithms having different correction strengths.

[0019] A plurality of error correction algorithms having different correction strengths are set up in the error correction circuit 6. Upon the reception of a control signal from the microcomputer 8, the error correction circuit 6 selects one of the error correction algorithms and performs the error correction.

[0020] Assuming that the error correction algorithm being selected at the time the error correction has occurred is a first error correction algorithm, and the error correction algorithm selected by the microcomputer 8 after an error has occurred is a second correction algorithm, there are three possible cases: a case wherein the second error correction algorithm in which the correction strength is greater than that in the first error correction algorithm, is selected; a case wherein the first error correction algorithm is selected as the second error correction algorithm; and a case wherein an error correction algorithm in which correction strength having one level higher than that in the previous algorithm (the first error correction algorithm), is selected one after another as the second algorithm. To select the second algorithm, the correction strength of which is greater than is that of the first error correction algorithm, the level of the error correction algorithm to be selected can be appropriately chosen in accordance with the error correction results (the number of incapable data sets, and the error rate), which represent the effects produced by the error correction. The microcomputer 8 obtains the error correction incapable data from the error correction circuit 6, and permits the error correction circuit 6 to repeat the selection of the error correction algorithms a plurality of times, until all error corrections have been completed.

[0021] The error correction algorithm is a combination of a C1 error correction performed in the direction of the rows and a C2 error correction performed in the direction of the columns. By changing the times and the directions in which the error corrections are made, different error correction algorithms having a variety of correction strengths can be generated. In the embodiment, the following error correction algorithms are set in the error correction circuit 6: level 1 (C1 to C2), to perform a C2 error correction following a C1 error correction; level 2 (C2 to C1), to perform a C1 error correction following a C2 error correction; level 3 (C1 to C2 to C1), to perform a C2 error correction following a C1 error correction, and to then perform a C1 error correction; level 4 (C2 to C1 to C2), to perform a C1 error correction following a C2 error correction, and to then perform a C2 error correction; and level 5 (C1 to C2 to C1 to C2), to perform a C2 error correction following a C1 error correction, and to then perform a C2 error correction following the C1 error correction. That is, the correction strength is changed by multiplying the times error corrections are performed and the error correction directions are changed. As the number of repetitions for the C1 error corrections and the C2 error corrections is increased, the probability that the data will be corrected is also increased, or as the error corrections are initiated, beginning with the direction of columns wherein there are a larger number of bytes, the probability that correction errors will be removed is also increased. The correction strength is incremented step by step in the ascending order, beginning at level 1, the error correction algorithm having the lowest correction strength, while level 5 is the error correction algorithm having the highest correction strength.

[0022] FIG. 2 is a flowchart showing an example of an error correction method applied to the reproduction system described above. While referring to FIG. 2, an explanation will be given for the processing whereby, in accordance with the detected number of error correction incapable data, an error correction algorithm having high correction strength is selected and employed to perform error correction. First, the microcomputer 8 fetches, from the error correction circuit 6, an ECC block of error correction disabling information (EDC error), and detects from the C1 error correction results in the ECC block the total number of error corrections and the number of correction incapable rows, and detects from the C2 error correction results the total number of error corrections and the number of correction incapable columns. As a result, the quality of the data can be obtained by referring to the number of error corrections and the number of correction incapable columns. The error rate calculated using the number of error corrections and the number of correction incapable data sets may also be employed to obtain the data quality.

[0023] During the processing, an error correction method and level 1 (C1 to C2), the initial value for an error count, are set (step S1). Then, the current level set for the error correction circuit 6 is examined to set a new level (step S2). When level 5, which is the highest correction strength, is detected, level 1 is set, and the error correction algorithm at this level is employed to perform the error correction for the data read from the disk 1. During this error correction process, the C1 error correction (error correction performed in the direction of rows) and the C2 error correction (error correction performed in the direction of columns) are repeated.

[0024] Next, the microcomputer 8 permits the error determination unit 8a to detect an EDC error, and determines whether there is a data error (step S3). When there is no data error, the error correction algorithm for the current level is set for the error correction circuit 6 (step S4). Since the error correction algorithm with which the data error correction has been completed is held, the probability that a data error will occur at the next error correction can be reduced.

[0025] In a case where a data error occurs, the retry count is examined (steps S5 and S6). And when the retry count is two or greater, it is assumed that the quality of the data is poor, so that the data are forcibly discharged and the retry count and level 1 are set (step S7). Thereafter, the error correction is performed for the next ECC block.

[0026] When the retry count is one, and when the number of error correction incapable data sets in the ECC block is five or less (step S8), an error correction algorithm having correction strength one level higher than that in the error correction algorithm set at step S2 is designated (step S9). When the number of error correction incapable data sets is between six and 10 (step S10), an error correction algorithm having correction strength two levels higher than that in the error correction algorithm set at step S2 is designated (step S11). When the number of error correction incapable data sets is between 11 and 50 (step S12), an error correction algorithm having correction strength three levels higher than that in the error correction algorithm set at step S2 is designated (step S13). When the number of error correction data sets exceeds 50, an error correction algorithm having correction strength four levels higher than that in the error correction algorithm set at step S2 is designated (step S14). In the embodiment, since error correction algorithms having levels higher than level 5 are not prepared, an error correction algorithm at level 5 is set when the level reaches 6. The retry count is also incremented by one when the higher error correction algorithm is set. The C1 error correction and the C2 error correction are repeated by using error correction algorithms having different correction strengths, and in accordance with the selected error correction algorithms, error corrections are performed beginning with both the direction of the rows in the ECC error correction block and the direction of the columns in the ECC error correction block.

[0027] When an error correction has been performed using a new correction algorithm having a different correction strength, and when a data error is still detected at step S3, the second retry count is examined at step S6, and the same process as that for the first retry count is performed from step S15 to step S21.

[0028] During the above error correction processing, between the first retry count and the second retry count, the correction algorithm is selected in accordance with the same contents. However, the correction algorithm may be selected based on different contents, e.g., the correction algorithm may be selected while the number of error correction incapable data sets is changed.

[0029] In the embodiment, error correction has been performed for the same data. However, the error correction may be performed by again reading data from the disk 1. For the re-reading of data, the microcomputer 8 transmits a control signal to the servo controller 9 to instruct the re-reading of data (see FIG. 1). Based on the control signal, servo control for the spindle motor 2 and the pickup 3 is provided by the servo controller 9 for the re-reading of the data.

[0030] During the error correction processing accompanying the re-reading of data, when error correction based on the error correction algorithm at level 1 is not satisfactory, a newly set error correction algorithm at level 2 is employed to perform the error correction. When the error correction based on the error correction algorithm at level 2 is still not satisfactory, the same data are again read from the disk and the error correction for the data is again performed using the same error correction algorithm at level 2, while in the embodiment, the quality of the data is regarded as poor and the data are forcibly discharged at step S7. Thereafter, as well as in the embodiment for the invention, the error correction is repeated by sequentially employing error correction algorithms having higher levels of correction strength.

[0031] As another method, there may be configured that when the number of correction incapable data sets or the error rate exceeds a predetermined threshold value, it is assumed that the data error occurred due to such causes as vibrations or scratches, and the error correction is performed for data re-read from the disk. When the number of correction incapable data sets or the error rate is equal to or smaller than the predetermined threshold value, the re-reading of data is not performed and the error correction is performed in the same manner as in the embodiment.

[0032] In the embodiment of the invention, the error correction has been performed for data read from a DVD. However, the same error correction process can be performed for data read from a CD. It should be noted, however, that since the error correction for a CD is performed for each frame instead of for each block, at level 1, a maximum of two symbols, for both the C1 error and the C2 error, are regarded as correctable for one frame (C1 double and C2 double). Similarly, at level 2, a maximum of two symbols for the C1 error and a maximum of three symbols for the C2 error are regarded as correctable for one frame (C1 double and C2 triple). At level 3, a maximum of two symbols for the C1 error and a maximum of four symbols for the C2 error are regarded as correctable for one frame (C1 double and C2 quadruple). The data error correction performed for the CD can be performed in the same manner by replacing, during a unit hour and during the DVD data error correction processing, the number of correction incapable data sets at steps S8, S10, S12, S15, S17 and S19 with the C1 error or the C2 error.

[0033] As is described above, according to the embodiment, a plurality of error correction processes having different correction strengths can be employed together to perform the error correction, and to thus improve the error correction capability.

[0034] Although the present invention has been shown and described with reference to a specific preferred embodiment, various changes and modifications will be apparent to those skilled in the art from the teachings herein. Such changes and modifications as are obvious are deemed to come within the spirit, scope and contemplation of the invention as defined in the appended claims.