Active clamping circuit and power supply system using the same

[0001] This Nonprovisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No(s). 092126596 filed in Taiwan, Republic of China on Sep. 26, 2003, the entire contents of which are hereby incorporated by reference.

[0002] 1. Field of the Invention

[0003] The present invention relates to active clamping circuits, and more particularly, to an active clamping circuit applicable to a DC-to-DC conversion circuit.

[0004] 2. Description of the Related Art

[0005] FIGS. 1a and 1b show a conventional step-down (buck) DC-to-DC conversion circuit 10. In the DC-to-DC conversion circuit 10 is coupled to an input voltage Vin and outputs an output voltage V_CORE to a load LD. In the DC-to-DC conversion circuit 10, the switching devices S₁ and S₂ are switched alternately to maintain the output voltage V_CORE at a predetermined voltage, such as 1.35V. When the output voltage V_CORE is lower than the predetermined voltage, the switching device S₁ is turned on and the switching device S₂ is turned off such that the input voltage Vin charges the capacitor C_o to pull high the output voltage V_CORE. On the contrary, when the output voltage V_CORE is higher than the predetermined voltage, the switching device S₁ is turned off and the switching device is turned on such that the input voltage Vin stops charging the capacitor C_o.

[0006] Transient responses, however, typically occur when the load LD varies greatly, such as when the CPU is switched to suspend mode from normal mode or when the CPU is switched to suspend mode from suspend mode. As shown in FIG. 1a, for example, when the CPU is switched to normal mode from suspend mode, the load LD is transferred from a light to a heavy load such that the output voltage V_CORE is instantly pulled low. Thus, the switching device S₁ is turned on and the switching device S₂ is turned off such that the capacitor C_o is charged by the input voltage Vin to pull high the output voltage V_CORE. The rate of change in the inductor current i_L is

[0007] $\frac{d_{\mathrm{iL}}}{dt}=\frac{\mathrm{Vin}-V_{\mathrm{CORE}}}{L}.$
As shown in FIG. 1b, when the CPU is switched to suspend mode from normal mode, namely the load LD is transferred from a heavy to a light load such that the output voltage V_CORE is instantly pulled high. Thus, the output voltage is instantly pulled high such that the switching device S₁ is turned off and the switching device S₂ is turned on to discharge the output voltage V_CORE to the predetermined voltage by the switching device S₂. The rate of change in the inductor current i_L is

[0008] $\frac{d_{\mathrm{iL}}}{dt}=\frac{-V_{\mathrm{CORE}}}{L}.$

[0009] When the load LD is transferred from a heavy to a light load (step-down period), however, the current rate is much smaller than that from light to heavy (step-up period) because the output voltage V_CORE is much higher than the input voltage Vin in the conversion circuit 10. That is, the conversion circuit 10 has poor transient responses when load LD is transferred from a heavy to a light load (step-down period).

[0010] It is therefore an object of the present invention to pull low the voltage overshoot in the output voltage of a DC-to-DC conversion circuit by an active clamping circuit when the load is transferred from a heavy to a light, thereby improving the transient response of the conversion circuit.

[0011] According to the above mentioned object, the present invention provides an active clamping circuit to pull low the voltage overshoot in the output voltage thereby improving transient response of the DC-to-DC conversion circuit, and to retrieve discharge current by a conductive path when the load is transferred from a heavy to a light load.

[0012] According to the above mentioned object, the present invention provides an active clamping circuit applicable to a DC-to-DC conversion circuit, wherein the DC-to-DC conversion circuit has an output terminal to supply an output voltage to a load. In the active clamping circuit, a determining circuit is coupled to the DC-to-DC conversion circuit to detect the output voltage and to output a first enable signal when the output voltage is higher than a first predetermined voltage. A voltage adjustment circuit is coupled to the determining circuit to pull low the output voltage according to the first enable signal. An inductor has a first end coupled to the output terminal of the DC-to-DC conversion circuit, and a diode is coupled between the inductor and an input terminal of the DC-to-DC conversion circuit. The voltage adjustment circuit pulls voltage overshoot in the output voltage low when the output voltage is higher than the first predetermined voltage when the load is transferred from a heavy to a light load, thereby improving the transient response of the conversion circuit. Further, the active clamping circuit provides a conductive path by a diode to channel discharge current to the input terminal of the DC-to-DC conversion circuit.

[0018] FIG. 2 shows a power conversion system 100 with an active clamping load according to the preset invention. As shown in FIG. 2, a buck DC-to-DC conversion circuit 10 is composed of inductors L₁ and L₀, capacitors C₁ and C₀ and switching devices S₁ and S₂, and converts the input voltage Vin, such as 12V, into an output voltage V_CORE to the load LD. The switching devices S₁ and S₂ are switched alternately to maintain the output voltage V_CORE at a predetermined voltage, such as 1.35V. For example, when the output voltage V_CORE is lower than 1.3V, the switching device S₁ is turned on and the switching device S₂ is turned off such that the capacitor C₀ is charged by the input voltage Vin. When the output voltage V_CORE is higher than 1.4V, the switching device S₁ is turned off and the switching device S₂ is turned on such that the capacitor C₀ is not charged by the input voltage Vin.

[0019] The active clamping circuit 20 has a voltage adjustment circuit 22 and a determining circuit 24. The voltage adjustment circuit 22 and the determining circuit are both coupled to the output terminal of the DC-to-DC conversion circuit 10. The determining circuit 24 detects the output voltage V_CORE, and outputs a first enable signal En to enable the voltage adjustment circuit 22 when the output voltage is higher than a first predetermined voltage, such as 1.8V, because the load LD is transferred from a heavy to a light load. The voltage adjustment circuit 22 pulls low the output voltage V_CORE according to the first enable signal En.

[0020] In this embodiment, the voltage adjustment circuit 22 includes a switching transistor S₄ and a driver 23. The driver 23 is composed of an NPN transistor Q₁, a PNP transistor Q₂ and a resistor R₅, and turns on the switching device S₄ to pull low the output voltage V_CORE according to the first enable signal En.

[0021] The determining circuit 24 includes a comparator 25 and a detection circuit 26, wherein the detection circuit 26 is composed of resistors R₁˜R₃ and a capacitor C₂, and resistors R₁ and R₂ both have one end coupled to the output terminal of the DC-to-DC conversion circuit 10. The detection circuit 24 produces a first voltage V₁ and a second voltage V₂ according to the output voltage V_CORE. The first voltage V₁ varies instantly with the output voltage V_CORE because the first voltage V₁ is a divided voltage of the output voltage V_CORE by the resistors R₁ and R₃. The second voltage V₂ does not vary instantly with the output voltage V_CORE because the second voltage V₂ is a voltage stored in the capacitor C₂. In this case, the detection circuit is designed so that the first voltage V₁ is higher than the second voltage V₂ when the output voltage V_CORE is higher the first predetermined voltage, such as 1.8V. The comparator 22 is coupled to the first voltage V₁ and the second voltage V₂, and outputs the first enable signal En such that the switching device S₄ is turned on by the driver 23 when the first voltage V₁ is higher than the second voltage V₂.

[0022] In this embodiment, the load LD, for example, is a central processing unit (CPU). The load is transferred from a light load to a heavy such that the output voltage V_CORE drops instantly when CPU is switched to normal mode from suspend mode. Thus, the switching device S₁ is turned on and the switching device S₂ is turned off such that the capacitor C₀ is charged by the input voltage Vin thereby pulling high the output voltage V_CORE.

[0023] On the contrary, the load is transferred from a heavy to a light load such that the output voltage V_CORE is raised instantly (voltage overshoot) when the CPU is switched to suspend mode from normal mode. Thus, the switching device S₁ is turned off and the switching device S₂ is turned on such that the output voltage V_CORE is discharged slowly by the switching device S₂. At the same time, the active clamping circuit 20 pulls the output voltage V_CORE low when the output voltage V_CORE is higher than a first predetermined voltage, such as 1.8V, thereby improving the transient response of the power supply system 100.

[0024] FIG. 3 shows the relationship of the output voltage V_CORE and the operation of switching transistor S₄ according to the present invention. In the power supply system 100, the detection circuit 26 is coupled to the output terminal of the conversion circuit 10, the first voltage V₁ may be higher than the second voltage V₂ when the output voltage V_CORE is higher than the first predetermined voltage (1.8V). Thus, the comparator 25 outputs the first enable signal En to enable. the switching device S₄. At this time, energy stored in the inductor L₀ may be dissipated to ground by the switching device S₄ and inductor L₂, and thus, the output voltage V_CORE decreases. On the contrary, the comparator 25 stops outputting the first enable signal En such that the switching device S₄ is turned off when the first voltage V₁ is smaller than second voltage V₂. At this time, the voltage at the anode of the diode D₁ is increased by energy stored in the inductor L₂ because the current flowing through the inductor L₂ does not vary instantly. The diode D₁ is turned on to produce a conductive path between the inductor L₂ and the input terminal V₁′ of the DC-to-DC conversion circuit 10 when the voltage difference across the anode and cathode of the diode D1 is higher than the threshold voltage thereof. The energy stored in the inductor L₂ can be channeled to the input terminal V₁′ until the power conversion system 100 becomes stable. It is noted that, at this time, the output voltage V_CORE is smaller than the first predetermined voltage (1.8V) but still higher than 1.3V. Thus, the switching device S₁ is not turned on.

[0025] FIG. 4 is a diagram comparing the transient responses of DC-to-DC conversion circuits in the present invention with in the related art when the load is transferred from a heavy to a light load. The curve C_r1 shows the variation of the output voltage when the load is transferred from a heavy to a light load in the DC-to-DC conversion. The curve C_r2 shows the variation of the output voltage V_CORE when the load is transferred from a heavy load to a light load according to the present invention. As shown in FIG. 4, the present invention can dissipate energy stored in the inductor L₀ more rapider than the related art, and the load transient response thereof is improved. Furthermore, the present invention can channel the dissipated energy to the input terminal of the DC-to-DC conversion circuit, thereby improving the performance of the power conversion system. In the present invention, the DC-to-DC conversion circuit can be a buck DC-to-DC conversion circuit, a boost DC-to-DC conversion circuit and the like.

[0026] While the invention has been described by way of example and in terms of the preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.