Method and apparatus for dynamically generating lookup words for content-addressable memories

[0001] This invention relates to communications and computer devices, especially routers and packet switching systems; and more particularly, the invention relates to dynamically generating lookup words for use by content-addressable memory devices, especially in the context of packet classification.

[0002] The communications industry is rapidly changing to adjust to emerging technologies and ever increasing customer demand. This customer demand for new applications and increased performance of existing applications is driving communications network and system providers to employ networks and systems having greater speed and capacity (e.g., greater bandwidth). In trying to achieve these goals, a common approach taken by many communications providers is to use packet switching technology. Increasingly, public and private communications networks are being built and expanded supporting various packet technologies, such as Asynchronous Transfer Mode (ATM) and Internet Protocol (IP).

[0003] A network device, such as a switch or router, typically receives, processes, and forwards or discards a packet based on one or more criteria, including the type of protocol used by the packet, addresses of the packet (e.g., source, destination, group), and type or quality of service requested. Additionally, one or more security operations are typically performed on each packet. But before these operations can be performed, typically a packet classification operation must be performed on the packet to determine how to manipulate the received packet.

[0004] Packet classification as required for, inter alia, access control lists (ACLs) and forwarding decisions, is a demanding part of switch and router design. The packet classification of a received packet is increasingly becoming more difficult due to ever increasing packet rates and number of packet classifications. For example, ACLs require matching packets on a subset of fields of the packet flow label, with the semantics of a sequential search through the ACL rules. IP forwarding requires a longest prefix match.

[0005] Known approaches of packet classification use custom application-specific integrated circuits (ASICs), custom circuitry, software or firmware controlled processors, binary content-addressable memories (CAMs) and ternary content-addressable memories (TCAMs). The use of programmable software or firmware have advantages as they provide some level of flexibility, which becomes especially important as new protocols and services are added to existing network. Customer typically desire to use their existing hardware (e.g., routers, switches etc.) to support these new protocols and services. However, known software and firmware implementations are relatively slow, and typically place a performance bound which may be incompatible with new requirements. CAMS and TCAMs are increasingly being used in packet classification especially because of their performance, but known systems incorporating CAMs and TCAM are not flexible enough to support new protocols and applications, especially because their inputs are typically designed to provide only the needed data inputs for handling known protocols and applications. Needed are new methods and systems which are fast and adaptable to new protocols and applications.

[0006] Systems and methods are disclosed for generating a lookup word for use by a content-addressable memory, especially for using in classifying a set of information. One embodiment includes a programmable lookup word generator which receives the set of information and produces a result. The programmable lookup word generator of one embodiment includes a profile memory for storing a set of instructions for generating the result and a selection mechanism for selecting portions of the set of information in response to the set of instructions. A content-addressable memory typically receives the result and generates one or more indications.

[0012] Methods and apparatus are disclosed for using a programmable lookup word generator to produce a lookup word for use by a content-addressable memory. Embodiments described herein include various elements and limitations, with no one element or limitation contemplated as being a critical element or limitation. Each of the claims individually recite an aspect of the invention in its entirety. Moreover, some embodiments described may include, but are not limited to, inter alia, systems, networks, integrated circuit chips, embedded processors, ASICs, methods, and computer-readable medium containing instructions. The embodiments described hereinafter embody various aspects and configurations within the scope and spirit of the invention.

[0013] As used herein, “content-addressable memory” or “CAM” refers to an associative memory, including, but not limited to ternary and binary content-addressable memory, or mechanisms using hash tables, TRIEs, etc. that perform the functionality of a content-addressable memory (e.g., performs a lookup operation to identify one or more entries whose value matches an input lookup word if a match exits in the content-addressable memory, in contrast to a random access memory (RAM) lookup operation which retrieves a value based on an address in the RAM). The term “packet” refers to packets of all types, including, but not limited to, fixed length cells and variable length packets, each of which may or may not be divisible into smaller packets or cells. Moreover, these packets may contain one or more types of information, including, but not limited to, voice, data, video, and audio information. Furthermore, the term “system” is used generically herein to describe any number of components, elements, sub-systems, devices, packet switch elements, packet switches, routers, networks, computer and/or communication devices or mechanisms, or combinations of components thereof. The term “computer” is used generically herein to describe any number of computers, including, but not limited to personal computers, embedded processors and systems, control logic, ASICs, chips, workstations, mainframes, etc. The term “device” is used generically herein to describe any type of mechanism, including a computer or system or component thereof. The terms “task” and “process” are used generically herein to describe any type of running program, including, but not limited to a computer process, task, thread, executing application, operating system, user process, device driver, native code, machine or other language, etc., and can be interactive and/or non-interactive, executing locally and/or remotely, executing in foreground and/or background, executing in the user and/or operating address spaces, a routine of a library and/or standalone application, and is not limited to any particular memory partitioning technique. The terms “network” and “communications mechanism” are used generically herein to describe one or more networks, communications mediums or communications systems, including, but not limited to the Internet, private or public telephone, cellular, wireless, satellite, cable, local area, metropolitan area and/or wide area networks, a cable, electrical connection, bus, etc., and internal communications mechanisms such as message passing, interprocess communications, shared memory, etc. The terms “first,” “second,” etc. are typically used herein to denote different units (e.g., a first element, a second element). The use of these terms herein does not necessarily connote an ordering such as one unit or event occurring or coming before the another, but rather provides a mechanism to distinguish between particular units. Moreover, the phrase “based on x” is used to indicate a minimum set of items x from which something is derived, wherein “x” is extensible and does not necessarily describe a complete list of items on which the operation is based. Additionally, the phrase “coupled to” is used to indicate some level of direct or indirect connection between two elements or devices, with the coupling device or devices modify or not modifying the coupled signal or communicated information.

[0014] Methods and apparatus are disclosed for using a programmable lookup word generator to produce a lookup word for use by a content-addressable memory. In one embodiment, the programmable lookup word generator includes a profile memory that contains instructions on how to build a particular lookup word. The programmable lookup word generator receives a set of information and other operands typically including a profile selection. Based on the profile selection, a set of instructions is retrieved from the profile memory. Control logic uses this set of instructions to build the lookup word by extracting portions of the received information and other operands, and ordering these extracted portions and possibly supplementing with additional information or fields to build the lookup word. The lookup word is then used by a CAM, typically to classify the received set of information and other operands. In one context, the set of information includes a packet or packet header, and the CAM produces a packet classification indication in a communication or computer system.

[0015] FIG. 1 illustrates one embodiment of a programmable lookup word generator 103 used in a computer or communications system, including, but not limited to a router or packet switching system. Programmable lookup word generator 103, especially when used in the context of a packet classification system, receives as input a packet or packet header 101 and other operands 102 (e.g., service or routing information, type or quality of service, etc.). In one embodiment, other operands 102 includes a profile selection to identify which of multiple pre-programmed operations are to be performed to generate the particular lookup word from the received information. Programmable lookup word generator 103 produces lookup words 104 which are typically used for subsequent processing. In the embodiment illustrated in FIG. 1, one or more CAMs 105 (e.g., binary or ternary CAMs or other associative memories) use lookup words 104 to generate packet classification results 106.

[0016] FIG. 2 illustrates one embodiment of a programmable lookup word generator 200. Programmable lookup word generator 200 may be part of a computer or communications system, including, but not limited to a packet switching system, router, etc. As shown, programmable lookup word generator 200 comprises a processor 201, memory 202, storage devices 203, lookup word registers 204 (which will contain the resulting lookup words 213), and packet buffer and operand interface 205 (to receive other operands 211 and packet header 212 in one embodiment), which are electrically coupled via one or more communications mechanisms 209 (shown as a bus for illustrative purposes). Various embodiments of programmable lookup word generator 200 may include more or less elements.

[0017] The operation of programmable lookup word generator 200 is typically controlled by processor 201 using memory 202 and storage devices 203. Memory 202 is one type of computer-readable medium, and typically comprises random access memory (RAM), read only memory (ROM), integrated circuits, and/or other memory components. Memory 202 typically stores computer-executable instructions to be executed by processor 201 and/or data which is manipulated by processor 201 for implementing functionality in accordance with the invention. Storage devices 203 are another type of computer-readable medium, and typically comprise disk drives, diskettes, networked services, tape drives, and other storage devices. Storage devices 203 typically store computer-executable instructions to be executed by processor 201 and/or data which is manipulated by processor 201 for implementing functionality in accordance with the invention.

[0018] As used herein and contemplated by the invention, computer-readable medium is not limited to memory and storage devices; rather computer-readable medium is an extensible term which may include other tangible storage mechanisms.

[0019] In one embodiment, memory 202 or storage devices 203 is pre-programmed with instructions to be used by processor 201 in producing lookup words 213. A packet header 212 (or packet or a set of information) is received along with optional other operands 211 by packet buffer and operand interface 205. In one embodiment, other operands 211 include a profile selection to identify a set of processing operations to be performed in generating lookup words 213. Processor 201 (or control logic), in response to instructions stored in memory 202 or storage devices 203 and possibly in response to other operands 211, generates lookup words 213 based on packet header 212 and other operands 211 and stores the result in lookup word registers 204. Lookup words 213 are retrieved from lookup word registers 204 and exported for further processing.

[0020] The flow diagram illustrated in FIG. 3 further illustrates the operation of one embodiment of a programmable lookup word generator. Processing begins at process block 300, and proceeds to process block 302, wherein the profile memory is programmed with multiple sets of instructions. Process blocks 304–310 are then repetitively performed to generate lookup words based on newly received information. In process block 304, a set of information is received (e.g., in a packet, packet header, or via some other communications or memory retrieval mechanism, etc.), which includes a profile identification. Next, in process block 306, a set of instructions is received from the profile memory based on the received profile identification. In process block 308, the set of information is manipulated in response to the retrieved set of instructions to generate the lookup word, and in process block 310, the generated lookup word is exported to a content-addressable memory.

[0021] FIG. 4A illustrates an embodiment of a programmable lookup word generator 400. Profile memory 410 is preprogrammed over programming line 403 (or via some other known or future developed memory update mechanism) to contain instructions for generating the resultant lookup word fields 420. Programmable lookup word generator 400 may be used in many applications, such as packet classification in a computer or communications device. In this context, programmable lookup word generator 400 typically receives a packet header or packet 401, other operands 402 (e.g., service or routing information, type or quality of service, etc.) and/or constants that are programmed in profile memory 410 (or via some other mechanism) in building lookup words 430. Typically, other operands 402 includes a profile selection 402A, although this may be included in any other input or provided or determined by another mechanism.

[0022] Based on profile selection 402A, profile memory 410 generates an output set of instructions 411A which is transmitted to shift unit 412 (or another known or future developed data manipulation unit.) In one embodiment, shift unit 412 includes shift logic control 413 and shift logic 414. Profile memory 410 controls multiplexer 404 via control signal or instructions 411C, which is used to select which input, packet header or packet 401 or other operands 402, is provided at what time to shift unit 412. Responsive to the output set of instructions 411A and 411B, lookup word matrix of registers 425 and shift logic 414 (controlled by shift logic control 413) extract and arrange data from packet or packet header 401 and received other operands 402 to generate lookup words 426. Typically, when multiple lookup words 426 are simultaneously generated, then lookup words 426 are stored in a queue 427 and sequentially exported as lookup words 430.

[0023] FIG. 4B further illustrates one embodiment of the coordinated operation of shift logic 414 and lookup word matrix of registers 425. Lookup word matrix of registers 425 of one embodiment includes multiple words 451–459 (e.g., banks of registers) which are enabled in response to the values of word control vector 440 (over control lines 441) and bit control vector 444 (over control lines 445). Fields of received packets or information are stored in shift logic 414, with their position within shift logic 414 being adjustable. The values of shift logic 414 as well as word control vector 440 and bit control vector 444 (retrieved from profile memory 410 shown FIG. 4A) are controlled in a programmatic manner. Based on the values of word control vector 440 and bit control vector 444, individual bit positions of shift logic 414 are simultaneously copied into one or more words 451–459. By appropriately programming profile memory 410 shown in FIG. 4A, a lookup word can be generated from any received field or bit position within such field, and multiple lookup words can be dynamically and generated simultaneously and/or in a streamlined and efficient manner.

[0024] In view of the many possible embodiments to which the principles of our invention may be applied, it will be appreciated that the embodiments and aspects thereof described herein with respect to the drawings/figures are only illustrative and should not be taken as limiting the scope of the invention. For example and as would be apparent to one skilled in the art, many of the process block operations can be re-ordered to be performed before, after, or substantially concurrent with other operations. Also, many different forms of data structures could be used in various embodiments. The invention as described herein contemplates all such embodiments as may come within the scope of the following claims and equivalents thereof.