Apparatus and method for synchronization in a multiple-carrier communications system by observing a phase-frequency relationship of a plurality of pilot signals

[0001] This patent application claims the benefit of U.S. Provisional Application No. 60/140,465, filed on Jun. 23, 1999 and entitled “An OFDM Frequency Synchronization Lock Detection Method.”

[0002] This patent application is related to U.S. patent applications entitled “Apparatus and Method for Synchronization in a Multiple-Carrier Communication System By Observing A Plurality of Synchronization Indicators” Ser. No. 09/593,215, “Apparatus and Method for Synchronization in a Multiple-Carrier Communication System By Observing Energy Within a Guard Band”, now issued patent U.S. Pat. No. 6,389,087, “Methods and Apparatus for Use in Obtaining Frequency Synchronization in an OFDM Communication System (1)”, Ser. No. 09/594,886, and “Methods and Apparatus for Use in Obtaining Frequency Synchronization in an OFDM Communication System (2)”, Ser. No. 09/594,890; all filed concurrently with this application. All related patent applications are incorporated by reference herein.

[0003] The invention relates in general to communication systems and more specifically to synchronization in a multiple-carrier communication system.

[0004] Due to advantages over other modulation techniques, communication systems utilizing multiple-carrier signals are currently being implemented for a variety of applications. Communications systems using Orthogonal Frequency Division Multiplexing (OFDM) techniques are gaining acceptance for applications such as broadcast television, mobile wireless and fixed wireless, including wireless local loop (WLL) applications. OFDM modulation techniques provide high data rate transmission over hostile channels with a system having a relatively low complexity. A typical wireless transmission channel subjects a transmitted signal to multi-path dispersion, resulting in numerous versions of the signal arriving at the receiver at different times. The transmitted signal is reflected and refracted through multiple transmission paths having different characteristics. The resulting interference between the versions of the signal causes inter-symbol interference (ISI) of the transmitted data. OFDM techniques typically employ a guard time between symbols to reduce ISI. Also, since OFDM utilizes multiple-carrier signals transmitted through the transmission channel, frequency-selective fading impacts a smaller portion of the transmitted data than is the case with single-carrier systems. OFDM techniques simplify the complexity of multiple-carrier receivers by using a rectangular-shaped sub-carrier for generating the multiple-carrier signals.

[0005] The performance in an OFDM system, however, is highly correlated to the synchronization between the transmitter and receiver. Small errors in frequency or +timing can greatly reduce the performance of the system. Many conventional synchronization techniques are limited in that the received data must be demodulated and analyzed in order to correct for synchronization errors and as a result require significant overhead of time and processing power.

[0006] In an exemplary embodiment of the invention, a loss of synchronization between a receiver and a transmitter is detected by observing a phase-frequency relationship of a plurality of pilot signals transmitted at different frequencies.

[0007] At least two pilot signals having different frequencies are transmitted from the transmitter to the receiver. Synchronization errors result in a linear relationship between phase and frequency of the received pilot signals. For any given timing error, pilot signals with higher frequencies will have higher phase offsets. If the slope of the phase-frequency relationship exceeds a timing threshold at a rate greater than an occurrence threshold, the loss of synchronization is detected.

[0016] FIG. 1 is a block diagram of a communication system 100 in accordance with the exemplary embodiment of the invention. In the exemplary embodiment, the communication system 100 is a fixed wireless communication system providing communication services to a subscriber premise. A transmitter 102 transmits signals in accordance with Orthogonal Frequency Division Multiplexing (OFDM) techniques to a receiver 106 through a wireless channel 104. Those skilled in the art will recognize the various other types of communication techniques and systems that can be utilized in accordance with the present invention. Further, in the interest of brevity, one-way communication is discussed and those skilled in the art will readily apply the techniques disclosed herein to either downstream or upstream communication and to systems utilizing one-way or two-way communication links.

[0017] In addition to other circuitry known in the art, the receiver 106 includes at least a demodulator 108, a controller 110 and an energy detector 112. In the exemplary embodiment, the receiver 106 also includes at least a timing detector 114 and a phase detector 116. Although the receiver 106 components are represented by individual functional blocks, those skilled in the art will recognize that the structure of the receiver 106 may be implemented with a variety of devices, circuits and integrated circuits. Further, circuits and other functional elements may be distributed over more than one functional block denoted in FIG. 1. For example, the energy detector 112 and the demodulator 108 may access the same Digital Signal Processing (DSP) circuitry in order to perform their respective functions. Also, a phase detector and phase locked loop (PLL) can be used to measure the phase differential magnitude between pilots within different time slots as well as to provide phase information used to determine the phase-frequency relationship of pilot signals transmitted within the same time slot.

[0018] The controller 110 is any type of computer, microprocessor, processor, processor arrangement, or combination of processors that facilitates the overall functionality of the receiver 106 in addition to performing the functions described herein. In the exemplary embodiment, the controller 110 is adapted to run lines of code that direct the receiver 106 in receiving and demodulating the signals transmitted from the transmitter 102, including execution of the loss of synchronization detection and synchronization processes.

[0019] In the exemplary embodiment, the demodulator 108 includes radio frequency (RF) circuitry and analog-to-digital (A/D) conversion circuitry in addition to digital signal processing (DSP) circuitry for demodulating the OFDM signals. The demodulator 108 may be implemented using a digital circuit, such as an Application Specific Integrated Circuit (ASIC), that performs a Fast Fourier Transform (FFT) on the digitized time series and a DSP processor that performs arithmetical operations on the FFT output. The FFT output is an array of complex values often referred to as tones, which consist of in-phase (I) and quadrature (Q) components.

[0020] The phase detector 116, energy detector 112 and timing detector 114, in conjunction with the controller 110, form a plurality of synchronization detectors 118, 120, 122 in the exemplary embodiment. Each of the synchronization detectors (118, 120, 122) produces a synchronization indicator in accordance with the parameters measured by the particular synchronization detector (118, 120, 122).

[0021] An energy detector 112 and controller 110 form an energy guard band synchronization detector 118 that provides a guard band energy synchronization indicator based on the energy measured within a guard band.

[0022] A phase-frequency slope synchronization detector 120 formed by the timing detector 114, phase detector 116, and the controller 110 provides a phase-frequency synchronization indicator based on the phase-to-frequency relationship of a plurality of received pilot signals where the pilot signals are transmitted at different frequencies. The phase offset of each received pilot signal is different for each pilot signal if the receiver 106 is not synchronized to the transmitter 102. As explained further below, the system 100 attempts to adjust the timing of the receiver 106 when a timing error is detected. In the exemplary embodiment, if the number of timing adjustments within a given time period exceeds a timing adjustment occurrence threshold (occurrence threshold), the timing error synchronization indicator indicates that a loss of synchronization has occurred.

[0023] The phase detector 116 and the controller 112 form a phase differential magnitude synchronization detector (phase magnitude synchronization detector) 122 that provides a phase differential magnitude synchronization indicator (phase magnitude synchronization indicator) based on the magnitude of the phase of a received pilot signal for different time slots. The phase differential magnitude synchronization detector 122, therefore, tracks the phase of pilot signals over time and indicates an error when the magnitude exceeds a phase threshold. Those skilled in the art will recognize that such a phase differential magnitude synchronization detector is subject to aliasing error if the frequency error exceeds one-half of the inverse of the time interval between timeslots.

[0024] The energy detector 112 measures energy within a given frequency spectrum dictated by the controller 110 and may be implemented in a variety of ways. In the exemplary embodiment, the energy detector 112 is implemented in the DSP processor in accordance with known techniques. The energy detector 112 sums the squares of the I and Q components of the signals contained within the frequency bandwidth associated with each guard band to determine the energy contained within the guard band. The guard band energy synchronization detector 118 formed by the energy detector 112 and the controller 110 indicates a frequency error when energy within the guard bands is detected. As discussed below in reference to FIG. 6, when the receiver 106 and the transmitter 102 are synchronized, the pilot signals are within the transmission band. When a frequency error occurs, one of the pilot signals will be received within one of the guard bands, and the pilot signal energy leaking into the guard band will cause the output of the energy detector 112 to increase. The resulting guard band energy synchronization indicator produced by the guard band energy synchronization detector 118 indicates that a loss of synchronization has occurred when energy within the guard band measured by the energy detector 112 is higher than an energy threshold. In the exemplary embodiment, a ratio of the energies within two guard bands is compared to a threshold.

[0025] The timing detector 114 indicates a time rate of change of a waveform timing error resulting from an offset between a received pilot signal waveform and a receive window. The receive window is dictated by a sampling clock derived from the oscillator (not shown) on the receiver 106. When the sampling clock is not perfectly synchronized to the waveform timing, the timing error results as is discussed below in reference to FIG. 3. The phase of each received pilot signal is directly proportional to the timing error and the frequency of the particular pilot signal. Therefore, for any given timing offset, the phase offset will increase as the frequency of the pilot signal is increased. By transmitting several pilot signals having different frequencies, a linear plot of a phase versus frequency can be used to represent the phase-frequency relationship as discussed below in reference to FIG. 4. An example of a suitable implementation and method is discussed in U.S. Pat. No. 5,799,000 entitled “Delay Compensation” issued Aug. 25, 1998 by Elliot Hoole. The receiver 106 receives uniformly spaced pilot signals through the demodulator 108. The pilot signals are digitized, sampled, passed through a Fast Fourier Transform (FFT) processor and stored in the FFT incremental frequency bins as complex numbers. The phase for each pilot signal is computed from each pilot complex value in the DSP processor using methods consistent with known techniques. Since the pilot phase dependence on pilot frequency is linear, the linear relationship may be calculated from measured data using well-known curve fitting techniques and linear regression algorithms.

[0026] The phase differential magnitude indicator produced by the phase differential magnitude detector 122 indicates the phase difference of a pilot signal received in successive time intervals. The phase detector 116 may be implemented using any one of several techniques, including using a phase detector device and PLL to provide a phase error signal having a magnitude based on the change in phase of the received signal. In the exemplary embodiment, the phase detector device and PLL are implemented in the DSP processor and are used to compute a low-pass filtered value of the phase differential. The measured phase value for a current time slot is compared to phase values measured for a previous time slot to determine the phase differential magnitude that indicates whether the system is out of synchronization.

[0027] By observing the three indicators, the controller 110 can accurately detect a loss of synchronization resulting in the implementation of a synchronization process that corrects for timing and frequency errors between the receiver 106 and transmitter 102. Any one of several synchronization procedures can be used to synchronize the receiver to the transmitter 102 in response to the detection of a loss of synchronization. An example of a suitable synchronization method and apparatus is discussed in co-pending U.S. patent application Ser. No. 09/594,890 filed on Jun. 8, 2002 and entitled “Methods And Apparatus For Use In Obtaining Frequency Synchronization In An OFDM Communication System”.

[0028] FIG. 2 is a graphical representation of a frequency spectrum 200 including transmitted signals 202 in accordance with the present invention. In the exemplary embodiment, the plurality of transmitted signals 202 are transmitted within a transmission band 210 and include at least a lower pilot signal 204, an upper pilot signal 206, and at least one data signal 208. In the exemplary embodiment, eight pilot signals 204, 205, 206 are transmitted in addition to a plurality of data signals 208. The transmission band 210 is bounded by an upper guard band 212 and a lower guard band 214 in which no signals are intentionally transmitted. The lower pilot signal 204 is transmitted immediately above and adjacent to the lower guard band 214 while the upper pilot signal 206 is transmitted immediately below and adjacent to the upper guard band 212. In other embodiments, the transmitted signals 202 may include additional pilot signals 205. Each of the transmitted signals 202 is an orthogonal narrow band carrier and is transmitted using known techniques.

[0029] FIG. 3 is a graphical representation illustrating the timing error 306 between a waveform 304 and the sampling clock at the receiver 106. When the receiver clock differs from the transmitted signal frequency, the timing error 306 occurs in the time domain as shown in FIG. 2. The time error is manifested as a linear relationship between the pilot frequencies and pilot signal phases. Since the time error is directly related to the slope of the phase ramp of FIG. 4, a horizontal phase ramp corresponds to zero time error; and a phase ramp with nonzero slope is directly proportional to the time error. In the exemplary embodiment, this slope is continually monitored by the DSP processor which readjusts the receiver time window 302 to obtain a zero slope phase ramp whenever the phase ramp slope exceeds a threshold. Excessive adjustment of the receiver time window 302 within a specified period of time indicates a loss of frequency lock. Another example of a method of observing the phase-frequency relationship of the received pilot signals includes determining that a loss of synchronization has occurred if a threshold is exceeded.

[0030] FIG. 4 is a graphical representation of relationship between the pilot frequency and the pilot phase. When a frequency offset occurs between the transmitter 102 and the receiver 106, the linear relationship between pilot frequencies and the pilot signal phases can be illustrated by the upward sloping line in FIG. 4. Each data point 404 along the line 402 corresponds to a pilot signal (204, 205, 206). Since the multiple pilots signals 204, 205, 206 are spaced in frequency, a synchronization error results in different phase values for each pilot signal (204, 205, 206). The slope of the line 402 corresponds to the timing error 306.

[0031] FIG. 5 is a graphical representation of the frequency spectrum 200 of received signals 502 corresponding to the transmitted signals 202 as received by the receiver 106 when the receiver 106 and the transmitter 102 are synchronized. In addition to the received data signals 508, the receiver 106 receives the lower pilot signal 504, the pilot signals 505 and the upper pilot signal 506. When the receiver 106 and the transmitter 102 are synchronized, the upper pilot signal 506 and the lower pilot signal 504 are received within the transmission band 210. If the energy within the lower guard band 214 is represented by L and the energy representing the energy within the upper guard 212 band is represented by U, the ratio of the energies (U/L) is approximately equal to one. Therefore, the contribution of the energies from each of the pilot signals 504, 506 within the adjacent guard band 214, 212 is approximately the same when the transmitter 102 and the receiver 106 are synchronized.

[0032] FIG. 6 is a graphical representation of the frequency spectrum 600 when a synchronization error results in a negative frequency shift of the received signals 502. The lower pilot signal 504 is received within the lower guard band 214 due to the frequency offset. Therefore, the energy detector 112 detects more energy in the lower guard band 214 than in the upper guard band 212, resulting in an energy ratio (U/L) less than one. If the energy ratio falls below a lower predetermined threshold, the controller 110 indicates that an out-of-synchronization status has occurred.

[0033] FIG. 7 is a graphical representation of the frequency spectrum 700 when a synchronization error results in a positive frequency shift of the received signals 502. The upper pilot signal 506 is received within the upper guard band 212 due to the frequency offset. Therefore, the energy detector 112 detects more energy in the upper guard band 212 than in the lower guard band 214, resulting in an energy ratio (U/L) greater than one. If the energy ratio rises above a upper predetermined threshold, the controller 110 indicates that an out-of-synchronization status has occurred and the synchronization procedure is performed.

[0034] FIG. 8 is a flow chart of a method of detecting a loss of synchronization in accordance with the exemplary embodiment of the invention. As described above, the exemplary embodiment utilizes three synchronization indicators to determine that a loss of synchronization between the transmitter 102 and the receiver 106 has occurred. A voting scheme is used to determine whether the receiver 106 is synchronized to the transmitter 102. If a majority of the synchronization indicators provide a loss of synchronization indication, the receiver 106 is determined to be out of synchronization with the transmitter 102. In other embodiments, each of the indicators discussed may be used independently or with other types of synchronization indicators in other arrangements and combinations. Further, the information from each indicator may be analyzed and combined in different ways and orders to determine whether a loss of synchronization situation has occurred.

[0035] At step 802, the receiver 102 receives the transmitted spectrum 200 including a plurality of pilot signals (204–208). In the exemplary embodiment, eight pilot signals 204, 205, 206 are transmitted in addition to data signals 208.

[0036] At step 804, a waveform timing error is measured by observing the phase to frequency relationship of the plurality of pilot signals 204–206 transmitted from the transmitter 102. At least two pilot signals (204–206) are used for computing a phase ramp slope (phase-frequency relationship); and in the exemplary embodiment, the eight pilot signals 204–206 are transmitted and received for computing the phase ramp slope of a line defining the relationship between the frequency and phase of the pilot signals. As described above, the linear relationship between phase and frequency may be calculated from measured data using well-known curve fitting techniques and linear regression algorithms.

[0037] At step 806, it is determined whether the phase ramp slope is greater than a timing threshold. If the slope exceeds a given timing threshold, the timing of the receiver 106 is adjusted in accordance with the timing offset at step 808 and a counter is incremented in step 810. If the slope does not exceed the timing threshold, the procedure continues at step 816.

[0038] At step 812 the number of timing adjustments performed in a specified time period is compared to an occurrence threshold. Since a timing adjustment is made when the phase ramp slope exceeds the timing threshold, the number of timing adjustments is the same as the number of times the slope of the phase frequency relationship exceeds the timing threshold. If the counter value exceeds the occurrence threshold within a specified time period in step 812, the phase-frequency synchronization detector 120 indicates a loss of synchronization at step 814. Otherwise, the procedure continues at step 816.

[0039] At step 816, the receiver 106 measures a phase difference between the current and previous instance of at least one pilot signal (202–206) received from the transmitter 102.

[0040] At step 818, the phase error is compared to a phase error threshold to determine if, according to the phase detector 116, the receiver 106 has lost synchronization. If the phase error is greater than the phase error threshold, the phase detector 116 indicates that a loss of synchronization has occurred at step 820. Otherwise, the receiver 106 determines that the phase detector 116 indicates that the receiver 106 is synchronized with the transmitter 102 and the procedure continues at step 822.

[0041] At step 822, the energy within each of the guard bands (212, 214) is measured. As described above, the energy detector 112 sums the squares of the I and Q components of the signals contained within the frequency bandwidth associated with each guard band (212, 214) to determine the energy contained within the guard bands (212, 214).

[0042] At step 824, the ratio of the upper guard band 212 to the lower guard band 214 (guard band energy ratio) is compared to a range. If the guard band energy ratio is within the range, the energy guard band synchronization detector indicates that the receiver 106 is synchronized to transmitter 102. If the guard band energy ratio is outside the range, the procedure continues to step 826 where it is determined that the energy guard band indicator indicates a loss of synchronization. If the guard band energy ratio is within the range, the procedure continues at step 828.

[0043] At step 828, it is determined whether the synchronization indicators collectively indicate a loss of synchronization. In the exemplary embodiment it is determined whether two or more indicators indicate that a loss of synchronization has occurred. Those skilled in the art will recognize the various other arrangements and techniques for implementing step 828. For example, a scheme may be used where only a unanimous indication of a loss of synchronization by the synchronization indicators denotes loss of synchronization.

[0044] If a loss of synchronization has occurred, the procedure continues to step 830 where a resynchronization is performed. As described above, any one of several techniques may be used to synchronize the receiver 106 to the transmitter 102. An example of a suitable method is described in co-pending U.S. patent application Ser. No. 09/594,890 filed on Jun. 8, 2002 and entitled “Methods And Apparatus For Use In Obtaining Frequency Synchronization In An OFDM Communication System”. After performing the synchronization, or if no synchronization is required, the procedure returns to step 802.

[0045] Clearly, other embodiments and modifications of this invention will occur readily to those of ordinary skill in the art in view of these teachings. Therefore, this invention is to be limited only by following claims, which include all such embodiments and modifications when viewed in conjunction with the above specification and accompanying drawings.