Power circuit and method for controlling drive and control voltages of an image formation apparatus

[00002] 1) Field of the Invention

[00003] The present invention relates to a power circuit that supplies a power source voltage to an image formation apparatus and a method of controlling a power source of an image formation apparatus.

[00004] 2) Description of the Related Art

[00005] In recent years, there is a great demand to prevent the global warming for global environmental protection. In compliance with this requirement, serious considerations are given to conditions of energy saving, resource saving, and recycling at the time of operating and manufacturing various kinds of products. Among various conditions, the Energy Star proposed by the U.S. Environmental Protection Agency is introduced into Japan as an international power-saving prescription. In Japan, following the results of the conference on the prevention of global warming, Ministry of Economy, Trade and Industry (METI) announced a criterion of energy saving as the law concerning the Rational Use of Energy to be applied to specific devices such as copying machines, home electric appliances, and computers, and presented energy consumption efficiency targets in 2006.

[00006] The Energy Star is also reflected to the environmental regulations in the German Environmental Control BAM (Blue Angel Mark), the Nordic Swan Label, and the Swiss Energy 2000.

[00007] Based on a rapid spreading of image formation apparatuses into various fields in recent years, it is known that the waiting times of the image formation apparatuses such as printers and copying machines are longer than their operating times. Particularly, more than 90% of the time spent for printers of personal computers is said to be the waiting time. This started the prescription of the Energy Star.

[00008] In order to decrease unnecessary power consumption during the waiting time, an image formation apparatus disclosed in Japanese Patent Application Laid-Open No. 5-333636 proposes to use a switching-type power circuit for the power source of the image formation apparatus. This power circuit stops power supply to sections of the image formation apparatus that do not require power supply during the waiting time.

[00009] This type of conventional power circuit of an image formation apparatus is structured as shown in FIG. 6. A rectifier circuit 21 is connected to a first secondary winding 25a of a transformer 13, and a rectifier circuit 22 is connected to a second secondary winding 25b of a transformer 13. Driving output terminals td1 and td2 are provided as output terminals of the rectifier circuit 21 via a field-effect transistor (FET) 23. The field effect transistor 23 functions as a switching element. Driving sections that do not require a power supply during the waiting time such as a motor and a solenoid of the image formation apparatus not shown are connected to the driving output terminals td1 and td2. During the normal operation, a driving signal of 24-volts for driving the driving sections is output from the driving output terminals td1 and td2.

[00010] The rectifier circuit 22 is connected to the second secondary winding 25b of the transformer 13, as described above. Control output terminals tc1 and tc2 that output a control voltage of 5-volts to control circuits of a CPU (Central Processing Unit) and the like of the image formation apparatus are provided as output terminals of the rectifier circuit 22. A detecting circuit 10 that detects the output voltage is connected to the control output terminals tc1 and tc2.

[00011] A comparator circuit 11 that compares a detection voltage of the detecting circuit 10 with a preset reference voltage is connected to an output terminal of the detecting circuit 10. A pulse-width modulation (PWM) control circuit 18 that controls a pulse width modulation is connected to an output terminal of the comparator circuit 11. An output terminal of the pulse-width modulation control circuit 18 is connected to a gate of a field-effect transistor 8 that is insertion connected to a primary winding 24 of the transformer 13 as a switching element. An output terminal of an ON/OFF control circuit 15 is connected to a gate of the field-effect transistor 23.

[00012] In the power circuit having the above-described structure, the driving sections of the image formation apparatus are connected to the driving output terminals td1 and td2. The control circuits of a central processing unit (CPU) and the like of the image formation apparatus are connected to the control output terminals tc1 and tc2. When the driving voltage and the control voltage are supplied to the image formation apparatus, the image formation apparatus carries out an image formation operation in the normal operation mode.

[00013] In the normal operation mode, the field-effect transistor 23 is ON based on the output signal from the ON/OFF control circuit 15. When an alternating current (AC) voltage input through input terminals t1 and t2 is supplied to the primary winding 24 of the transformer 13, the rectifier circuit 21 rectifies a secondary voltage induced to the first secondary winding 25a of the transformer 13 so that a driving voltage of 24-volt, for example, is supplied to the image formation apparatus via the driving output terminals td1 and td2. Moreover, the rectifier circuit 22 rectifies a secondary voltage induced to the second secondary winding 25b of the transformer 13 so that a control voltage of 5-volt, for example, is supplied to the image formation apparatus via the control output terminals tc1 and tc2.

[00014] In the normal operation mode, the detecting circuit 10 detects the control voltages output to the control output terminals tc1 and tc2, and the comparator circuit 11 compares the detection voltages of the detecting circuit 10 with the reference voltage set in advance. Based on a result of the comparison, the pulse-width modulation control circuit 18 carries out a pulse-width modulation control in the primary winding 24 of the transformer 13 so that the control voltages from the control output terminals tc1 and tc2 become a predetermined voltage according to the control signal input to the gate of the field-effect transistor 8. Based on this pulse-width modulation control, the driving voltages output from the driving output terminals td1 and td2 are also controlled to become a predetermined voltage set in advance.

[00015] When a predetermined time set in advance elapses after the image formation apparatus ends the image formation in the normal operation mode, an energy saving signal F5 is generated based on the setting of the energy saving mode. This energy saving signal F5 is input to the ON/OFF control circuit 15. The field-effect transistor 23 becomes OFF based on the output signal from the ON/OFF control circuit 15, and interrupts the supply of the driving voltages to the driving sections that do not require power supply during the waiting time.

[00016] When a predetermined key operation is carried out or when there is an input of a printing signal, the setting of the operation mode returns from the energy saving mode to the normal operation mode. Based on the setting of the normal operation mode, the input of the energy saving signal F5 to the ON/OFF control circuit 15 is interrupted. Based on the output signal from the ON/OFF control circuit 15, the field-effect transistor 23 becomes ON, and the supply of the driving voltages from the driving output terminals td1 and td2 to the driving sections of the image formation apparatus is started. As a result, the image formation apparatus can carries out the image formation.

[00017] However, the driving sections of the motor and the solenoid of the image formation apparatus require at least 5 to 10 amperes. The field-effect transistor 8 is ON during both the normal operation mode and the energy saving mode, and the rectifier circuits 21 and 22 are ON during the normal operation mode. Therefore, the field-effect transistor 8 and the rectifier circuits 21 and 22 have substantially large power loss. Further, in order to restrict a rise in voltage when the driving output terminals td1 and td2 have no current load after ending the image formation operation, it is necessary to connect a dummy resistor R to the driving output terminals. Power consumption of the dummy resistor R lowers the energy saving efficiency during the waiting time of the image formation apparatus.

[00018] It is an object of the present invention to at least solve the problems in the conventional technology.

[00019] The power circuit that supplies a power voltage to an image formation apparatus according to one aspect of the present invention comprises a transformer having a primary winding and a plurality of secondary windings and a first switching element connected to the primary winding, wherein the transformer boosts a voltage input from the primary winding and outputs the voltage boosted from each of the secondary windings; a synchronous rectifying unit having a second switching element, wherein the synchronous rectifying unit is connected to the secondary windings, rectifies the voltage output from each of the secondary windings, and outputs the voltage rectified as a driving voltage from two driving output terminals; a rectifying unit that is connected to each of the secondary windings, rectifies the voltage output from each of the secondary windings, and outputs the voltage rectified as a control voltage from two control output terminals; a pulse-width modulation control unit that calculates a difference between the control voltage and a reference voltage, and pulse-width modulation controls the primary winding based on the difference in such a manner that the driving voltage and the control voltage attain predetermined voltage levels; and a synchronous rectification control unit that ON/OFF controls the second switching element according to an operation mode.

[00020] The method of controlling a power supply to an image formation apparatus according to another aspect of the present invention comprises a driving-voltage output step in which a synchronous rectifying unit rectifies a boosted voltage input from a transformer, and outputs the voltage rectified as a driving voltage from two driving output terminals; a control-voltage output step in which a rectifying unit rectifies the boosted voltage input from the transformer, and outputs the voltage rectified as a control voltage from two control output terminals; a detecting step in which a detecting unit detects the control voltage output from the control output terminals; a pulse-width modulation control step in which a pulse-width modulation control unit calculates a difference between the control voltage detected with a reference voltage, and pulse-width modulation controls a primary winding of the transformer based on the difference in such a manner that the driving voltage and the control voltage attain predetermined voltage levels; and a synchronous rectification control step in which a synchronous rectification control unit ON/OFF controls a switching element of the synchronous rectifying unit according to an operation mode.

[00021] These and other objects, features and advantages of the present invention are specifically set forth in or will become apparent from the following detailed descriptions of the invention when read in conjunction with the accompanying drawings.

[00028] Exemplary embodiments of a power circuit of an image formation apparatus and a method of controlling the power source of the image formation apparatus according to the present invention is explained in detail below in order with reference to the accompanying drawings.

[00029] The power circuit of the image formation apparatus according to a first embodiment of the present invention is shown in FIG. 1 and FIG. 2. FIG. 1 is a circuit diagram that shows a structure of the power circuit of the image formation apparatus according to the first embodiment, and FIG. 2 is a circuit diagram that shows a structure of a comparator circuit shown in FIG. 1.

[00030] As shown in FIG. 1, the power circuit of the image formation apparatus according to the first embodiment comprises: the transformer 13 that boosts a voltage input from the primary winding 24 thereof; the field-effect transistor 8 connected in series with the primary winding 24 of the transformer 13, and that switches the transformer 13; a first synchronous rectifier circuit 1 connected to the first secondary winding 25a of the transformer 13, rectifies the secondary voltage thereof, and outputs driving voltages (of a 24-volt system) from the driving output terminals td1 and td2; a second synchronous rectifier circuit 2 connected to the second secondary winding 25b of the transformer 13, rectifies the secondary voltage thereof, and outputs control voltages (of a 5-volt system) from the control output terminals tc1 and tc2; a synchronous rectification control circuit 3 that controls the switching of field-effect transistors 6a and 6b of the first synchronous rectifier circuit 1 according to the operation mode; a synchronous rectification control circuit 5 that controls the switching of field-effect transistors 7a and 7b of the second synchronous rectifier circuit 2; the detecting circuit 10 that detects a control voltage output from the control output terminal tc1 of the second synchronous rectifier circuit 2; the comparator circuit 11 that compares the control voltage detected by the detecting circuit 10 with a reference voltage, and outputs a differential signal; a pulse-width modulation control circuit 12 that pulse-width modulation controls the switching of the field-effect transistor 8 based on the differential signal input from the comparator circuit 11; a reference voltage changing circuit 14 that changes the reference voltage of the comparator circuit 11; the ON/OFF control circuit 15 that outputs a control signal to the synchronous rectification control circuit 3 according to the operation mode; and a main body control unit 16 that outputs a command signal corresponding to the operation mode of the image formation apparatus to the ON/OFF control circuit 15 and the reference voltage changing circuit 14. In the figures, same reference numerals have been attached to those components that perform same or similar functions as the components shown in FIG. 6.

[00031] The synchronous rectifier circuit 1 has the field-effect transistors 6a and 6b. These field-effect transistors 6a and 6b function as switching elements. Input terminals of the synchronous rectifier circuit 1 is connected to the first secondary winding 25a of the transformer 13. The driving output terminals td1 and td2 are the output terminals of the synchronous rectifier circuit 1. The synchronous rectification control circuit 3 that ON/OFF controls the synchronous rectifier circuit 1 is connected to gates of the field-effect transistors 6a and 6b.

[00032] The synchronous rectifier circuit 2 has the field-effect transistors 7a and 7b. These field-effect transistors 7a and 7b functions as switching elements. Input terminals of the synchronous rectifier circuit 2 is connected to the second secondary winding 25b of the transformer 13. The control output terminals tc1 and tc2 are output terminals of the synchronous rectifier circuit 2. The synchronous rectification control circuit 5 that ON/OFF controls the synchronous rectifier circuit 2 is connected to gates of the field-effect transistors 7a and 7b.

[00033] Further, the detecting circuit 10 that detects control voltages output from the control output terminals tc1 and tc2 is provided. The comparator circuit 11 that compares the detected control voltages with the reference voltage and outputs a differential signal (i.e., a comparison signal) is connected to an output terminal of the detecting circuit 10.

[00034] As shown in FIG. 2, the comparator circuit 11 has a differential amplifier 26. The reference voltage changing circuit 14 changes the reference voltage. The pulse-width modulation control circuit 12 that carries out the pulse-width modulation control is connected to an output terminal of the comparator circuit 11. An output terminal of the pulse-width modulation control circuit 12 is connected to a gate of the field-effect transistor 8 as a switching element connected in series with the primary winding 24 of the transformer 13. A control terminal of the pulse-width modulation control circuit 12 is connected to control terminals of the synchronous rectifier circuits 3 and 5 respectively.

[00035] The main body control unit 16 outputs a command signal corresponding to the operation mode of the image formation apparatus (i.e., the energy saving signal F5 when the energy saving mode is set, and an energy saving cancellation signal F10 when the energy saving mode is cancelled). The main body control unit 16 is provided at the outside of the power circuit. The ON/OFF control circuit 15 is connected to a first output terminal of the main body control unit 16, and an output terminal of the ON/OFF control circuit 15 is connected to a control terminal of the synchronous rectification control circuit 3. The reference voltage changing circuit 14 that changes the reference voltage is connected to a second output terminal of the main body control unit 16, and an output terminal of the reference voltage changing circuit 14 is connected to the comparator circuit 11.

[00036] The power circuit operates as explained below. In the normal operation mode of carrying out the image formation operation, a driving voltage of 24-volt output from the driving output terminals td1 and td2 is supplied as driving power sources to the driving sections of the motor and the solenoid of the image formation apparatus that are connected to the driving output terminals td1 and td2. A control voltage of 5-volt output from the control output terminals tc1 and tc2 is supplied as a control power source to the control circuits of the CPU and the like of the image formation apparatus that are connected to the control output terminals tc1 and tc2. The control voltage of 5-volt is output in the stabilization accuracy of 1 to 2%, and the power source voltage of 24-volt is output in the stabilization accuracy of approximately 10%.

[00037] In the normal operation mode, the detecting circuit 10 detects the control voltages of the control output terminals tc1 and tc2, and outputs a detection voltage Vi to a non inverting input terminal of the differential amplifier 26 of the comparator circuit 11. The differential amplifier 26 compares the detection voltage Vi input to the non inverting input terminal with a reference voltage Vso set in advance in an inverting input terminal, and outputs a voltage Vo=Vi−Vso (i.e., a differential signal) to the pulse-width modulation control circuit 12. The pulse-width modulation control circuit 12 outputs the control signal based on the voltage Vo (i.e., the differential signal) output to the gate of the field-effect transistor 8, thereby to ON/OFF control the field-effect transistor 8. The pulse-width modulation control circuit 12 outputs a synchronous control signal F1 that is synchronous with this control signal, to the synchronous rectification control circuits 3 and 5 respectively.

[00038] The synchronous rectification control circuit 3 ON/OFF controls the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1 in synchronism with the field-effect transistor 8 based on the synchronous control signal F1 input from the pulse-width modulation control circuit 12. Similarly, the synchronous rectification control circuit 5 ON/OFF controls the field-effect transistors 7a and 7b of the synchronous rectifier circuit 2 in synchronism with the field-effect transistor 8 based on the synchronous control signal F1 input from the pulse-width modulation control circuit 12. As explained above, in the normal operation mode, the field-effect transistor 8, the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1, and the field-effect transistors 7a and 7b of the synchronous rectifier circuit 2 are ON/OFF controlled synchronously.

[00039] As explained above, in the normal operation mode, the pulse-width modulation control circuit 12 carries out a pulse-width modulation feedback control so that the control output terminals tc1 and tc2 output the control voltages of 5-volt. In response to this, the driving output terminals td1 and td2 output the driving voltages of 24-volt. The control voltages output from the control output terminals tc1 and tc2 are supplied to the control circuits of the CPU and the like of the image formation apparatus. The driving voltages from the driving output terminals td1 and td2 are supplied to the driving sections of the motor and the solenoid of the image formation apparatus. Based on this, the image formation apparatus carries out the image formation.

[00040] When a preset predetermined period of time passes after the image formation apparatus ends the image formation operation, the main body control unit 16 sets the energy saving mode, and outputs the energy saving signal F5 to the ON/OFF control circuit 15 and the reference voltage changing circuit 14. Upon receiving the input of the energy saving signal F5, the ON/OFF control circuit 15 outputs the energy saving control signal F3 to the synchronous rectification control circuit 3. Upon receiving the input of the energy saving control signal F3, the synchronous rectification control circuit 3 turns off the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1 based on this control signal. Based on this, the synchronous rectifier circuit 1 is cut off, and the output of the driving voltages from the driving output terminals td1 and td2 is stopped.

[00041] Upon receiving the input of the energy saving signal F5 from the main body control unit 16, the reference voltage changing circuit 14 inputs, in place of the reference voltage Vso, an energy saving reference voltage Vs1 that is lower than the reference voltage Vso, to the non inverting input terminal of the differential amplifier 26 of the comparator circuit 11. As a result, the comparator circuit 11 outputs a voltage Vo1 of a signal (i.e., a differential signal) based on Vi−Vs1, and inputs this voltage Vo1 to the pulse-width modulation control circuit 12.

[00042] The pulse-width modulation control circuit 12 outputs the control signal based on the output voltage Vo1 (i.e., the differential signal) input from the comparator circuit 11, to the gate of the field-effect transistor 8. The pulse-width modulation control circuit 12 pulse-width modulation controls the ON/OFF of the field-effect transistor 8 at the primary winding 24 of the transformer 13 so that the control voltages output from the control output terminals tc1 and tc2 become the energy saving control voltages lower than the reference control voltage.

[00043] The reference voltage changing circuit 14 can set the energy saving reference voltage Vs1 of the comparator circuit 11 to a lower limit operation voltage of the control circuits connected to the control output terminals tc1 and tc2 or to approximately 90% of the rated voltage of the control circuits.

[00044] Based on this, the energy saving control voltages output from the control output terminals tc1 and tc2 are set to the lower limit operation voltage of the control circuits of the image formation apparatus connected to the control output terminals tc1 and tc2. Alternatively, the energy saving control voltages are set to approximately 90% of the rated voltage of the control circuits.

[00045] On the other hand, when the user sets a draft or carries out a key operation or when the image formation starting instruction is input based on the input of the printing signal, the main body control unit 16 returns from the energy saving mode to the normal operation mode. Specifically, when the main body control unit 16 returns from the energy saving mode to the normal operation mode, the main body control unit 16 outputs the energy saving cancellation signal F10 to the ON/OFF control circuit 15 and the reference voltage changing circuit 14.

[00046] Upon receiving the input of the energy saving cancellation signal F10 from the main body control unit 16, the ON/OFF control circuit 15 outputs a return signal F11 to the synchronous rectification control circuit 3. Upon receiving the input of the return signal F11 from the ON/OFF control circuit 15, the synchronous rectification control circuit 3 ON/OFF controls the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1 in synchronism with the field-effect transistor 8, and sets the synchronous rectifier circuit 1 to a conductive state.

[00047] Upon receiving the input of the energy saving cancellation signal F10 from the main body control unit 16, the reference voltage changing circuit 14 sets the reference voltage Vso to the inverting input terminal of the differential amplifier 26 of the comparator circuit 11. Based on this, the comparator circuit 11 outputs the output voltage Vo of the signal (i.e., the differential signal) based on Vi−Vso, to the pulse-width modulation control circuit 12. The pulse-width modulation control circuit 12 outputs the control signal according to the output voltage Vo input from the comparator circuit 11, to the gate of the field-effect transistor 8. The pulse-width modulation control circuit 12 ON/OFF controls the field-effect transistor 8 at the primary winding 24 of the transformer 13 so that the control voltages output from the control output terminals tc1 and tc2 become the reference control voltage of 5-volt.

[00048] Based on the above, the output of the driving voltages of 24-volt is started again from the driving output terminals td1 and td2 via the synchronous rectifier circuit 1 in the secondary winding 25a of the transformer 13. The control voltages output from the control output terminals tc1 and tc2 are supplied to the control circuits of the CPU and the like of the image formation apparatus. The driving voltages from the driving output terminals td1 and td2 are supplied to the driving sections of the motor and the solenoid of the image formation apparatus.

[00049] As a result, the image formation apparatus carries out the image formation.

[00050] As explained above, according to the first embodiment, the field-effect transistors 6a, 6b, 7a, and 7b, of which ON voltage is lower than the forward voltage of the diode, are used, instead of the diode, as switching elements in the synchronous rectifier circuits 1 and 2. Therefore, in the normal operation mode of carrying out the image formation operation, it is possible to decrease power consumption.

[00051] In the energy saving mode set after a lapse of a predetermined time since the end of the normal operation mode, the synchronous rectification control circuit 3 ON/OFF controls the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1. Therefore, it is possible to avoid wasteful power consumption in the field-effect transistors 6a and 6b. As no current flows through the synchronous rectifier circuit 1, it is not necessary to connect a dummy resistor to the driving output terminals td1 and td2. Consequently, it is possible to completely avoid the conventional wasteful power consumption in the dummy resistor.

[00052] Further, in the energy saving mode, the comparator circuit 11 carries out the differential calculation based on the energy saving reference voltage Vs1 output from the reference voltage changing circuit 14. Based on the voltage output from the comparator circuit 11, the pulse-width modulation control circuit 12 outputs the control signal to ON/OFF control the field-effect transistor 8 so that the control voltages output from the control output terminals tc1 and tc2 become the energy saving control voltage lower than the reference control voltage. Therefore, in the energy saving mode, it is also possible to lower the control voltages that are supplied to the control circuits of the image formation apparatus. Consequently, it is possible to further decrease power consumption.

[00053] In the energy saving mode, the reference voltage changing circuit 24 sets the reference voltage of the comparator circuit 11 to the lower limit operation voltage of the control circuits that are connected to the control output terminals tc1 and tc2. Therefore, it is possible to output the control voltage as the lower limit operation voltage of the control circuits from the control output terminals tc1 and tc2. Consequently, it is possible to set the power consumption during the energy saving mode to the permissible lowest value of the image formation apparatus. As a result, it is possible to achieve a maximum reduction of power consumption.

[00054] The reference voltage changing circuit 24 sets the reference voltage of the comparator circuit 11 to approximately 90% of the rated voltage of the control circuits that are connected to the control output terminals tc1 and tc2. Therefore, it is possible to output the control voltage that is approximately 90% of the rated voltage of the control circuits from the control output terminals tc1 and tc2. Consequently, during the energy saving mode, it is possible to decrease power consumption in a state that return reliability sufficient enough to return to the normal operation mode is maintained.

[00055] The power circuit of the image formation apparatus according to a second embodiment of the present invention is explained with reference to FIG. 3. In FIG. 3, sections of which structures and functions are equivalent to those in FIG. 1 are attached with like reference numerals.

[00056] The power circuit of the image formation apparatus according to the second embodiment has the following additional sections in the structure of the power circuit of the image formation apparatus according to the first embodiment shown in FIG. 1. There is provided a user key operating section 27 that includes a setting time changing circuit 17 that sets a shifting time from the end of the normal operation mode to the setting of the energy saving mode. The user sets a shifting time from the end of the normal operation mode to the setting of the energy saving mode, with the setting time changing circuit 17. The setting time changing circuit 17 outputs a time setting signal corresponding to the set shifting time, to the main body control unit 16. The main body control unit 16 changes the timing of outputting the energy saving signal F5 according to the time setting signal input from the setting time changing circuit 17. With this arrangement, the user can optionally set the shifting time from the end of the normal operation mode to the setting of the energy saving mode.

[00057] The structures and operations of other sections are similar to those in the first embodiment, and therefore, their explanation is omitted.

[00058] As explained above, according to the second embodiment, the user optionally sets a time from the end of the normal operation mode, in which the image formation apparatus executes the image formation, to the setting of the energy saving mode, based on a using condition. Therefore, it is possible to efficiently decrease power consumption of the image formation apparatus by properly following the using condition.

[00059] The power circuit of the image formation apparatus according to a third embodiment of the present invention is explained with reference to FIG. 4. In FIG. 4, sections of which structures and functions are equivalent to those in FIG. 1 are attached with like reference numerals.

[00060] The power circuit of the image formation apparatus according to the third embodiment has the following arrangement in the power circuit of the image formation apparatus according to the first embodiment shown in FIG. 1. A rectifier circuit 7 is provided in place of the synchronous rectifier circuit 2. The synchronous rectification control circuit 5 is excluded. The structure of the rectifier circuit 7 is similar to that of the rectifier circuit 22 shown in FIG. 6, and therefore, its detailed explanation is omitted.

[00061] The structures and operations of other sections are similar to those in the first embodiment, and therefore, their explanation is omitted.

[00062] In the third embodiment, the field-effect transistors 6a and 6b of which ON voltage is lower than the forward voltage of the diode, are used, instead of the diode, as switching elements in the synchronous rectifier circuit 1. Therefore, in the normal operation mode of carrying out the image formation operation, it is possible to decrease power consumption.

[00063] In the energy saving mode set after a lapse of a predetermined time since the end of the normal operation mode, the synchronous rectification control circuit 3 OFF controls the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1. Therefore, it is possible to avoid wasteful power consumption in the field-effect transistors 6a and 6b. As no current flows through the synchronous rectifier circuit 1, it is not necessary to connect a dummy resistor to the driving output terminals td1 and td2. Consequently, it is possible to completely avoid the conventional wasteful power consumption in the dummy resistor. In the power circuit of the image formation apparatus according to the present invention, it possible to sufficiently decrease power consumption even when the synchronous rectifier circuit is used in only the driving voltage output system.

[00064] As the synchronous rectifier circuit 2 is not necessary in the third embodiment, it is possible to simplify the circuit structure from the circuit structure of the first embodiment.

[00065] The power circuit of the image formation apparatus according to a fourth embodiment of the present invention is explained with reference to FIG. 5. In FIG. 5, sections of which structures and functions are equivalent to those in FIG. 1 are attached with like reference numerals.

[00066] The transformer 13 in the power circuit of the image formation apparatus according to the fourth embodiment has three secondary windings, while the transformers 13 in the first to third embodiments have one secondary winding. A third secondary winding 25c has a synchronous rectifier circuit 20 having field-effect transistors 9a and 9b as switching elements, and a synchronous rectification control circuit 6 ON/OFF controls the field-effect transistors 9a and 9b. The structure of the synchronous rectifier circuit 20 is similar to that of the synchronous rectifier circuit 1.

[00067] In FIG. 5, an input terminal of the synchronous rectifier circuit 20 having the field-effect transistors 9a and 9b as switching elements, is connected to the third secondary winding 25c of the transformer 13. Driving output terminals td3 and td4 are provided as output terminals of the synchronous rectifier circuit 20. A synchronous rectification control circuit 6 that ON/OFF controls the synchronous rectifier circuit 20 is connected to gates of the field-effect transistors 9a and 9b of the synchronous rectifier circuit 20.

[00068] This power circuit operates as explained below. Sections other than the synchronous rectifier circuit 20 and the synchronous rectification control circuit 6 carry out operations similar to those of the corresponding sections in the first embodiment, and therefore, their explanation is omitted. According to the fourth embodiment, in the normal operation mode of carrying out the image formation operation, the driving voltages of 24-volt output from the driving output terminals td1 and td2 are supplied as driving power sources to the driving sections of the motor and the solenoid of the image formation apparatus that are connected to the driving output terminals td1 and td2. Further, the driving voltages of 24-volt output from the driving output terminals td3 and td4 are supplied as driving power sources to cooling fans and the like of the image formation apparatus that are connected to the driving output terminals td3 and td4.

[00069] Based on the synchronous control signal F1 from the pulse-width modulation control circuit 12, the synchronous rectification control circuit 6 ON/OFF controls the field-effect transistors 9a and 9b of the synchronous rectifier circuit 20 connected to the third secondary winding 25c, in synchronism with the field-effect transistor 8.

[00070] The driving output terminals td3 and td4 output the driving voltages of 24-volt. The driving voltages from the driving output terminals td1 and td2 are supplied to the cooling fans and the like of the image formation apparatus.

[00071] When the image formation apparatus ends the image formation operation, the main body control unit 16 set the energy saving mode, and outputs the energy saving signal F5 to the ON/OFF control circuit 15 and the reference voltage changing circuit 14. Upon receiving the input of the energy saving signal F5, the ON/OFF control circuit 15 outputs the energy saving control signal F3 to the synchronous rectification control circuit 3. Upon receiving the input of the energy saving control signal F3 from the ON/OFF control circuit 15, the synchronous rectification control circuit 3 turns off the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1 based on this control signal. Based on this, the synchronous rectifier circuit 1 is cut off, and the output of the driving voltages from the driving output terminals td1 and td2 is stopped.

[00072] The ON/OFF control circuit 15 receives an input of the energy saving signal F5, and after a lapse of a predetermined time, outputs the energy saving control signal F3 to the synchronous rectification control circuit 6. Upon receiving the input of the energy saving control signal F3 from the ON/OFF control circuit 15, the synchronous rectification control circuit 6 turns off the field-effect transistors 9a and 9b of the synchronous rectifier circuit 20 based on this control signal. Based on this, the synchronous rectifier circuit 20 is cut off, and the output of the driving voltages from the driving output terminals td3 and td4 is stopped.

[00073] When the image formation apparatus returns from the energy saving mode to the normal operation mode, the main body control unit 16 outputs the energy saving cancellation signal F10 to the ON/OFF control circuit 15 and the reference voltage changing circuit 14.

[00074] Upon receiving the input of the energy saving cancellation signal F10 from the main body control unit 16, the ON/OFF control circuit 15 outputs the return signal F11 to the synchronous rectification control circuit 3 and the synchronous rectification control circuit 6. Upon receiving the input of the return signal F11 from the ON/OFF control circuit 15, both the synchronous rectification control circuits 3 and 6 ON/OFF control the field-effect transistors 6a and 6b of the synchronous rectifier circuit 1 and the field-effect transistors 9a and 9b of the synchronous rectifier circuit 20 respectively, in synchronism with the field-effect transistor 8 based on the synchronous control signal F1 from the pulse-width modulation control circuit 12. The synchronous rectification control circuits 3 and 6 set the synchronous rectifier circuits 1 and 20 to a conductive state.

[00075] In the fourth embodiment, structures and operations of other sections are similar to those in the first embodiment, and therefore, their explanation is omitted.

[00076] As explained above, according to the fourth embodiment, the power circuit has two driving-voltage output systems. In the energy saving mode, the synchronous rectifier circuit 1 is set to the non-conductive state, and after a lapse of a predetermined time, the synchronous rectifier circuit 20 is set to the non-conductive state. Therefore, it is possible to achieve both the reduction in power consumption and the proper power source control according to the load. It is possible to achieve this because the cooling fans need to operate for some period of time even after ending the image formation operation, but other driving sections do not need to operate after ending the image formation operation.

[00077] The present invention is not limited to the above embodiments, and it is also possible to achieve the present invention by suitably modifying the embodiments within the range not deviating from the gist of the invention.

[00078] According to a first aspect of the present invention, it is possible to lower the ON voltage of the switching element than the forward voltage of the diode. Further, by ON/OFF controlling the switching element of the synchronous rectifying unit according to the operation mode, it is possible to lower the power consumption of the synchronous rectifying unit. As a result, it is possible to provide a power circuit of an image formation apparatus that can decrease power consumption.

[00079] According to a second aspect of the present invention, in the energy saving mode, the synchronous rectifying unit is set to a cut-off state, and no current flows to the secondary winding of the transformer to which the synchronous rectifying unit is connected. A connection of a dummy resistor to the driving output terminal is not necessary. Therefore, it is possible to decrease wasteful power consumption during the period while the image formation operation is stopped.

[00080] According to a third aspect of the present invention, in the energy saving mode, the control voltage output from the control output terminal is set lower than the control voltage in the normal operation mode, and it is possible to lower the current flowing to the synchronous rectifying unit. Therefore, it is possible to lower wasteful power consumption during the period while the image formation operation is stopped.

[00081] According to a fourth aspect of the present invention, during the energy saving mode, it is possible to set power consumption to a permissible lowest value of the image formation apparatus, thereby to achieve a maximum power reduction.

[00082] According to a fifth aspect of the present invention, during the energy saving mode, it is possible to decrease power consumption in a state that return reliability sufficient enough to return to the normal operation mode is maintained.

[00083] According to a sixth aspect of the present invention, it is possible to efficiently execute the image formation operation by adjusting the time from the end of the normal operation mode to the setting of the energy saving mode, according to a user's using condition.

[00084] According to a seventh aspect of the present invention, it is possible to achieve both the reduction in power consumption and the proper power source control according to the load, by using the two driving voltage output systems.

[00085] The present document incorporates by reference the entire contents of Japanese priority documents, 2002-046573 filed in Japan on Feb. 22, 2002 and 2003-022740 filed in Japan on Jan. 30, 2003.

[00086] Although the invention has been described with respect to a specific embodiment for a complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modifications and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.