Reference circuit for write driver circuit with programmable write current, overshoot duration and overshoot amplitude control

[0002] The present invention is generally related to the field of mass media information storage devices, and more particularly to circuits for controlling the write current used to drive a thin film write head.

[0003] Hard disk drives are mass storage devices that include a magnetic storage media, e.g. rotating disks or platters, a spindle motor, read/write heads, an actuator, a pre-amplifier, a read channel, a write channel, a servo circuit, and control circuitry to control the operation of hard disk drive and to properly interface the hard disk drive to a host system or bus. FIG. 1 shows an example of a prior art disk drive mass storage system 10. Disk drive system 10 interfaces with and exchanges data with a host 32 during read and write operations. Disk drive system 10 includes a number of rotating platters 12 mounted on a base 14. The platters 12 are used to store data that is represented as magnetic transitions on the magnetic platters, with each platter 12 coupleable to a head 16 which transfers data to and from a preamplifier 26. The preamp 26 is coupled to a synchronously sampled data (SSD) channel 28 comprising a read channel and a write channel, and a control circuit 30. SSD channel 28 and control circuit 30 are used to process data being read from and written to platters 12, and to control the various operations of disk drive mass storage system 10. Host 32 exchanges digital data with control circuit 30.

[0004] Data is stored and retrieved from each side of the magnetic platters 12 by heads 16 which comprise a read head 18 and a write head 20 at the tip thereof. The conventional readhead 18 and writehead 20 comprise magneto-resistive heads adapted to read or write data from/to platters 12 when current is passed through them. Heads 16 are coupled to preamplifier 26 that serves as an interface between read/write heads 18/20 of disk/head assembly 10 and SSD channel 28. The preamp 26 provides amplification to the waveform data signals as needed. A preamp 26 may comprise a single chip containing a reader amplifier 27, a writer amplifier, fault detection circuitry, and a serial port, for example. Alternatively, the preamp 26 may comprise separate components rather than residing on a single chip.

[0005] Particular areas for improvements of write driver current circuits used to drive a thin film head include addressing the inaccuracies of the write current, and providing the ability to change the write currents waveform shape so that customers of these circuits can customize the disk drive performance with many variations of thin film write heads provided by different suppliers. That is, there are several available thin film write heads manufactured in the industry, each having it's own drive characteristics and each interfacing slightly differently to the available write drive circuits. Accordingly, there is desired an improved write driver current circuit which can provide both an accurate selectable write current, and which write current can have parameters selectively customized for optimizing disk drive performance.

[0006] The present invention achieves technical advantages as a write current driver circuit adapted to both selectively establish an amplitude of the write current signal, and which tracks multiple variations including process, supply voltages and temperatures, and in addition can be selectively controlled and programmed to control the amplitude, overshoot amplitude, and overshoot duration.

[0007] Preferably, the write current driver circuit includes a write current reference voltage circuit, which is adapted to selectively establish amplitude of the write current. Preferably, the write current reference voltage circuit is adapted to set a DC write current to the write head. A very accurate write current can be established and selectively provided to compensate for variations in process, supply voltages and temperature. The write current reference voltage circuit preferably includes a feedback loop feeding back transistor current to achieve loop stability, and preferably includes a feed forward capacitor adapted to stabilize the feedback loop.

[0008] A plurality of transistors are provided to control multiple parameters of the write current. Preferably, a first set of transistors provides a boost current to produce a write current overshoot. A second set of transistors provides a differential write data signal. An overshoot amplitude of the write current is programmable by creating a pulsing signal. Using the original differential write data signal and a programmable delay version of the write data generates this signal. Preferably, the pulsing signal's current amplitude is also programmable by a programmable current source. These transistors are preferably biased with a trickle current to increase transient switching time. Moreover, these trickle currents are compensated for in the write current reference voltage circuit to maintain write current accuracy. Preferably, PMOS transistors are provided to control the boost currents and the differential write data signals.

[0009] FIG. 1 illustrates a conventional disk drive system including multiple rotating disks or platters, read/write heads, a piezo actuator, a servo circuit, and associated amplifiers and control circuitry;

[0010] FIG. 2 is a schematic diagram of the present invention seen to include a voltage reference for establishing the write current with programmable write current amplitude, pulse duration and overshoot amplitude control;

[0011] FIG. 3A and FIG. 3B are schematic diagrams of the write current reference circuit seen to be coupled to a write head via a series of cascaded emitter-follow transistors;

[0012] FIG. 4 shows a simplified schematic of the voltage reference circuit of FIG. 3 which is adapted to produce a very accurate write current; and

[0013] FIG. 5 is a waveform diagram illustrating the differential signals controlling the three sets of PMOS transistors, illustrating that the pulse duration is programmable by controlling the pulse duration of the boosting signals, and that the overshoot amplitude is controlled as well.

[0014] FIG. 2 shows a schematic of a write driver circuit 40 including a write current reference voltage circuit 42, as well as PMOS transistors adapted to selectively program write current amplitude, overshoot duration, and overshoot amplitude. The write current's reference voltage circuit 42, which sets the DC write current, consists of transistors Q0-Q8, resistors R0-R7, capacitors C0-C3, and current source I2, which is created from a bandgap reference voltage dropped across a poly resistor. Current source I5 is used to the program to write current amplitude. Voltage VREF is the output reference voltage, which varies proportional to current I5. Current I5 is preferably set to be equal to the write current divided by 20 for power saving.

[0015] FIG. 3ashows how the voltage VREF is generated. Since the differential voltage created by reference voltage circuit 42 at nodes VN and VNn is buffered through three emitter-follower stages 44 to the bases of transistors Q17 and Q20, all the Vbe of transistors Q17, Q11, Q10, and Q9 are matched to the Vbe in the reference circuit 42. Transistors and resistors, which are matched and proportional to each other in device size and current density, are:

[0016] In addition, current through transistor Q1 is matched and proportional to current through transistor Q0 i.e. current source I11-I12 and current through transistor Q8 are generated from the same poly current source.

[0017] With reference back to FIG. 2, the differential write data signal across SW-SWn switches the write current polarity, while transistors PX-PXn and transistors PY-PYn provide boost current to produce the write current overshoot. The programmable write current pulse width is controlled by the pulse width of boosting signal PX-PXn and PY-PYn, as shown in FIG. 5. The programmable write current's overshoot amplitude is controlled by the tail current of the M9-M10 and M7-M8 transistor pair, which is generated from current source I1. Current source I1 is also a poly-resistor typed current.

[0018] To prevent breakdown of the PMOS transistors M5, M6, M8 and M10 cascaded PMOS devices M0-M3 are added. A small trickle current is used to partially bias the cascoded devices to improve the overall switching response. MOS transistors M12, M13, M14 and M16 provide the trickle currents to the cascoded devices. However, to maintain write current accuracy, the trickle currents are accounted for in the DC reference circuit 42, which eventually sets the accurate programmed write current. Therefore, transistor M18 provides an equivalent current to the base of transistor Q2 to compensate for the trickle current flowing through transistors M0 and M1. Transistor M21 provides an equivalent bias current to the emitter of transistor Q8 to compensate for the trickle current through cascaded transistor devices M2 and M3.

[0019] The write current accuracy is improved due to a feedback loop in the VREF circuitry 42. Feeding back the collector current of transistors Q5 to the bases of transistors Q0 and Q1 forms the feedback loop. Loop stability is achieved by capacitors C1-C3. Capacitor C1 and C3 provide the dominant pole to the loop. Feed forward capacitor C1 helps stabilize the inner feedback loop.

[0020] FIG. 4 shows a simplified schematic of the voltage reference, which produces accurate write current.

[0021] In summary, circuit 40 provides an accurate write current that is independent of supply voltage, temperature, and if a process change is introduced. The circuit 40 also provides the ability to control three parameters of write current: DC amplitude, overshoot amplitude, and pulse duration.

[0022] Though the invention has been described with respect to a specific preferred embodiment, many variations and modifications will become apparent to those skilled in the art upon reading the present application. It is therefore the intention that the appended claims be interpreted as broadly as possible in view of the prior art to include all such variations and modifications.