Mosgate device driver for synchronous rectification of a 3 phase sinusoidal source

[0002] This application is based on and claims priority to U.S. Provisional Patent Application No. 60/361,415, filed Mar. 1, 2002, entitled MOSGATE DEVICE DRIVER FOR SYNCHRONOUS RECTIFICATION OF A 3 PHASE SINUSOIDAL SOURCE, and this application is based on and claims priority to U.S. Provisional Application No. 60/395,970, filed Jul. 12, 2002, entitled MOSGATE DEVICE DRIVER FOR SYNCHRONOUS RECTIFICATION OF A 3 PHASE SINUSOIDAL SOURCE, the contents of all of which are incorporated herein by reference.

[0003] The invention relates to a circuit to produce a direct current (DC) output from a 3-phase alternating current (AC) source, such as a circuit including a MOSgate driver to drive MOSgated devices in a rectifier circuit.

[0004] It is believed that at least some power electronics applications, such as AC motor drive applications, automotive generator applications, and/or switching power supply applications, may include circuits to rectify a sinusoidal voltage source to produce a DC output. The rectifying of the sinusoidal source may be performed, for example, by a diode bridge or by a collection of active switch bridges including, for example, MOSgated devices, such as MOSFETs and IGBTs.

[0005] An active switch bridge, for example, a switch bridge employing MOSFETs and/or IGBTs, may be advantageous with respect to diode bridges, since the channel of a MOSFET and/or IGBT carries the electrical current, as opposed to the diode of the diode bridge. In this advantageous manner, active switch bridges employing MOSFETs and/or IGBTs may better reduce conduction losses.

[0006] However, to properly operate an active switch bridge employing MOSFETs and/or IGBTs, signals for the gate nodes of the MOSFETs and/or IGBTs should be generated at appropriate times relative to the sinusoidal voltage source.

[0007] Furthermore, if the sinusoidal source produces phase voltages with significant inductances, switching losses may result in operation of a bridge circuit, in which proper control signal timing is not provided. Therefore, it may be advantageous to detect more optimum time instants for the turn-on and turn-off of the gate nodes of the MOSFETs and/or IGBTs.

[0008] To overcome these and other disadvantages of prior art rectification circuits, an exemplary embodiment of the present invention provides a rectifying circuit and method to produce a DC output by rectifying a sinusoidal source having a plurality of output phase voltages and a plurality of phase-to-phase voltages, the rectifying circuit including a bridge circuit coupled to the output phase voltages, the bridge circuit having a plurality of switches; and a control circuit coupled to the output phase voltages and to the bridge circuit, the control circuit being configured to control the switches in accordance with respective absolute values of the phase-to-phase voltages; in which the output phase voltages are rectified to produce the DC output.

[0009] The absolute values of phase-to-phase voltages may be determined in accordance with the output phase voltages each phase-to-phase voltage representing the voltage across two of the output phase voltages.

[0010] By comparing the absolute values of the phase-to-phase voltages, an exemplary rectifying circuit according to the present invention may turn on and/or turn off the switches of the bridge circuit at appropriate times to properly rectify the sinusoidal source and produce the DC output. For example, the exemplary rectifying circuit according to the present invention may operate respective pairs of switches at appropriate times in accordance with the magnitudes of the output phase voltages and the relative magnitudes of the absolute values of the phase-to-phase voltages.

[0011] If the sinusoidal source includes significant inductance, rectification of the 3-phase sinusoidal AC source 125 may be improved by providing additional exemplary timing circuitry according to the present invention to better control the switches. In this manner, the control circuit may perform switch turn-off in diode mode (e.g., MOSFET switches) by keeping the switches turned off, and by estimating the period of the sinusoidal source. With the period information, the turn-off commutation times may be estimated, and a delay may be provided, so that turn-off of the switches occurs before the end of the sinusoidal period.

[0012] FIG. 1 illustrates a first exemplary rectifying circuit according to the present invention.

[0013] FIG. 2 illustrates a first exemplary control circuit according to the present invention.

[0014] FIG. 3 illustrates a second exemplary control circuit according to the present invention.

[0015] FIG. 4 is a graphical time diagram showing the control of gate MOSFET gate signals, in accordance with the control circuit of FIG. 2.

[0016] FIG. 5 illustrates a second exemplary rectifying circuit according to the present invention.

[0017] FIG. 6 illustrates a third exemplary control circuit according to the present invention.

[0018] Referring now to FIG. 1, there is seen a first exemplary rectifying circuit 100 according to the present invention. Rectifying circuit 100 includes 3-phase bridge 105 of MOSgated devices (e.g., vertical conduction MOSFETs), the bridge including three legs 110a, 110b, 110c. Leg 110aincludes MOSFETs 115a, 120a, leg 110bincludes MOSFETs 115b, 120b, and leg 110cincludes MOSFETs 115c, 120c. Rectifying circuit 100 also includes a 3-phase sinusoidal AC source 125, which produces source output phases V_A, V_B, V_C, which are electrically connected to respective nodes between MOSFETs 115a, 120a, MOSFETs 115b, 120b, and MOSFETs 115c, 120c, respectively. A DC output bus 135 is connected to the drains of MOSFETs 115a, 115b, 115c, and a return bus 130 is connected to the sources of MOSFETs 120a, 120b, 120c. A current sense resistor 22 is provided between the DC output bus 135 and the return bus 130.

[0019] Although FIG. 1 includes MOSFET switches, it should be appreciated that the MOSFETs 115a, 115b, 115c, 120a, 120b, 120cmaybe replaced with any conventional circuit switches, such as, IGBTs, solid-state circuit switches, relays, transistor switching arrangements, etc.

[0020] In accordance with an exemplary embodiment of the present invention, gate signals (i.e., Q1, Q2, Q3, Q4, Q5, Q6) of MOSFETs 115a, 120a, 115b, 120b, 115c, 120care controlled to rectify DC output bus 135 in a manner more fully described below.

[0021] Referring now to FIG. 2, there is seen an exemplary control circuit 200 according to the present invention for controlling gate signals Q1, Q2, Q3, Q4, Q5, Q6 of MOSFETs 115a, 120a, 115b, 120b, 115c, 120c, respectively. Control circuit 200 includes conventional logic elements and is operable to provide appropriate control signals over “slices” of one period of the 3-phase AC source 125, during which intervals the absolute value of one of the 3 phase-to-phase voltages (i.e., V_AB, V_BC, V_CA) is higher in magnitude than the absolute values of the other 2 phase-to-phase voltages. Control circuit 200 may be implemented, for example, in an integrated circuit, a driver ASIC, and/or a control ASIC. As shown in FIG. 2, control circuit 200 includes and-gates 205a, 205b, 205c, . . . , 205f, or-gates 210a, 210b, 210c, . . . , 210f, inverter-gates 215a, 215b, 215c, . . . , 215f, and comparators 220a, 220b, 220c, which produce logic signals V_AB(Logic), V_BC(Logic), V_CA(Logic)in accordance with the 3 phase-to-phase voltages V_AB, V_BC, V_CA:

[0022] V_AB=V_A−V_B

[0023] V_BC=V_B−V_C

[0024] V_CA=V_C−V_A

[0025] The comparators 220a, 220b, 220cmay produce, for example, logic signals V_AB(Logic), V_BC(Logic), V_CA(Logic)corresponding to a high logic value (e.g., “1”) when a respective phase-to-phase voltage is greater than 0 volts, and another electrical signal corresponding to a low logic value (e.g., “0”) when a respective phase-to-phase voltage is less than 0 volts (e.g., “5” volts when the phase-to-phase voltage is greater than 0 volts, and “0” volts when the phase-to-phase voltage is less than 0 volts).

[0026] It is readily apparent that the absolute value of V_ABis greater than the absolute values of V_BCand V_CAwhen V_BCand V_CAare both less than zero or both greater than zero (i.e., V_BC(Logic)=“0” and V_CA(Logic)=“0” or V_BC(Logic)=“1” and V_CA(Logic)=“1”); the absolute value of V_BCis greater than the absolute values of V_ABand V_CAwhen V_ABand V_CAare both less than zero or both greater than zero (i.e., V_AB(Logic)=“0” and V_CA(Logic)=“0” or V_AB(Logic)=“1” and V_CA(Logic)=“1”); and the absolute value of V_CAis greater than the absolute values of V_ABand V_BCwhen V_ABand V_BCare both less than zero or both greater than zero (i.e., V_AB(Logic)=“0” and V_BC(Logic)=“0” or V_AB(Logic)=“1” and V_BC(Logic)=“1”).

[0027] When the absolute value of V_ABis greater than the absolute values of V_BCand V_CAand the magnitude of V_ABis greater than zero (i.e., when V_BC(Logic)=“0” and V_CA(Logic)=“0”), control circuit 200 operates to turn on gate signals Q1 and Q4, while switching off gate signals Q2, Q3, Q5, and Q6. When the absolute value of V_ABis greater than the absolute values of V_BCand V_CAand the magnitude of V_ABis less than zero (i.e., when V_BC(Logic)=“1” and V_CA(Logic)=“1”), control circuit 200 operates to turn on gate signals Q2 and Q3, while switching off gate signals Q1, Q4, Q5, and Q6. When the absolute value of V_BCis greater than the absolute values of V_ABand V_CAand the magnitude of V_BCis greater than zero (i.e., when V_AB(Logic)“0” and V_CA(Logic)=“0”), control circuit 200 operates to turn on gate signals Q3 and Q6, while switching off gate signals Q1, Q2, Q4, and Q5. When the absolute value of V_BCis greater than the absolute values of V_ABand V_CAand the magnitude of V_BCis less than zero (i.e., when V_AB(Logic)=“1” and V_CA(Logic)=“1”), control circuit 200 operates to turn on gate signals Q4 and Q5, while switching off gate signals Q1, Q2, Q3, and Q6. When the absolute value of V_CAis greater than the absolute values of V_ABand V_BC, and the magnitude of V_CAis greater than zero (i.e., when V_AB(Logic)=“0” and V_BC(Logic)=“0”), control circuit 200 operates to turn on gate signals Q2 and Q5, while switching off gate signals Q1, Q3, Q4, and Q6. When the absolute value of V_CAis greater than the absolute values of V_ABand V_BC, and the magnitude of V_CAis less than zero (i.e., when V_AB(Logic)=“1” and V_BC(Logic)=“1”), control circuit 200 operates to turn on gate signals Q1 and Q6, while switching off gate signals Q2, Q3, Q4, and Q5.

[0028] The operation of control circuit 200 is represented in tabular format below:

[0029] Referring now to FIG. 4, there is seen a graphical time diagram of gate signals Q1, Q2, Q3, Q4, Q5, and Q6, relative to V_AB, V_BC, and V_CA. For example, when the absolute value of V_ABis greater than the absolute values of V_BCand V_CA, and V_ABis greater than zero, control circuit 200 operates to turn on gate signals Q1 and Q4, while switching off gate signals Q2, Q3, Q5, and Q6. In this manner, current will flow through MOSFETS 115aand 120b, thereby rectifying the 3-phase sinusoidal AC source 125.

[0030] Referring now to FIG. 3, there is seen another exemplary control circuit 300 according to the present invention for controlling gate signals Q1, Q2, Q3, Q4, Q5, Q6 of MOSFETs 115a, 120a, 115b, 120b, 115c, 120c. Control circuit 300 controls gate signals Q1, Q2, Q3, Q4, Q5, Q6 to rectify the 3-phase sinusoidal AC source 125 when V_A, V_B, or V_Cis greater than the DC output bus 135. In this manner, it may be better ensured that current does not flow backwards from the DC bus into the rectification circuit, which would disadvantageously cause the DC bus voltage to drop with respect to the sinusoidal source voltage. As shown in FIG. 3, control circuit 300 includes and-gates 305a, 305b, 305c, . . . , 305l, or-gates 310a, 310b, 310c, . . . , 310g, inverter-gates 315a, 315b, 315c, . . . , 315f, and comparators 320a, 320b, 320c, . . . , 320f.

[0031] If the 3-phase sinusoidal AC source 125 has significant inductance, such as the 3-phase sinusoidal AC source illustrated in the rectifying circuit of FIG. 5, rectification of the 3-phase sinusoidal AC source 125 may be improved by providing additional timing circuitry to better control the gate signals Q1, Q2, Q3, Q4, Q5, Q6 of MOSFETs 115a, 120a, 115b, 120b, 115c, 120c.

[0032] Referring now to FIG. 6, there is seen another exemplary control circuit 600 according to the present invention for rectifying a 3-phase sinusoidal AC source 125 having an inductance. Control circuit 600 is operable to turn on gate signals Q1, Q2, Q3, Q4, Q5, Q6, based solely on phase voltage values. Specifically, when the phase voltage exceeds (resp. falls below) a fixed value, the high side (resp. low side) body diode conducts and therefore the high side (resp. low side) MOSFET can be turned on.

[0033] The control circuit 600 of FIG. 6 performs MOSFET turn-off in diode mode by keeping gate signals Q1, Q2, Q3, Q4, Q5, Q6 turned off, and by estimating the period of the 3-phase sinusoidal AC source 125. Diode rectification may last, for example, 1.5 ms. With the period information, the MOSFET gate driver can estimate the turn-off commutation times. A delay, for example, 100 us, may be provided, so that the actual turn-off of gate signals Q1, Q2, Q3, Q4, Q5, Q6 occurs before the end of the period, thereby causing the body diode of the MOSFET to conduct for the duration of the delay. However, the delay should be large enough to accommodate the largest source period variation. Control circuit 600 may, for example, continuously measure and update the source period information to keep track of the evolution of the 3-phase sinusoidal AC source 125.

[0034] It should be appreciated that the delay and diode rectification times may be adjusted in accordance with a particular application.

[0035] Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein.