DC/DC up/down converter

[0002] The invention relates to a DC/DC up/down converter, comprising inductive energy storage means, switching means and control means, wherein the control means are arranged for selectively operating the switching means for transferring an amount of electrical energy from the energy storage means to an output of said DC/DC converter.

[0003] A DC/DC up/down converter of this type is known from International patent application WO 95/34121 in the name of applicant.

[0004] In practice, compared to DC/DC up converters, an up/down converter usually requires two extra switching means for realizing the up/down function. This has three major disadvantages. Firstly, in that more chip area is required for integrated circuit DC/DC converters; secondly, in that the series resistance of the circuit as a whole is increased, and thirdly in that higher switching losses occur, in particular in the case of semiconductors switches.

[0005] The invention has for its object to propose a DC/DC up/down converter overcoming these disadvantages.

[0006] This object is solved, by the present invention, in a DC/DC up/down converter, the control means of which are configured for operatively controlling the switching means of the DC/DC converter for transferring electrical energy to a first output of the DC/DC converter in a down-conversion mode and for transferring electrical energy from the first output to a second output of the DC/DC converter in an up-conversion mode.

[0007] In accordance with the present invention two outputs are realized. A first output operated in a down-conversion mode and a second output operated in an upconversion mode. The second output voltage is provided in a two-step conversion cycle wherein energy from the first output is transferred to the second output.

[0008] In a preferred embodiment of the invention the DC/DC up/down converter according to the invention comprises:

[0009] first and second input terminals;

[0010] first and second output terminals;

[0011] third and fourth output terminals;

[0012] a coil, having first and second connection ends, wherein the second connection end connects to the first output terminal;

[0013] first switching means operatively connected to provide a conduction path from the first connection end of the coil to the second input terminal;

[0014] second switching means operatively connected to provide a conduction path from the first connection end of the coil to the third output terminal;

[0015] third switching means operatively connected to provide a conduction path from the first input terminal to the first connection end of the coil;

[0016] first diode means parallel connected to the first switching means, and providing a conduction path from the fourth output terminal to the first connection end of the coil;

[0017] second diode means parallel connected to the second switching means, and providing a conduction path from the first connection end of the coil to the second output terminal, and

[0018] control means arranged for operatively switching the first, second and third switching means into their closed or conductive state and open or non-conductive state.

[0019] Compared with the prior art, the DC/DC up/down converter according to the present invention can be realized with one switch less, thereby saving chip area in the case of an integrated circuit converter and reducing switching losses and output series resistance due to the non-zero resistance of the conduction path of the switching means, in particular in the case of semiconductor switching means.

[0020] In the preferred embodiment of the DC/DC up/down converter according to the invention, the control means are arranged for controlling the switching means in a conversion cycle comprising seven different phases:

[0021] a first phase wherein the third switching means are in a conductive state and the first and second switching means are in a non-conductive state;

[0022] a second phase wherein the first switching means are in a conductive state and the second and third switching means are in a non-conductive state;

[0023] a third phase wherein the first switching means are in a conductive state and the second and third switching means are in a non-conductive state;

[0024] a fourth phase wherein the second switching means are in a conductive state and the first and third switching means are in a non-conductive state, and wherein current flow in the coil is in opposite direction compared to the second phase;

[0025] fifth phase wherein the first, second and third switches are in a nonconductive state;

[0026] a sixth phase wherein the first, second and third switches are in a nonconductive state and current flow in the coil is in opposite direction compared to the fifth phase, and

[0027] a seventh phase wherein the first, second and third switches are in a nonconductive state and wherein no current flows through the coil.

[0028] Preferably, switching means constructed as MOS (Metallic Oxide Semiconductor) transistor means are used, having their control terminal (gate) connected to the control means for controlling the conductive or non-conductive state of the transistors.

[0029] Preferably, the DC/DC up/down converter according to the invention comprises smoothing capacitors connected across the output terminals of the first and second output.

[0030] The invention further relates to a power supply comprising a DC/DC up/down converter as disclosed above, and arranged for receiving a DC input voltage Vin at its input, and wherein the control means are arranged for transferring an amount of electrical energy from the input to the energy storage means, such that during use the first output of the DC/DC converter provides a voltage Vout1 and the second output of the DC/DC converter provides a voltage Vout2, wherein Vout1<Vin and Vout2>Vout1.

[0031] The DC/DC converter according to the invention is of particular advantage if applied in a portable electronic appliance, such as, but not limited to, battery powered appliances.

[0032] The invention will now be described in more detail with reference to the accompanying drawings, wherein:

[0033] FIG. 1 shows a circuit diagram of a prior art DC/DC up-converter.

[0034] FIG. 2 shows a circuit diagram of a prior art DC/DC up/down converter.

[0035] FIG. 3 shows a circuit diagram of the DC/DC up/down converter according to the present invention.

[0036] FIG. 4 shows, in a graphic representation, the coil current in the DC/DC up/down converter as shown in FIG. 2.

[0037] FIG. 1 shows a basic circuit of a prior art DC/DC up-converter 1 having a single output.

[0038] The converter 1 comprises inductive energy storage means taking the form of a coil L having a first and a second connection end. The first connection end of the coil L connects to a first input terminal 2 and the second connection end of the coil L connects by first switching means S1 to a second input terminal 3. Further, the second connection end of the coil L connects by second switching means S2 to a first output terminal 4. A diode D is parallel connected with the second switching means S2, providing a conduction path in forward direction of the diode D from the second connection end of the coil L to the first output terminal 4. A smoothing capacitor C connects to the first output terminal 4 and a second output terminal 5. The second input terminal 3 and the second output terminal 5 connect through a common conductive path, for example the earth or mass 9 of an electronic appliance.

[0039] The converter 1 is operated to provide a controlled or regulated output voltage Vout at the output terminals 4, 5 in response to an input voltage Vin at the input terminals 2, 3. To this end, a controller or control means 6 are provided for operating the switching means S1 and S2 in accordance with a PFM (Pulse Frequency Modulation) and/or a PWM (Pulse Width Modulation) control scheme, wherein the output voltage Vout is higher than the input voltage Vin. The control of the switching means S1 and S2 is schematically indicated by arrows 11, 12. Measurement of the output voltage Vout by the control means 6 is schematically indicated by a dashed arrow 10.

[0040] In a typical PFM mode of operation, in a first phase, the switching means S1 are closed, that is in a current conductive state, and the switching means S2 are open, that is in a non-current conductive state. During this first phase, current flows only through the coil L storing electrical energy therein.

[0041] During a second phase, subsequent to the first phase, the switching means S1 are open and the switching means S2 are closed. In this phase, energy built up in the coil L is provided at the output terminals 4, 5 resulting in an output voltage Vout which is higher than the input voltage Vin.

[0042] A new switching cycle is started once the measured output voltage Vout drops below a set reference voltage, controlled by the control means 6.

[0043] In the PWM mode, the coil current I does not become zero. Likewise, during a first phase energy is stored or built up in the coil L, whereas in a subsequent second phase of the PWM switching cycle the stored energy is delivered to the output terminals 4, 5 of the converter 1. Whenever the output voltage Vout drops below the reference voltage, a new switching cycle is started.

[0044] FIG. 2 shows a circuit diagram of an implementation of a prior art DC/DC up/down converter 20, based on the up-converter 1. In addition to the up-converter 1 as shown in FIG. 1, the up/down converter 20 comprises additional third switching means S3, by which the first connection end of the coil L connects to the first input terminal 2, and fourth switching means S4 connecting the first connection end of the coil L to the first input terminal 3 of the converter 20. Further, first diode means D1 are parallel connected to the fourth switching means S4, providing a conduction path in forward direction from the second output terminal 5 to the first connection end of the coil L. Control means 15 are provided for controlling the switching means S1, S2, S3 and S4 as indicated by arrows 11, 12, 13 and 14, respectively.

[0045] In a typical conversion cycle of the converter 20, during a first phase, the first switching means S1 and the third switching means S3 are in a conductive state and the second switching means S2 and the fourth switching means S4 are in a non-conductive state. During this first phase, energy is stored in the coil L.

[0046] In a second phase of the switching cycle, the first switching means S1 and the fourth switching means S4 are in a non-conductive state and the second switching means S2 and the third switching means S3 are in a conductive state. During this phase, the coil current remains stable and energy is transferred to the output terminals 4, 5, resulting in an output voltage Vout.

[0047] In a third phase, the first switching means S1 and the third switching means S3 are in a non-conductive state and the second switching means S2 and the fourth switching means S4 are in a conductive state. In this phase, the coil current decreases, because no energy is supplied thereto from the input, while energy is transferred to the output.

[0048] By controlling the amount of energy supplied to the coil L, the output voltage Vout can be higher than the input voltage Vin, i.e. the up-conversion mode, or the output voltage Vout can be less than the input voltage Vin, i.e. the down-conversion mode of the converter 20.

[0049] FIG. 3 shows a preferred embodiment of the DC/DC up/down converter 30 according to the present invention, having an input comprised by first and second input terminals 31, 32, a first output comprised by first and second output terminals 33, 34 and a second output comprised by third and fourth output terminals 35, 36. The second input terminal 32 and the second and fourth output terminals 34, 36 connect to a common conduction path, such as the earth or mass 37 of an electronic appliance 50.

[0050] The converter 30 according to the invention likewise comprises energy storage means in a form of a coil L, having a first connection end which connects via first switching means S1 to the second and fourth output terminals 34, 36. A second connection end of the coil L connects to the first output terminal 33. The first connection end of the coil L connects via second switching means S2 to the third output terminal 35 and via switching means S3 to the first input terminal 31. As disclosed in connection with the up/down converter of FIG. 2, first diode means D1 connect parallel to the first switching means S1 and second diode means D2 connect parallel to the second switching means S2. Smoothing capacitors C1 and C2 connect between the output terminals 33, 34 and 34, 35, respectively. The second switching means S2 are optional and are used to increase the power conversion efficiency of the DC/DC convertor.

[0051] Control means 40 are arranged for measuring the output voltage Vout1 at the first output, schematically indicated by a dashed arrow 38, and for measuring the output voltage Vout2 at the second output, schematically indicated by a dashed arrow 39. Control of the first S1, second S2, and third switching means S3 by the control means 40 is schematically indicated by arrows 41, 42 and 43, respectively.

[0052] The operation of the multi-output DC/DC up/down converter 30 according to the present invention can be best illustrated with reference to FIG. 4, wherein the coil current I against the time t is depicted, in a typical switching cycle in PFM mode or discontinues mode, wherein the current I through the coil L becomes zero. A typical switching cycle comprises seven different phases:

[0053] Φ0: the switching means S3 are in a conductive or closed state and the switching means S1 and S2 are in a non-conductive or open state, such that energy from an input voltage source, providing an input voltage Vin, is stored in the coil L and transferred to the first output resulting in an output voltage Vout1.

[0054] Φ1: the switching means S1 are closed and the switching means S2 and S3 are open, such that energy in the coil L is transferred to the first output.

[0055] Φ2: the switching means S1 are closed and the switching means S2 and S3 are open, such that energy is transferred from the first output to the coil L. The current in the coil L flows in opposite direction compared to Φ0 and Φ1.

[0056] Φ3: the switching means S2 are closed and the switching means S1 and S3 are open, wherein energy from the coil L and from the first output 1 is transferred to the second output 2, resulting in an output voltage Vout2.

[0057] Φ4: all switches are open, such that the remaining energy in the coil L is transferred to the first output via the diode D1.

[0058] Φ5: all switches are open, such that the remaining energy in the coil L is transferred to the second output. Current flow I in the coil L is in opposite direction compared to phase Φ4.

[0059] Φ6: all switches are open, the current I through the coil is zero.

[0060] It will be appreciated that the control means 40 control the switching means S1, S2 and S3 in accordance with desired output voltages Vout1 and Vout2, by measuring same with respect to reference voltages Vref1 and Vref2 (not shown), however such that Vout1<Vin and Vout2>Vout1.

[0061] By comparing the DC/DC up/down converters of FIGS. 2 and 3, it can be seen that the converter 30 according to the invention is realised with one switch less than the prior art converter 20. In a case of semiconductor transistor switching means, such as Metallic Oxide Semiconductor (MOS) transistors, it will be appreciated that the switching loss and overall series resistance of the converter 30 according to the invention are reduced compared to the prior art converter 20. In the case of an integrated circuit converter, the converter 30 according to the invention requires less chip area compared to the converter 20, because of the reduced number of switching means.

[0062] The DC/DC up/down converter operating in accordance with the principles of the present invention, may be used in an electronic appliance 50, such as a portable electric appliance, or arranged to form a separate power supply, schematically indicated by a dashed-dotted block 45 in FIG. 3.