Electrical-supply-free MOS integrated circuit

[0002] The present application claims priority under 35 U.S.C. Section 120 of PCT/CA02/01223 filed Aug. 5, 2002 designating the United States of America, now abandoned.

[0003] The invention relates to the design of silicon VLSI circuits. More specifically, it relates to the scheme of control and power supply of silicon VLSI circuits.

[0004] Conventional Very Large Scale Integration (VLSI) circuits are driven by electrical signals and power supplies to perform designed functions, controls, and signal transfer. Optical power can be used as a supply source by means of certain devices, such as solar cells, or photovoltaic cells made of amorphous silicon or III-V elements [Y. Liu et al., “Optically powered optical interconnection system”, IEEE Photonics Technology Letters, Vol. 1, no. 1, January 1989, pp 21-23]. Such devices, due to the limitations of semiconductor material, surface required and fabrication process, are not technologically compatible with highly compact VLSI circuits.

[0005] In U.S. Pat. No. 4,523,217, Jibu describes a solar powered circuit with CMOS and bipolar transistors. The solar cell provides a reference voltage to the base of the first bipolar transistor and a constant voltage circuit is provided in the substrate. In U.S. Pat. No. 4,701,646, Richardson describes using a photodiode for biasing or level-shifting.

[0006] However, little work has been reported on the design of optically controlled and simultaneously optically supplied VLSI circuits implementable in a CMOS process. CMOS is the type of technology used for most of the electronic circuits designed.

[0007] Moreover, since it is essential to keep up with the fast advances in technology, there is a need to develop VLSI circuits and systems without dedicated electrical power supply. There is also a need to efficiently solve problems of power distribution, interconnection, control, and interfacing in VLSI circuits.

[0008] Accordingly, an object of the present invention is to develop electrical-supply-free circuits and systems.

[0009] Another object of the present invention is to adjust voltage levels and produce large on-chip voltages without dissipating electrical power.

[0010] Yet another object of the present invention is to implement logic functions, optical and/or electrical signal routing and switching, as well as optical timing in digital CMOS circuits.

[0011] According to a first broad aspect of the present invention, there is provided a circuit comprising: a first semiconductor device having at least a first current terminal, a first input voltage terminal, and a first common terminal, said semiconductor device having a voltage between said first input voltage terminal and said first common terminal that controls a current leaving said first current terminal; and a first opto-electronic device having a first anode connected to said first current terminal and a first cathode connected to a ground to convert an input of incident light into an electrical signal, said first opto-electronic device having photodiode and photovoltaic cell capabilities; wherein a voltage is set between a node of said first current terminal that is connected to said first anode and said first common terminal.

[0012] Preferably, the circuit comprises a voltage booster module to set the input voltage of the semiconductor device at a biasing level.

[0013] According to a second broad aspect of the present invention, there is provided a method for controlling an electrical-supply-free integrated circuit, the method comprising: injecting optical energy into an opto-electronic device connected to a semiconductor device to supply power and act as an input; lowering a voltage at a node of the opto-electronic device and the semiconductor device to substantially zero by removing the injection of the optical energy into the opto-electronic device; lowering a voltage at the node to substantially zero by applying an electrical signal to set the semiconductor device in its on-state; raising a voltage at the node to a high level distinguished from zero volts by injecting optical energy into the opto-electronic device and applying an electrical signal to set the semiconductor device in its off-state.

[0014] According to a third broad aspect of the present invention, there is provided a method for locally powering multiple circuit elements on an integrated circuit using light, the method comprising: providing an opto-electronic device for each of the multiple circuit elements on the integrated circuit; projecting light onto a surface of the integrated circuit, each of the opto-electronic device converting the light into a voltage; using the voltage to supply power to the multiple circuit elements on the integrated circuit; wherein no power line is present on the integrated circuit for the multiple circuit elements.

[0015] According to a fourth broad aspect of the present invention, there is provided a method for selectively activating a plurality of groups of circuits interconnected on an integrated circuit chip using light, the method comprising: providing an opto-electronic power source means for each of the plurality of groups of circuits; selectively powering at least one of the groups of circuits by projecting the light onto selected ones of the opto-electronic means in order to define a function of the integrated circuit chip.

[0016] These and other features, aspects and advantages of the present invention will become better understood with regard to the following description and accompanying drawings wherein:

[0017] FIG. 1 is a circuit diagram of the basic cell;

[0018] FIG. 2 is a circuit diagram of the basic cell with a voltage booster;

[0019] FIG. 3 is an embodiment of a voltage booster;

[0020] FIG. 4 is a CMOS implementation of FIG. 1;

[0021] FIG. 5 is a CMOS implementation of FIG. 3;

[0022] FIG. 6 is a logic function implemented with the basic cell;

[0023] FIG. 7 is a ring oscillator implemented with the basic cell.

[0024] Throughout this application, the preferred embodiment of the present invention will be referred to as a “basic cell” of a “VLSI circuit”. It can be appreciated that although the preferred embodiment refers to a photodiode, the function performed may also be that of a photovoltaic cell.

[0025] The circuit diagram of the basic cell is illustrated in FIG. 1. The cell is composed of a Metal Oxide Semiconductor (MOS) transistor and a photodiode, D_o, connected between the drain of the transistor and the ground. The output voltage of the cell, V_f, is determined by the input voltage V_xand the incident light Φ_y, which brings photons into the photodiode by shining on the area of the photodiode. The currents flowing through the output node V_fare as shown in FIG. 2. The current i_Nis the transistor current. The photodiode has two current components. One is the photocurrent i_Φ which is the reverse current enhanced by the charges converted from the incident photons. The other is the forward current i_fwwhich can become significant only when the photodiode is forward-biased.

[0026] When the photodiode is exposed to light, i.e. Φ_y>0, the basic cell can function in one of two ways. When V_xis high enough for a good conducting channel to be created in the transistor, the transistor is turned on and a current path is established to circle the photocurrent i_Φ. In this case, incoming photons contribute to reinforce the reverse current and no significant charge accumulation occurs across the photodiode. Consequently, V_f≈0, i_fw≈0, and i_N≈i_Φ. If V_xis lowered, for instance, to 0 V, the conductivity of the transistor will be significantly reduced. In this case, i_Noff<i_Non≈i_Φ, wherein i_Noffis the transistor current when the transistor is off and i_Nonis the transistor current when the transistor is on. The current difference between i_Φ and i_Noffresults in an accumulation of photo-charge across the PN junction of the photodiode. Then, as a consequence of the charge accumulation, V_fbecomes more positive and the photodiode gets more forward biased, raising the forward current i_fw. As soon as V_fbecomes positive enough to make i_fw=i_Φ−i_Noff, the charge accumulation stops and V_fstops rising. Therefore, when V_xis low, the level of V_fin steady state depends on the difference between the photocurrent, which is related to the incident power, and the “off-state” current of the MOS transistor. With a given level of illumination, the maximum level of V_fcan be obtained when the transistor is well cut-off: i_Noff=0, and i_fw=i_Φ.

[0027] When there is no optical radiation incident on the photodiode, Φ_y=0, i.e. the logic signal y=0, regardless of the level of the input voltage, the output voltage V_fwill not be in the high level. The cell is therefore not activated.

[0028] The level of the output voltage V_fof the basic cell results from a comparison between the photocurrent i_Φ and the transistor current i_N. The former depends on the illumination Φ_yand the latter is controlled by the input voltage V_x. The level of V_fwill be significantly higher than 0 V when i_N<<i_Φ. This happens only if V_xis low enough for i_Noffto be a minimum and, at the same time, the photodiode is illuminated. It should be stressed that, if the condition (i_Noff<<i_Φ) is not satisfied, the circuit may not be able to operate correctly. For instance, if the transistor gate is too short and the photodiode D_ois too tiny, the difference between the off-state current i_Noffand the photocurrent i_Φ may not be significant enough to cause a charge accumulation in D_o, and the output voltage may not be able to rise from 0 V. Therefore, the parameters of the devices should be calculated to estimate the range of the currents. A test circuit involving several cells described above has been designed, fabricated, and tested with successful results. In this test circuit, the length of gate of the MOS transistor is 0.35 μm, the diode, composed of P-diffusion and N-well layers, occupies a space of 4.3 μm², and the amplitude of the output voltage reached 400 mV with room illumination.

[0029] If V_xand Φ_yare binary signals, the logic function f=(!x)y is performed in this cell. The signal Φ_ycan be considered as the enable signal activating the cell performing an inversion function.

[0030] The low level of the output voltage is approximately 0 V. Its high level can be between 0.4 and 0.5 V under normal illumination condition. The NMOS transistor operates in a subthreshold mode. The characteristic of the current versus the gate-to-source voltage is approximately exponential. If the voltage swing of V_xis 400 mV, the current ratio i_Non/i_Noffwill be greater than 10⁴, which is enough to distinguish the two logic states if the circuit is used for logic operations. Therefore, despite the small voltage swing of V_x, the circuit operation is robust. Furthermore, the cell does not dissipate any power from electrical sources. The high level of the output voltage V_fis set up with the energy carried by the signal Φ_y. Therefore, the incident light plays two roles simultaneously: a data/control signal and the power supply of the basic cell.

[0031] The basic cell can be cascaded with other basic cells, i.e. the voltage V_fcan be applied to the input terminal of a cell of the same structure as the basic cell. If the circuit is fabricated using a technology in which the nominal zero-bias threshold voltage of the transistors is low, such as 0.4 V, no voltage boost will be needed. However, certain transistors may have a high threshold voltage, such as 0.6 V. In this case, if the input voltage swings between 0 and 0.4 V, the transistor will always be in the same state: off. In this case, in order to change the state of the transistor a voltage booster module is connected to the gate of the transistor. This is shown in FIG. 2. This voltage booster module add a negative voltage shift to the gate of the transistor. With the module, the effective threshold voltage of the transistor decrements by V_bst. Therefore, the transistor can be turned on even if the nominal threshold voltage of the transistor is greater than the input voltage of the cell.

[0032] FIG. 3 shows one embodiment for the voltage booster. To boost the voltage level, a photodiode, of which the anode is connected to the gate of the transistor, is used. When the diode, D_i, is illuminated, voltage V_bstis about +0.4 V, established by means of the photovoltaic effect. If multiple photodiodes are connected in series to the MOS gate, a larger V_bstwill be obtained. Therefore, besides functioning as a data/control input and a power supply, the incident light can also be used simultaneously to boost voltage levels. The area of D_ican be very small. The potential difference can be easily established between the two electrodes of the diode even with a very low illumination. Moreover, this level boost does not take any power from any electrical source.

[0033] The circuit consisting of the basic cells can be implemented in a standard CMOS process. FIGS. 4 and 5 illustrate, respectively, the implementations of the basic cells shown in FIGS. 1 and 3 using an N-well CMOS technology. The basic cell can be used to generate large on-chip voltages. This approach is significant when the circuit is wireless and/or electrical-supply-free.

[0034] Many schemes can be devised for designing electrical-supply-free VLSI circuits on the basis of the basic cell. The principle of the basic cell can lead to a new approach of VLSI design and to a practical implementation of electrical-supply-free circuits. A logic function is one such scheme. FIG. 6 illustrates using a basic cell and two voltage boosts modules to realize a NOR gate. (the voltage boost modules may not be needed in some cases) The logic function, f=(notx)(notz)y, is implemented. Another circuit easily implemented with the basic cell is an optically controlled signal generator. FIG. 7 illustrates how a ring oscillator can be realized using the basic cell. An odd number of the basic cells are cascaded together and the final output voltage is fed back into the gate of the first transistor. The frequency of the oscillator is related to the number of basic cells, and in particular, controlled by the intensity of the incident light. The delay of the inverter cells is determined by the speed of the charge accumulation which depends on the rate of incident photon flow.

[0035] Optical system timing and control can also be implemented using the basic cell. With each cell having an optical enable input, the distribution of timing and control signals and the placement of the control units in the conventional electronic circuits can be simply replaced by projections of optical control signals on specific circuit areas. Using optical signals for remote control is an example.

[0036] Another possibility is using the basic cell for optical data transmission to a silicon multi-port reception/processing circuit. If the circuit blocks are integrated in the same silicon base to receive different optical signal beams, aiming a signal beam at its destination circuit area activates the data reception and processing in this part of the circuit. The signals can get their respective destinations without electronic addressing.

[0037] Furthermore, the circuit operations can be programmed by projecting optical beams carrying timing consequences.

[0038] It will be understood that numerous modifications thereto will appear to those skilled in the art. Accordingly, the above description and accompanying drawings should be taken as illustrative of the invention and not in a limiting sense. It will further be understood that it is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains and as may be applied to the essential features herein before set forth, and as follows in the scope of the appended claims.