Method for producing multi-layer circuits

[0007] The present invention relates to a method for producing multi-layer printed circuit boards.

[0008] Multi-layer printed circuit boards having a high wiring density have, in recent times, been advantageously produced by the so-called SBU (“sequential build-up”) method. The electrical connection between the individual conductors (“through-platings”) is customarily produced by means of drilled holes, which pass through the conductor planes and are metal-plated. The mechanically drilled holes are, however, relatively large (minimum diameter about 0.3 mm) and limit the wiring density of the printed circuit board. DE-A 38 40 207 describes a method for producing multi-layer printed circuit boards wherein through-platings of small diameter are produced photochemically with the aid of photoresist materials.

[0009] U.S. Pat. No. 5,451,721 also proposes an SBU method wherein through-platings are first established between the individual conductor planes using photoresists. Then, a conductive connection is produced between the outermost wiring layers by means of mechanically drilled and metal-plated through-holes. In the printed circuit board so produced, the two outer wiring layers are used for power supply lines whereas the signal wiring lines are located in the interior of the laminate.

[0010] The method described in U.S. Pat. No. 5,451,721 is, however, of only limited suitability for producing printed circuit boards having a disparate number of wiring layers on both sides of the laminate core because, in the case of the arrangement built up asymmetrically, a high degree of curvature is to be expected, especially when laminate cores less than 0.8 mm thick are used, caused by polymerisation shrinkage of the dielectric layer applied to only one side. In addition, copper-plating the copper layer on the rear one or more times results in disparate copper thicknesses on both sides of the board. The subsequent etching customarily carried out simultaneously on both sides results in over-etching of the upper, thinner copper layer.

[0011] The aim of the invention was to develop a method for producing sequentially built-up printed circuit boards having a disparate number of conduction planes on both sides of the laminate core that does not have the above-mentioned disadvantages.

[0012] It has now been found that satisfactory results are obtained by starting from a laminate core that has conductor structures on only one side, coating that core on both sides with a dielectric, but structuring only one side and fully curing the other side.

[0013] The present invention accordingly relates to a method for producing sequentially built-up printed circuit boards having a disparate number of conduction planes on both sides of the laminate core, which method comprises the following method steps:

[0014] (A) coating both sides of a printed circuit board having conductor structures on only one side with a dielectric comprising a photopolymer or a thermally curable polymer;

[0015] (B) structuring the plating holes (vias) on the side having the conductor structures by exposing the dielectric comprising a photopolymer to light and then developing with a solvent or by laser-drilling the plating holes (vias) into the dielectric comprising a thermally cured polymer;

[0016] (C) depositing a copper layer on both sides of the board so obtained;

[0017] (D) forming conductor structures on the front and completely etching away on the rear, if further asymmetric build-up is to be carried out, or on both sides of the printed circuit board if there is to be no further build-up or if further build-up is to be carried out symmetrically, by means of selective etching with the aid of resists;

[0018] (E) repetition of process steps (A) to (D) if further asymmetric build-up is to be carried out or (A) and subsequent structuring (F) of the dielectric layer on both sides followed by (C) and (D) if further build-up is to be carried out symmetrically.

[0019] FIGS. 1-5 depict the various stages of the process of this invention.

[0020] The invention is illustrated by the accompanying drawings.

[0021] FIG. 1 shows an insulating substrate (1), preferably a glass-fibre-reinforced epoxy resin, which has conductor structures (2) on only one side. In method step (A), both sides of the single-sided printed circuit board are coated with a dielectric curable material (3 and 4, FIG. 2).

[0022] Coating is performed by the customary methods, for example by spin-coating, immersion, knife coating, curtain pouring, screen-printing, brush application, spraying, electrostatic spraying or reverse roller coating.

[0023] The printed circuit board is preferably coated by means of curtain pouring or screen-printing.

[0024] The dielectric material may be applied in the form of a solution or also in the form of a dry film. When a solution is used, the solvent is subsequently removed by drying. The dielectric coating thickness must be greater than the height of the copper conductor tracks of the printed circuit board. The dry coating is advantageously about from 20 to 150 μm thick, preferably from 30 to 80 μm thick.

[0025] A photopolymer (photo-via process) or a thermally curable polymer (laser-via process) may be used as the dielectric material.

[0026] In the photo-via process, positive photoresists or negative photoresists may be used. Suitable photoresist materials will be known to the person skilled in the art. Examples thereof are the positive photoresists described in EP-A 689 098 and the negative photoresists known from EP-A 605 361.

[0027] The printed circuit board used in method step (A) may already be a conventional multilayer circuit wherein the through-plating holes have not yet been drilled or wherein the drilled through-plating holes have been closed using a resin.

[0028] In method step (B) (FIG. 3), the dielectric on the side having the conductor structures is removed, by means of image-producing methods, at the locations (5) intended for the through-plating holes.

[0029] In the photo-via process, the photoresist coating is exposed to light through a mask corresponding to the conductor structure to be applied and is developed. In order to achieve complete crosslinking, it is advisable for thermal after-curing to be carried out after method step (B).

[0030] When a negative photo-via dielectric is used, full-area exposure of both sides to light is additionally carried out preferably before or after thermal after-curing.

[0031] On the rear of the printed circuit board, the dielectric material which has not undergone prior structuring is fully cured over the entire area.

[0032] In the case of a negative photoresist this is carried out by full-area exposure to light and, where appropriate, thermal after-curing. In the case of a positive photoresist the rear of the printed circuit board is subjected to full-area full thermal curing without prior exposure to light.

[0033] If no additional conduction planes are required and through-platings have not yet been provided between the front and rear of the printed circuit board, the through-platings may be prepared by means of drilled holes after method step (B) has been carried out.

[0034] The printed circuit board so obtained is roughened on both sides by etching in accordance with known methods (for example, using aqueous KMnO₄solution). The entire surface is then chemically copper-plated (FIG. 4), i.e. a thin copper layer (6) is applied by currentless plating. Where appropriate, subsequent drying is carried out and the copper layer is thickened by electrodeposition.

[0035] In method step (D), the copper layer is then structured on both sides by selective etching (FIG. 5), generally by coating both sides of the printed circuit board with an etching resist, exposing to light imagewise, developing, and removing the uncovered copper. This may be carried out in an etching process (“panel plating process”) or in the electrodeposition process (“pattern plating process”).

[0036] If additional conductor planes are required, method steps (A) to (D) may be repeated as often as desired.