System and method for allocating buffers for message passing in a shared-memory computer system

[0002] The invention relates generally to the field of digital computer systems, and more particularly to mechanisms for facilitating transfer of information between and among a plurality of processes.

[0003] Computers typically execute programs in one or more processes or threads (generally “processes”) on one or more processors. If a program comprises a number of cooperating processes which can be processed in parallel on a plurality of processors, sometimes groups of those processes need to communicate to cooperatively solve a particular problem. Two basic architectures have been for multi-processor computer systems, namely, distributed memory systems and shared memory systems. In a computer system constructed according to the distributed memory architecture, processors and memory are allocated to processing nodes, with each processing node typically having a processor and an associated “node memory” portion of the system memory. The processing nodes are typically interconnected by a fast network to facilitate transfer of data from one processing node to another when needed for, for example, processing operations performed by the other processing node. Typically in a computer constructed according to the distributed memory architecture, a processor is able to access data stored in its node memory faster that it would be able to access data stored in node memories on other processing nodes. However, contention for the node memory on each processing node is reduced since there is only one processor, that is, the processor on the processing node, which accesses the node memory for its processing operations, and perhaps a network interface which can access the node memory to store therein data which it received from another processing node, or to retrieve data therefrom for transfer to another processing node.

[0004] Typically, in a computer system constructed according to the shared memory architecture, the processors share a common memory, with each processor being able to access the entire memory in a uniform manner. This obviates the need for a network to transfer data, as is used in a computer system constructed according to the distributed memory architecture; however, contention for the shared memory can be greater than in a computer system constructed according to the distributed memory architecture. To reduce contention, each processor can be allocated a region of the shared memory which it uses for most of its processing operations. Although each processor's region is accessible to the other processors so that they (that is, the other processors) can transfer data thereto for use in processing by the processor associated with the respective region, typically most accesses of a region will be by the processor associated with the region.

[0005] A computer system can be constructed according to a combination of the distributed and shared memory architectures. Such a computer system comprises a plurality of processing nodes interconnected by a network, as in a computer system constructed according to the distributed memory architecture. However, each processing node can have a plurality of processors which share the memory on the respective node, in a manner similar to a computer constructed according to the shared memory architecture.

[0006] Several mechanisms have been developed to facilitate transfer of data among processors, or more specifically, between processing node memories, in the case of a computer system constructed according to the distributed memory architecture, and/or memory regions, in the case of a computer system constructed according to the shared memory architectures. In one popular mechanism, termed “message passing,” processors transfer information by passing messages therearnong. Several well-known message passing specifications have been developed, including MPI and PVM. Generally, in message passing, to transfer data from one processor to another, the transferring processor generates a message including the data and transfers the message to the other processor. On the other hand, when one processor wishes to retrieve data from another processor, the retrieving processor generates a message including a retrieval request and transfers the message to the processor from which the data is to be retrieved; thereafter, the processor which receives the message executes the retrieval request and transfers the data to the requesting processor in a message as described above.

[0007] In a computer system constructed according to the distributed memory architecture, the messages using the message passing mechanism are transferred between processing nodes over the network and processed or otherwise handled by the respective processing node when they arrive at the respective destination. In a computer system constructed according to the shared memory architecture, several buffer arrangements have been developed to facilitate message transfer. In one arrangement, each process is provided with a plurality of buffers, each associated with one of the other processes. When an “i-th” process wishes to transfer a message to another “j-th” process, it (that is, the “i-th” process) deposits the message in a buffer B(i,j) that is maintained therefor. Similarly, when the “j-th” process wishes to transfer a message to the “i-th” process, it (that is, the “j-th” process), will deposit the message in another buffer B(j,i) maintained therefor. Thereafter, the “j-th” process can retrieve the message by copying it to its region of memory, after which the “i-th” process can again transfer a message to the “j-th” process. Allocating buffers in this manner ensures that there will be no contention for buffers as among processes attempting to transmit messages to the same process; thus, after the “i-th” process has deposited a message for the “j-th” process in buffer B(i,j), the “k-th” process can also transfer a message to the “j-th” process by depositing the message in the buffer B(k,j) before the “j-th” process has copied the “i-th” process's message from the buffer B(i,j). However, since each buffer is typically relatively large, generally sufficiently large as to be able to accommodate a relatively large message, it will be appreciated that a significant portion of the memory address space may be required for the buffers, and further that the portion will increase, with increasing numbers of processes, on the order of N², where “N” is the number of processes.

[0008] In another mechanism, instead of providing relatively large buffers B(i,j) for the respective processes, a buffer pool is provided comprising a plurality of buffers available to all of the processes, with the buffers B(x) in the pool having sizes on the order of the sizes of the buffers B(i,j). In addition, each process is provided with a relatively small buffer, referred to as a postbox P. When the “i-th” process wishes to transfer a message to the “j-th” process, if the message will fit into the postbox, it (that is, the “i-th” process) will store the message in its postbox P(i,j) for the “j-th” process. On the other hand, if the message will not fit into the postbox, the “i-th” process will allocate a buffer B(x) from the pool, load the message into the buffer B(x) and load a pointer to the buffer B(x) in its postbox P(i,j) for the “j-th” process. Thereafter, the “j-th” process can detect that a message or pointer has been loaded into its postbox P(i,j) and retrieve it (that is, the message or pointer) therefrom. If the postbox P(i,j) contains a pointer, the “j-th” process can use the pointer to identify the buffer B(x) which contains the message and retrieve it (that is, the message) therefrom by copying it to its region of memory. After the “j-th” process has retrieved the message from the buffer B(x), it can return the buffer to the buffer pool. This mechanism provides the advantage that it reduces the amount of memory space which is needed to be provided from that described above, since the postboxes P(i,j) require far less space than the buffers B(i,j), and the number of buffers B(x) can be bounded, with the number being fixed, growing with “N,” the number of processes perhaps linearly, or the like. However, some contention for buffers is possible with this mechanism. In addition, some mechanism needs to be provided to synchronize access to the buffers, to ensure that, after the “i-th” process has deposited a message for the “j-th” process in a buffer B(x), another “k-th” process does not deposit a message in the same buffer B(x) before the “j-th” process has retrieved the message. Typically, such lock/unlock mechanisms can become a bottleneck, particularly if a large number of processes wish to send messages contemporaneously.

[0009] The invention provides a new and improved system and method for allocating buffers for message passing in a shared-memory computer system, thereby to facilitate transfer of messages among processes which share the computer system's memory.

[0010] In brief summary, the invention provides a communication arrangement that facilitates transfer of messages among a plurality of processes in with a computer, the computer having a memory shared by the processes. The communication arrangement comprises, allocated to each process, a plurality of buffers, and a plurality of postboxes each associated with one of the other processes. Each process includes a message size determination module and a message transfer module. The message size determination module is configured to determine whether a message to be transferred to another process can be accommodated by a postbox. The message transfer module is configured to (i) in response to a positive determination by the message size determination module, store the message in the postbox associated with the process as allocated to the other process, and (iii) in response to a negative determination by the message size determination module, store the message in one of the buffers allocated thereto, and providing a pointer to the one of the buffers in the postbox associated with the process as allocated to the other process.

[0011] This invention is pointed out with particularity in the appended claims. The above and further advantages of this invention may be better understood by referring to the following description taken in conjunction with the accompanying drawings, in which:

[0012] FIG. 1 schematically depicts a computer system including an arrangement for allocating buffers for message passing in a shared-memory computer system, constructed in accordance with the invention;

[0013] FIG. 2 schematically depicts data structures which are useful in connection with the buffer allocation arrangement for the computer system depicted in FIG. 1;

[0014] FIG. 3 is a flow chart describing operations performed by a process in connection with transferring a message using the buffer allocation arrangement;

[0015] FIG. 4 is a flow chart describing operations performed by a process in connection with receiving a message using the buffer allocation arrangement; and

[0016] FIG. 5 schematically depicts data structures which are useful in connection with a second embodiment of the buffer allocation arrangement.

[0017] FIG. 1 schematically depicts a computer system 10 including an arrangement for allocating buffers for message passing in a shared-memory computer system, constructed in accordance with the invention. Generally, the computer system 10 includes one or more computers 11(1) through 11(N) (generally identified by reference numeral 11(n)), interconnected by a network represented by communication link 14. At least some of the computers 11(n) are constructed along a symmetric multi-processor (“SMP”) architecture, with each SMP including hardware resources comprising a plurality of processors (not separately shown) which share common memory resources (also not separately shown). In the following, it will be assumed that the computers 11(n) are all constructed along the lines of an SMP architecture, and may also be referenced as SMP's 11(n). In the computer 10 depicted in FIG. 1, each SMP 11(n) can process in parallel a plurality of processes or threads (generally, “processes”) 12(1)(1) through 12(N)(M) (generally identified by reference numeral 12(n)(m)) organized in one or more programs. The processes 12(n)(m) in each SMP 11(n) share a common memory 13(n), with each process being allocated a region 13(n)(m) of the memory 13(n). The total number of processes 12(n)(m) which each SMP 11(n) can execute may be greater than the total number of processors which the respective SMP 11(n) maintains, and, if so, the computer's operating system (not shown) will enable the processes to be executed in a series of time intervals or slots, with selected ones of the processes 12(n)(m) being executed at any point in time.

[0018] As noted above, each process 12(n)(m) is allocated a region 13(n)(m) of the common memory 13(n), which it will normally use in its processing operations. Each process 12(n′)(m′) can, however, communicate with another process 12(n′)(m″) (m″ m′)) to send information thereto by sending one or more messages thereto. The messages effectively result in the storing of information in the memory region 13(n′)(m″) of memory 13(n′) allocated to that process 12(n′)(m″). A number of message passing methodologies which may be used by the processes 12(n)(m) are known to those skilled in the art. After the information has been stored into the memory region 13(n′)(m″) allocated to that process 12(n′)(m″), the process 12(n′)(m″) can use the information in its processing operations.

[0019] As noted above, the SMP's 11(n) are interconnected by a communication link 14. Each SMP also includes a network interface 15(n) to connect the respective SMP 11(n) to the communication link 14 to facilitate transfer of information among the SMP's 11(n), and specifically among processes 12(n)(m) maintained thereby. For example, a process 12(n′)(m′) can communicate with another process 12(n″)(m″) (where n″ n′, but m″ may equal m′) to send information thereto by sending one or more messages thereto. In that case, the messages will be transmitted by the network interface 15(n′) of SMP 11(n′) and transmitted over the communication link 14 to the network interface 15(n″) of SMP 11(n″), and the network interface 15(n″) will, in turn, store the information in the memory region 13(n″)(m″) associated with the process 12(n″)(m″). After the information has been stored into the memory region 13(n″)(m″) allocated to that process 12(n″)(m″), the process 12(n″)(m″) can use the information in its processing operations.

[0020] The invention provides an arrangement for allocating buffers for use in message passing among processes in the computer system 10. Generally, according to the buffer allocation arrangement, each process 12(n)(m) maintains:

[0021] (i) a postbox P(n,m)(n′,m′) associated with each of the other processes 12(n′,m′), and

[0022] (ii) a buffer pool comprising a plurality of buffers B(n,m)(x) (x=1, . . . , X_n,m)

[0023] The postboxes P(n,m)(n′,m′) and buffer pool associated with process 12(n)(m) may be established in the region 13(n)(m) associated with the process 12(n)(m), or in a memory region (not separately shown) that is shared among all of the processes. The process 12(n)(m) has exclusive ownership and control over the buffers B(n,m)(x) in its buffer pool. Generally, when a process 12(n)(m) wishes to send a message to another process 12(n′)(m′), if the message is small enough to fit into a postbox, it (that is, process 12(n)(m)) will load the message into the postbox P(n′,m′)(n,m) which process 12(n′)(m′) maintains therefor, after which the process 12(n′)(m′) can retrieve the message by copying it from the postbox to its region 13(n′)(m′) of the common memory 13(n). On the other hand, if the message is not small enough to fit into a postbox, the process 12(n)(m) selects one of its buffers B(n,m)(x_y) (1y X_n,m), load the message into the selected buffer B(n,m)(x_y), and store a pointer to the selected buffer B(n,m)(x_y) in the postbox P(n′,m′)(n,m) which process 12(n′)(m′) associates with process 12(n)(m). Thereafter, the process 12(n′)(m′) can retrieve the message by initially retrieving the pointer from its postbox P(n′,m′)(n,m), using the pointer to identify the buffer B(n,m)(x_y) into which the message was loaded, and copying the message from the identified buffer B(n,m)(x_y) to its region 13(n′)(m′) of the common memory 13(n).

[0024] The inventive buffer allocation arrangement provides a number of advantages. Since the number X_n,mof buffers B(n,m)(x) in the buffer pool that is associated with each process can be determined a priori, and need not be related to the number of processes, the total number of buffers B(n,m)(x) can vary according to the number of processes, rather than the square of the number of processes, as with the first shared-memory message passing mechanism described above. Depending on the types of processing operations performed by the program comprising the processes 12(n)(m) and communication patterns thereamong, it may be desirable to provide more buffers than for processes comprising other programs. Alternatively or in addition, it may be desirable to provide different numbers of buffers B(n,m)(x) for the processes 12(n)(m) comprising a program, depending on communication patterns thereamong.

[0025] In addition, since each process 12(n)(m) has ownership over the buffers B(n,m)(x) in its buffer pool, the buffer allocation arrangement avoids the necessity of allocating a buffer from a common pool, with the attendant synchronization mechanism, as is required in connection with the second shared-memory message passing mechanism described above, thus avoiding the lock/unlock bottleneck.

[0026] The buffer allocation arrangement will be described in greater detail in connection with FIGS. 2 through 4, with FIG. 2 schematically depicting the arrangement of buffers and postboxes associated with the respective processes, and FIGS. 3 and 4 depicting a flow chart describing operations performed by the processes in connection with transfer of messages using the buffers and postboxes depicted in FIG. 2. With reference initially to FIG. 2, that FIG. particularly depicts data structures maintained by the common memory 13(1) associated with the processes 12(1)(m) of SMP 11(1) in connection with the buffer allocation arrangement. Generally, the data structures provided in all of the regions for the respective processes 12(1)(m) will be similar, and so only structures provided in region 13(1)(1) are shown in detail. As shown in FIG. 2, region 13(1)(1) includes a postbox block 20(1)(1) and a buffer pool 22. The postbox block 20(1)(1), in turn, includes a plurality of postboxes 21(1,1)(1) through 21(1,1)(P) (generally identified by reference numeral 22(1,1)(n,m)), each of which is associated with one of the other processes comprising, for example, the program which includes or makes use of the process 12(1)(1) associated with the region 13(1)(1) and thus will need to communicate with it and transmit messages thereto. Thus, if, for example, only processes 12(1)(2) through 12(1)(M₁) need to transmit messages to process 12(1)(1), the postbox block 20(1)(1) will need to provide “M₁−1” postboxes 21(1,1)(P) (that is, P=M₁−1). On the other hand, if all of the processes in all of the SMP's 11(n) will need to transmit messages to process 12(1)(1), the postbox block 20(1)(1) will need to provide (M₁1−1)+M₂++M_Npostboxes 22(1,1)(P). The buffer pool 22 comprises a plurality of buffers 22(1) through 22(B) (generally identified by reference numeral 22(b).

[0027] Preferably, each postbox 21(1,1)(p) will be relatively small, and will be used by a process 12(m)(n) to transfer relatively short messages to the process 12(1)(1). On the other hand, buffers 22(b) will be relatively large, and will be used by the process 12(1)(1) to transfer relatively long messages to other processes 12(n)(m). A process 12(n)(m), if it wishes to transfer a relatively long message to the process 12(1)(1), will, in addition to storing the message data in one or more buffers that is maintaining in the buffer pool in its respective region 13(n)(m) of the common memory 13(n), also store a set of one or more pointers to the respective buffer(s) in a postbox 21(1,1)(p) maintained for process 12(1)(1) in its region 13(1)(1) of the common memory 13(1).

[0028] In either case, the process 12(1)(1) thereafter copy the data to a destination buffer therefor (not shown) in its region 13(1)(1). That is, if the message is relatively small, such that it was stored in a postbox 21(1,1)(p), the process 12(1)(1) can copy the contents of the postbox 21(1,1)(p) to the destination buffer, after which the postbox 21(1,1)(p) will be available for another message or pointer set. On the other hand, if the message is relatively large, such that data therefor was stored in one or more buffers in the buffer pool maintained by the transmitting process 12(n)(m) and a pointer set thereto stored in a postbox 21(1,1)(p), the process 12(1)(1) can use the pointer(s) in the pointer set to identify the buffer(s) in which the message data was deposited by the process 12(n)(m), and thereafter copy the data from the buffer(s) in the region 13(n)(m) in which transmitting process 12(n)(m) had stored the data, to the destination buffer in its region 13(1)(1). Thereafter, both the buffer(s) in region 13(n)(m) will be available for another message, and the postbox 21(1,1)(p) will be available for another message or pointer set.

[0029] Operations performed by a process in connection with transferring messages using the buffer allocation arrangement will be described in connection with the flowchart depicted in FIGS. 3 and 4, with FIG. 3 depicting operations performed by the process 12(n)(m) that is transferring a message to the process 12(1)(1) and FIG. 4 depicting operations performed by the process 12(1)(1) during the transfer. With reference to FIG. 3, when process 12(n)(m) determines that it is to transfer a message to process 12(1)(1) (step 100), it will initially determine whether the message is sufficiently small as to be accommodated by a postbox 21(1,1)(p) (step 101). If the process 12(n)(m) makes a positive determination in step. 101, it will determine whether a postbox 21(1,1)(p) is available. In one embodiment, the process 12(1)(1) maintains a postbox 21(1,1)(p) associated with each process that is able to transfer messages thereto, and in that case the process 12(n)(m) will determine whether the postbox 21(1,1)(n,m) that process 12(1)(1) maintains for it (that is, process 12(n)(m)) is available to it (that is, process 12(n)(m)) (step 102). The postbox 21(1,1)(n,m) may not be available to process 12(n)(m) for several reasons, including, for example, (i) the process 12(n)(m) had previously stored a message in the postbox 21(1,1)(n,m) which the process 12(1)(1) had not copied to a destination buffer, or (ii) the process 12(n)(m) had previously stored a message in one or more buffers maintained in the region 13(n)(m) associated with process 12(n)(m) and provided pointer set therefor in the postbox 21(1,1)(n,m), which pointer set the process 12(1)(1) had not retrieved therefrom for use in identifying the buffer(s) containing the data to be copied. If the process 12(n)(m) makes a negative determination in step 102, that is, if it determines that the postbox 21(1,1)(n,m) maintained for it (that is, process 12(n)(m)) by process 12(1)(1), is not available to it, it will wait at step 102. On the other hand, when the process 12(n)(m) determines in step 102 that the postbox 21(1,1)(n,m) maintained for it (that is, process 12(n)(m)) by process 12(1)(1) is available to it, it will sequence to step 103, in which it will load the message into the postbox 21(1,1)(n,m).

[0030] Returning to step 101, if the process 12(n)(m) makes a negative determination in that step, that is, if it determines that the message is too large to be accommodated by a postbox 21(1,1)(n,m), it (that is, process 12(n)(m)) will proceed to step 110 in which it will allocate one or more buffers in the buffer pool which it maintains in its memory region 13(n)(m) in which to store the message data, store the data therein (step 111), and generate a pointer set comprising one or more pointers pointing to the buffer(s) in which the data was stored (step 112). Thereafter, the process 12(n)(m) performs a series of operations, similar to those described above in connection with steps 102 and 103, to store the pointer set in a postbox 21(1,1)(n,m) maintained by the process 12(1)(1) associated with the process 12(n)(m). In those operations, the process 12(n)(m) initially determines whether the postbox 21(1,1)(n,m) that process 12(1)(1) maintains for it (that is, process 12(n)(m)) is available to it (that is, process 12(n)(m)) (step 113). If the process 12(n)(m) makes a negative determination in step 113, it will wait at step 113. On the other hand, when the process 12(n)(m) determines in step 113 that the postbox 21(1,1 )(n,m) maintained for it (that is, process 12(n)(m)) by process 12(1)(1) is available to it, it will sequence to step 114, in which it will load the pointer set into the postbox 21(1,1)(n,m). Following step 114, or step 104 if the process 12(n)(m) determined in step 101 that the message to be transferred was sufficiently small as to be accommodated in the postbox 21(1,1)(n,m), the process 12(n)(m) can continue with its other processing operations (step 115).

[0031] FIG. 4 is a flowchart depicting operations performed by the process 12(1)(1) during a transfer of a message from another process 12(n)(m). With reference to FIG. 4, when the process 12(1)(1) determines that process 12(n)(m) has loaded something into the postbox 21(1,1)(n,m) (step 120), it will retrieve the contents of the postbox 21(1,1)(n,m) therefrom (step 121) Prior to the process 12(1)(1) retrieving the contents of the postbox 21(1,1)(n,m), the postbox 21(1,1)(n,m) will not be available to the process 12(n)(m) as noted above in connection with steps 102 and 113; however, after the process has retrieved the contents of the postbox 21(1,1)(n,m), the postbox 21(1,1)(n,m) will be available to the process 12(n)(m), in which case it (that is, the process 12(n)(m)) will be able to store a message (reference step 102) or pointer set (reference step 113). In any case, after retrieving the contents of the postbox 21(1,1)(n,m) in step 121, the process 12(1)(1) will determine the nature of the retrieved contents. Initially, the process 12(1)(1) will determine whether the retrieved contents comprise a message (step 122). If the process 12(1)(1) makes a positive determination in step 122, it will copy the retrieved contents to a destination buffer (step 123).

[0032] Returning to step 122, if the process 12(1)(1) makes a negative determination in that step, which will occur if the retrieved contents do not comprise a message, it (that is, the process 12(1)(1)) will determine whether the retrieved contents comprise a pointer set (step 124). If the process 12(1)(1) makes a positive determination in that step, it will proceed to process each pointer in the pointer set to identify the buffer(s) identified thereby, retrieve the data therefrom and copy it (that is, the data) into the destination buffer maintained in its region 13(1)(1) of the common memory 13(1). In those operations, the process 12(1)(1) will initially select a previously-unselected buffer pointer from the pointer list (step 125) and retrieve the data therefrom and store the retrieved data in the destination buffer (step 126). Thereafter, the process 12(1)(1) determines whether it has selected all buffer pointers in the pointer list (step 127), and if so returns to step 125 to select another buffer pointer which has not been previously selected. The process 12(1)(1) processes steps 125 through 127 through one or more iterations, in each iteration copying data from the buffer pointed to by the buffer pointer selected in step 125 to the destination buffer. When the process 12(1)(1) finally determines in step 127 that it has selected all of the buffer pointers in the buffer pointer list it will have transferred all of the data from the buffer(s) in which the message data was stored to the destination buffer.

[0033] Returning to step 124, if the process 12(1)(1) makes a negative determination in that step (not shown), it will have determined that the retrieved contents from the postbox 21(1,1)(n,m) constitutes neither a message (reference step 122) or a pointer set to buffers containing a message (reference step 124). In that case, an error condition may exist, in which case the process 12(1)(1) may proceed to process an error routine (not shown). Alternatively, a process 12(n)(m) may load items other than a message or a pointer set to a message in the postbox 21(1,1)(n,m), and the process 12(1)(1) may process the retrieved contents in relation thereto. In any case, following step 127, or step 123 if the process 12(1)(1) determined in step 122 that the contents of the postbox 21(1,1)(n,m) contained a message, the process 12(1)(1) can continue with its other processing operations (step 128), which may include, for example, providing a status notification to the process 12(n)(m) indicating whether the message has been successfully received.

[0034] As noted above, the computer system 10 may comprise a plurality of SMP's 11(n). If the computer system 10 does comprise a plurality of SMP's the process 12(n)(m) which is transmitting the message and process 12(1)(1) which is receiving the message may reside on different SMP's. To efficiently accommodate that, in one embodiment each SMP 11(n′) is provided with a region of memory that may be used by processes 12(n″)(m) of one of the other SMP's 11(n″) (n″ n′), as well as its (that is, SMP 11(n′)'s) processes 12(n′)(m). The processes 12(n″)(m) of SMP 11(n″) can create respective buffer pools in that memory region comprising buffers which they can use to transfer messages to processes 12(n′)(m) of SMP 11(n′). The processes 12(n′)(m) of SMP 11(n′) will have postboxes 20(n′,m)(n″,m) in their respective regions 13(n′)(m) of the common memory 13(n′) of SMP 11(n′) in which the processes 12(n″)(m) of SMP 11(n″) can also load messages therefor (that is, for processes 12(n′)(m)) or a buffer pointer set containing one or more pointers to buffer(s) in the buffer pool that they maintain on the respective SMP 11(n′). Thus, in that embodiment, when a process 12(n″)(m) transfers a message to another process 12(n′)(m), the message will in any case be located on the SMP 11(n′) so that the processes 12(n′)(m) would be able to receive the message relatively quickly.

[0035] This will be described in connection with FIG. 5. As with FIG. 2, FIG. 5 specifically depicts the common memory 13(1) of SMP 11(1), and includes, in addition to the “local” portion 15 described above in connection with FIG. 2, a remote portion 16. The remote portion 16, in turn, includes a plurality of regions 17(2) through 17(N) (generally identified by reference numeral 17(n)) each of which is associated with the correspondingly indexed SMP 11(2) through 11(N). Each region 17(n), in turn, can include one or more buffer pools each comprising one or more buffers 22(n,m)(1) through 22(n,m)(B) (generally identified by reference numeral 22(n,m)(b)) which is associated with the correspondingly indexed process 12(n)(m) executed by the respective SMP 11(n). When a process 12(n)(m) executed by an SMP 11(n) wishes to transfer a message to a process 12(1)(m′) executed by SMP 11(1), and if the message is not accommodated by the postbox 21(1,m′)(n,m) maintained by the process 12(1)(m′) for process 12(n)(m), it (that is, the process 12(n)(m)) will load the data for the message into one or more buffers 22(n,m)(b) in its buffer pool in the remote portion 15 and load a pointer set to the buffer(s) into the postbox 21(1,m′)(n,m). It will be appreciated that these operations will include transfers between the SMP's 11(n) and 11(1) over the communication link 14. After the process 12(1)(m′) determines that a pointer set has been loaded into the postbox 21(1,m′)(n,m), it can process the pointer set as described above in connection with FIG. 4.

[0036] The SMP 11(1) may maintain a region 17(n) in its remote portion 16 associated with each of the other SMP's 11(2) through 11(N), or only for those SMP's which are executing processes 12(n)(m) which need to transfer messages to the processes 12(1)(m) executed by it (that is, SMP 11(1)). Similarly, within each region 17(n), the SMP 11(1) may maintain a buffer pool for all processes 12(n)(m) which are executed by the SMP 11(n), or only for those processes 12(n)(m) which need to transfer messages to the processes 12(1)(m) executed by it (that is, SMP 11(1)). In addition, each of the other SMP's 11(2) through 11(N) may maintain remote regions and buffer pools in a similar manner.

[0037] It will be appreciated that, although a process 12(n)(m) may make use of buffers 22(n,m)(b) in its buffer pool in a remote portion 16 maintained by an SMP 11(n′) when transferring a message to a process 12(n′)(m′) executed thereby, the process 12(n)(m) may instead or in addition make use of buffers maintained in its region 13(n)(m) of the memory 13(n) of SMP 11(n) when transferring a message.

[0038] The invention provides a number of advantages. In particular, the invention provides a buffer allocation arrangement for use in connection with transferring of messages in which the number of buffers vary according to the number of message-transferring processes, instead of the square of the number of such processes. In addition, since each process 12(n)(m) has ownership over the buffers in its buffer pool, the buffer allocation arrangement avoids the necessity of allocating a buffer from a common pool, with the attendant synchronization mechanism, as is required in connection with the second shared-memory message passing mechanism described above, thus avoiding the lock/unlock bottleneck.

[0039] It will be appreciated that a system in accordance with the invention can be constructed in whole or in part from special purpose hardware or a general purpose computer system, or any combination thereof, any portion of which may be controlled by a suitable program. Any program may in whole or in part comprise part of or be stored on the system in a conventional manner, or it may in whole or in part be provided in to the system over a network or other mechanism for transferring information in a conventional manner. In addition, it will be appreciated that the system may be operated and/or otherwise controlled by means of information provided by an operator using operator input elements (not shown) which may be connected directly to the system or which may transfer the information to the system over a network or other mechanism for transferring information in a conventional manner.

[0040] The foregoing description has been limited to a specific embodiment of this invention. It will be apparent, however, that various variations and modifications may be made to the invention, with the attainment of some or all of the advantages of the invention. It is the object of the appended claims to cover these and such other variations and modifications as come within the true spirit and scope of the invention.