Forming polymer features on a substrate

[0002] The invention relates to semiconductor manufacture and more specifically to the use of a polymer material to form features on a substrate.

[0003] Manufacture of semiconductor devices typically involves a series of processes in which various layers are deposited and patterned on a substrate to form a device of the desired type. Line and space patterns in photoresist are often created during modern semiconductor processing to form microelectronic devices. Smaller critical dimensions (“CD”) for both lines and spaces allow faster circuitry to be created. The sum of the width of a line plus the space CD is termed pitch. Tighter pitch and smaller CD's are needed in each new technology node.

[0004] Tight pitch/small CD devices are presently created by patterning with shorter wavelengths and CD reduction by overetching. Spacer gates, which are formed from spacers, or thin layers formed adjacent to sidewalls of patterned features, are formed by plasma deposition of a template followed by photoresist patterning, etching, and then plasma deposition of the spacer material followed by etch and/or planarization to form the free standing spacer. However, because of the inorganic nature of the materials and the process employed, rework is not an option. Additionally, line edge roughness (“LER”) can be a problem in lithographic processing. Thus a need exists to create features such as lines and spacers, for example, with tighter pitch.

[0005] FIG. 1 is an enlarged partial cross-section view of a photoresist pattern in accordance with one embodiment of the invention.

[0006] FIG. 2 is an enlarged partial cross-section view of the photoresist pattern with an applied polymer in accordance with one embodiment of the invention.

[0007] FIG. 3 is an enlarged partial cross-section view of the photoresist pattern with an applied polymer in accordance with another embodiment of the invention.

[0008] FIG. 4 is an enlarged partial cross-section view of the photoresist pattern with a cross-linked polymer layer in accordance with one embodiment of the invention.

[0009] FIG. 5 is an enlarged partial cross-section view of the photoresist pattern with a cross-linked polymer layer after exposure in accordance with one embodiment of the invention.

[0010] FIG. 6 is an enlarged partial cross-section view of polymer features obtained in accordance with one embodiment of the invention.

[0011] FIG. 7 is an enlarged cross-section view of a spacer gate transistor formed in accordance with one embodiment of the invention.

[0012] FIG. 8 is an enlarged cross-section view of an intermediate stage of manufacture of the spacer gate transistor in accordance with one embodiment of the invention.

[0013] In one embodiment of a process according to the present invention, a polymer, and more particularly an acid catalyzed cross-linking material, may be used to form thin, etch resistant structures or features. In one embodiment, the polymer may be a resolution enhancement lithography assisted by chemical shrink (“RELACS”) polymer. In certain embodiments, the polymer material may be a polymer system having a selected polymer and desired additives, which may vary depending on process requirements. As used herein, the terms “polymer,” “polymer system” and “polymer material” refer to both a polymer, such as the base polymer for RELACS, and a blend of the polymer with one or more desired additives.

[0014] The structures formed from the polymer system may be used in connection with a spacer gate process. In such an embodiment, a thin linear feature may be deposited at a patterned photoresist edge to thereby half the pitch of photoresist line/space patterns, or leave thin lines at precisely defined regions through a spin-expose-develop process. The thickness of such thin lines may be modulated through process parameters including resist exposure dose and wavelength and polymer bake time and temperature.

[0015] Embodiments of the present invention may use polymer materials to create small CD resist lines without the need for next generation lithography or CD reduction in etch. Embodiments may be integrated into various integrated circuit processing schemes, including, for example, application specific integrated circuit (“ASIC”) processing, allowing and enabling advanced architectures to be created using extensions of current lithographic tools. Spacer gate technology may be implemented using embodiments of the present invention by allowing rework and/or regional control of space CD.

[0016] In embodiments of the present invention, line edge roughness may be controlled by choosing a resist material optimized to mitigate deleterious LER. Line edge roughness may be controlled by using intrinsically smooth resist materials and exposure targeted within the resolution limit of the resist materials. For example, 248 nanometer (“nm”) resist may be used to create sacrificial line edges with high numerical aperture (“NA”) 248 nm exposures. LER may further be controlled by choosing a resist material having exposure requirements that are not targeted at the limit of resolution, thus improving substantially the smoothness of the resist line edges.

[0017] As discussed above, in certain embodiments the polymer to be used may be RELACS, commercially available from Clariant Corp., Branchburg, N.J. When applied over chemically amplified photoresist patterns, RELACS and other acid catalyzed cross-linked materials form a cross-linked layer at the polymer/resist interface, due to catalysis by resist surface acid. This layer remains insoluble in developer, is conformal, is of controllable thickness, and forms only where residual acid remains on the surface of the photoresist pattern (generally occurring at a resist sidewall).

[0018] In certain embodiments, a blanket or patterned exposure (i.e., a “preexposure”) may be applied to a preformed photoresist pattern prior to application of the polymer material. This exposure may be followed by a baking process to redistribute the residual acid. Such exposure and/or bake may be used to create controlled variations in the thickness of the cross-linked polymer layer. In so doing, the size of the free standing polymer features, as characterized by the develop check critical dimension (“DCCD”), may be controlled regionally after a removal process.

[0019] FIGS. 1-6 are partial enlarged cross-section views of a process for forming polymer structures in accordance with embodiments of the present invention. Referring to FIG. 1, a system 50 is shown having a patterned photoresist feature 100 with residual surface acid 110 on each sidewall 105. The width of the photoresist feature 100, including the residual surface acid 110, is the template CD 115. It is to be understood that the thickness of the residual surface acid 110 shown in FIG. 1 is exaggerated for purposes of clarity. As shown in FIG. 1, the photoresist feature 100 is disposed over a first layer 120, which may be an underlying substrate or another layer. It is to be understood that the photoresist feature 100 may be part of a photoresist pattern or template having a plurality of features. For purposes of this discussion, reference numeral 100 will be used to refer both to the specific resist feature as well as a larger pattern or template (not shown in FIG. 1). Such a photoresist template may be patterned in accordance with standard processing techniques. The photoresist template may be a sacrificial template in that after creation of desired polymer features, the template may be removed.

[0020] In certain embodiments, a blanket or a patterned exposure may be performed on the photoresist template to vary the residual acid remaining on the resist pattern prior to further processing. In so doing, variation in the thickness of the cross-linked polymer layer may be controlled as desired. In certain embodiments, the exposure may be performed for a period of up to about five times the clearing dose (“Eo”). The wavelength of such exposure may vary depending on the resist materials used. In certain embodiments, a deep ultraviolet (“DUV”) exposure having wavelengths of 248 nm, 193 nm, or 157 nm may be used, while in further embodiments, extremely short ultraviolet (“EUV”) exposures of less than 130 nm may be used.

[0021] In certain embodiments, the photoresist feature 100 may have been formed using standard lithographic techniques followed by overetch for CD reduction. In such embodiments, the aforementioned blanket or patterned exposure may be required to regenerate surface acid.

[0022] Referring now to FIG. 2, the polymer 130 is applied to the photoresist pattern 100. In certain embodiments, it may be applied via spin coating, for example, by a planarizing spin coat. The spin coating may occur at spin rates of between approximately 200-5000 revolutions per minute (“RPM”), and more particularly between approximately 1500-2500 RPM in certain embodiments.

[0023] As shown in FIG. 2, the polymer 130 is distributed in a planar fashion over both the photoresist pattern 100 and layer 120. In embodiments in which a preexpose process is performed prior to application of polymer 130, it is desirable to remove at least part of the excess portion of polymer 130, namely that part disposed over photoresist pattern 100, prior to further processing. This removal is desirable because the preexposure may create residual surface acid on the top of photoresist pattern 100 which may become cross-linked with polymer 130. Such removal may be performed via isotropic etching, ashing, or planarization, for example. Even if no preexpose process is performed, such removal may be desirable to sharpen the profile of sidewalls 105. However, in other embodiments, such removal need not be performed.

[0024] FIG. 3 shows application of polymer 130 in another embodiment. In this embodiment, the application is performed in a planarizing manner, such as via spin coating, so that polymer 130 is applied to be substantially coplanar with photoresist pattern 100. FIG. 3 also depicts the state of polymer 130 after a partial removal process is performed, as in the embodiment discussed above.

[0025] Referring now to FIG. 4, the system 50 is baked, resulting in a thin layer of cross-linked polymer material 140 over the geometry of resist template 100. More specifically, the cross-linked layer 140 occurs on the sidewalls 105 of the photoresist pattern because sufficient residual acid exists to which the polymer may attach. In certain embodiments, the cross-linked layer 140 may be between about 5 nm to about 100 nm thick; however, it is to be understood that the thickness may differ in other embodiments. The baking drives the acid catalyzed cross-linking in the polymer 130. In certain embodiments, the baking may occur for a time period of between approximately 15 seconds and approximately 120 seconds at a temperature of between about 50 to 130 degrees Celsius. Control of the bake temperature and time allows direct control of the thickness of cross-linked layer 140, which dictates the CD of the feature to be formed.

[0026] The cross-linked layer 140 is insoluble, whereas the polymer 130 that was not cross-linked is soluble. After baking, the system 50 may be released of the excess polymer material 130 that was not cross-linked. FIG. 4 shows the cross-linked layer 140 after release of the excess polymer material 130. In one embodiment, such releasing may be done by rinsing. The rinsing may be performed using deionized (“DI”) water, solvents, supercritical fluids, or a surfactant-aided developer in certain embodiments.

[0027] Referring now to FIG. 5, the system 50 is given a blanket exposure to render the photoresist template 100 soluble in a developer solution. In certain embodiments, the substrate then may be baked to aid in rendering the photoresist soluble.

[0028] Referring to FIG. 6, the system 50 is shown after the sacrificial photoresist template 100 is removed with a developer solution, releasing free standing structures in the cross-linked polymer layer 140. Thus, through the process, spatial information encoded into the photoresist template 100 is communicated to the cross-linked polymer layer 140 as resulting free standing structures. As shown in FIG. 6, the final CD 160 of the polymer structures 140 may be smaller than that of the template CD 115 shown in FIG. 1. In certain embodiments, the polymer features generated may have half of the pitch of the original photoresist template pattern.

[0029] It is to be understood that at any stage of the process described above, rework may be performed to facilitate defect-free processing. The rework may be accomplished via ashing, wet cleaning, and/or other known rework techniques.

[0030] The above process may be used in one embodiment to create spacer gate transistors. For example, FIG. 7 shows a spacer gate transistor 200 formed using the above process. The transistor 200 formed on substrate 205 includes a source region 210, a drain region 220, and a gate 230. The gate 230 may be formed of an oxide layer 240 and a polysilicon layer 250, over which a metal layer 260 may be disposed.

[0031] Referring now to FIG. 8, during formation of transistor 200, a polymer spacer 255 may be created in accordance with the above discussion. Such spacer 255 may be used as a mask to pattern the polysilicon layer 250. In such manner, the regions of polysilicon layer 250 not disposed under the spacer 255 may be removed, for example, via etching (not shown in FIG. 8). Then, spacer 255 may be removed to expose the polysilicon layer 250 of the gate 230. Finally, metal layer 260 may be deposited over the polysilicon layer 250 as shown in FIG. 7.

[0032] In certain embodiments, application of surfactants and other surface energy modulating components to the polymer formulation may be desired to facilitate resolution. Similarly, colloidal fillers may be added to the polymer formulation to form a composite polymer material to optimize the material for substrate and process requirements.

[0033] While the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention.