Method and apparatus for linearizing an output signal

[0002] This application claims the benefit of International Application No. PCT/GB00/01220 filed Mar. 30, 2000 and published in English, which in turn claims priority based on GB 9907725.7 filed Apr. 1, 1999.

[0003] This invention relates to signal processing apparatus of the kind in which an input signal is subject to both amplification and frequency conversion; and especially relates to radio telecommunications apparatus in which a voice signal is subject to amplification and frequency conversion.

[0004] The emerging GSM-EDGE and UMTS standards for mobile telecommunications place an increasingly stringent requirement on the linearity of handsets, particularly given their proposed wider channel bandwidths. In order to realise a power-efficient handset design, some form of linearisation will be required in the handset transmitter which should be (i) low-power itself; (ii) capable of broadband linearisation (up to 5 MHz for UMTS/ULTRA; (iii) frequency flexible, and preferably multi-band; and (iv) capable of achieving and maintaining high-levels of linearity improvement with highly-non-linear power amplifiers (e.g. class-C).

[0005] According to one aspect, the invention consists in a method of linearising an output signal comprising the steps of providing an input signal, digitally predistorting the input signal using polynomial distortion generation and frequency converting it in succession to provide a predistorted, frequency-converted signal, and amplifying the predistorted, frequency-converted signal to produce an output signal.

[0006] The trend in base-station technology is toward the adoption of “software radio” techniques, i.e. architectures in which all of the modulation parameters, ramping, framing etc. take place for all channels at baseband (digitally). The combination of all channels, at appropriate frequency offsets from each other, can also be performed at baseband and the whole spectrum up-converted in a single block for multi-carrier power amplification and the transmission from a single antenna.

[0007] However, the up-conversion and power amplification need to be linear (low-distortion) in order to prevent the radiation of unwanted adjacent channel energy and hence some form of linearisation is usually required for the power amplifier. In one embodiment of the present invention, the system incorporates a digital baseband (or digital IF) interface between a baseband signal generation sub-system and a linearised transmitter sub-system performing the above method.

[0008] With the invention it is possible to allow the transmitter to become a digital-in, RF-out system with the linearisation taking place in the form of digital predistortion.

[0009] In one embodiment, the predistortion of the input signal occurs prior to its frequency conversion. Advantageously, the frequency converting step is a frequency up-conversion step.

[0010] The input signal may be provided in quadrature form comprising in-phase and quadrature channels and the predistorting step may involve predistorting each channel independently.

[0011] Advantageously, the predistortion process may involve controlling the amplitude and/or phase of some part of the predistortion. This may involve controlling the predistortion to introduce a variation of amplitude and/or phase with frequency into at least a part of the predistortion.

[0012] In one embodiment, the predistortion may be controlled on the basis of a feedback signal derived from the output signal. In such an embodiment, it is possible to inject a pilot signal into the input signal and to monitor distortion of the pilot signal in the output signal as feedback. The feedback may be used together with the generated predistortion to generate control signals controlling the predistortion. The generation of these control signals may involve the step of correlating, or mixing, predistortion with feedback. It may be advantageous to perform the step of using the predistortion together with the feedback signal to generate control signals for the predistortion at least partly in the analogue signal domain.

[0013] The predistorting process may involve generating a distortion from the input signal and reintroducing the generated distortion into the input signal. The distortion signal may be generated by mixing or multiplying the input signal with itself. The step of generating a predistortion may involve generation of different orders of distortion by mixing the input signal with itself a different number of times. Advantageously, different orders of distortion can be controlled separately.

[0014] In a preferred embodiment, the frequency conversion and predistortion processes occur within a digital signal processor.

[0015] Any of the various methods described above may be used to generate an output signal for transmission from antenna means using an input signal which has been created in the digital domain and which contains information which it is desired to transmit.

[0016] According to another aspect, the invention relates to apparatus for linearising an output signal comprising predistorting means for digitally predistorting the input signal using polynomial distortion generation and frequency converting means operating in succession on an input signal to produce a predistorted, frequency-converted signal, the apparatus further comprising amplifying means for amplifying the predistorted, frequency-converted signal to produce an output signal.

[0017] Certain embodiments of the invention will now be described, by way of example only, with reference to the figures, in which:

[0018] FIG. 1 is a diagram illustrating a digital transmission sub-system linearisation scheme;

[0019] FIG. 2 is a diagram of a predistorter;

[0020] FIG. 3 is a diagram of a non-linearity generating circuit;

[0021] FIG. 4 is a diagram illustrating a digital transmission sub-system linearisation scheme;

[0022] FIGS. 5(a-c) is a diagram illustrating a digital transmission sub-system linearisation scheme; and

[0023] FIG. 6 is a diagram illustrating a predistortion circuit.

[0024] FIG. 1 illustrates a basic digital transmitter linearisation system utilising polynomial-based predistorters. The baseband, digital input signal to the system is provided by, for example, a “software radio” architecture in which all of the modulation parameters, ramping, framing, etc. take place for all channels digitally at baseband. This input for the transmitter system of FIG. 1 is provided in the form of digital in-phase and quardrature channel inputs, I and Q respectively, which are supplied to digital signal processor (DSP) 100.

[0025] The in-phase channel input signal is digitally predistorted using in-phase channel polynomial predistorter 110, whereas the quadrature channel input signal is digitally predistorted using quadrature channel polynomial predistorter 120. The outputs from predistorters 110 and 120 are mixed, using mixers 122 and 124 respectively, into in-phase and quadrature versions respectively of a signal from local oscillator 126 by way of quadrature splitter 128. The outputs from mixers 122 and 124 are then combined digitally to produce an intermediate frequency (IF) band output signal which is converted to an analogue signal by digital to analogue converter 130. The analogue IF output signal is then bandpass filtered at 132 and, using mixer 134, is subsequently mixed with the output from local oscillator 136 to produce a signal up-converted to the radio frequency (RF) band. This RF signal is then bandpass filtered at 138 prior to being amplified by non-linear RF power amplifier 140 which provides the system output to for example, an antenna of a hand-set or base station. The purpose of the predistorters 110 and 120 in the DSP 100 is to compensate for the non-linear characteristics of the RF power amplifier (PA) 140, and possibly also of the up-conversion process, in order to linearise the response of the entire transmitter system.

[0026] The predistorters 110 and 120 function by applying a predistortion to the I and Q input channels respectively which compensates for the distortion caused by the PA 140 (and possibly also by the up-conversion process). The characteristics of the predistortions applied at 110 and 120 are controlled on the basis of a feedback signal derived from the output of PA 140 using splitter 142. The portion of the PA output fed back from this splitter is coherently downconverted by mixing it with the output of local oscillator 136 which is used to up-convert the IF signal in the main signal path. The result of this mixing process, which takes place at mixer 144, is filtered at 146 prior to being converted to a digital signal at 148 which is supplied to the DSP 100 in order to provide feedback control for the predistorters 110 and 120.

[0027] The transmitter system of FIG. 1 can be adapted in a number of ways. For example, the DSP 100 could be provided with analogue to digital converters at the in-phase and quadrature channel inputs in order to provide compatibility with an analogue baseband stage, rather than a “software radio” architecture as discussed above. Furthermore, the input to the DSP 100 could be a digital or analogue IF band input signal, which could be quadrature downconverted digitally (after any necessary analogue to digital conversion) in the DSP prior to being processed as discussed above with reference to FIG. 1. Further modifications could also be made. For example, multi-stage upconversion from the IF to the RF band could be employed and/or an amplitude and phase polynomial model could be used in place of the in-phase and quadrature (Cartesian) model employed in FIG. 1. The up-conversion of the predistorted signal to the IF band and beyond can take place in the analogue signal domain.

[0028] FIG. 2 illustrates the form of the predistortion circuit employed for each of the predistorters 110 and 120 used in the FIG. 1 system. The in-phase or, as the case may be, quadrature channel input signal is provided to splitter 200 which distributes it to the various components of the predistorter to generate various orders of distortion (to be explained later). For example, the input signal from splitter 200 is provided to third order non-linearity generator 210 to generate a third order non-linearity which is gain and phase adjusted at 212 and 214 respectively, before being supplied to combiner 216. Any additional orders of distortion, for example, the fifth, seventh and nth, are generated and adjusted in a similar manner, and are supplied to combiner 216.

[0029] In the combiner 216, the adjusted non-linearities are recombined with the input signal to the splitter 200 which passes to the combiner 216 by way of delay element 218 which compensates the input signal for the delay experienced by the signals in the non-linearity generating paths for the various orders of distortion. Thus, the signal output from combiner 216 to mixer 122 or, as the case may be, mixer 124 comprises the sum of the predistorter input signal and the independently adjusted and generated orders of distortion.

[0030] A process by which the different orders of distortion can be generated for independent control will now be described with reference to FIG. 3. Essentially, each order of distortion is created by multiplying an input signal (i.e. the in-phase or quadrature digital input channel as supplied to the splitters 200 in predistorters 110 and 120) with itself. This process is described in detail in UK Patent Application 9804745.9. In FIG. 3, the input signal, in addition to being supplied to delay element 218 in FIG. 2, is supplied to splitter 300 which thus performs the function of splitter 200 in FIG. 2.

[0031] In the FIG. 1 embodiment, a high speed analogue to digital converter may be required to sample the IF band feedback signal. The embodiment of FIG. 4 avoids the use of resource-draining fast analogue to digital converters by using correlation processors external to the DSP as a method of simply reducing the required sampling rate of the analogue to digital converters. Only a single correlator (mixer) is shown in each of the feedback paths to the in-phase and quadrature channel predistorters (correlators 410 and 412), but the principle may be extended to a number of correlators and hence a number of orders of distortion as will be discussed later with reference to FIGS. 5a-5c. In other respects, the embodiment of FIG. 4 is similar to that of FIG. 1.

[0032] It will be apparent to the skilled person that this scheme can be extended to any desired order of distortion generation. It will also be noted that second, fourth and sixth order distortion signals can be extracted at taps 322, 324 and 326, respectively, and these even-order distortion signals may be used in forms of predistortion control.

[0033] The operation of these correlating processes and their extension to multiple distortion orders will now be explained with reference to FIGS. 5a-5c. In the embodiment shown in these figures, the I and Q channel digital inputs are provided to digital signal processor 500 which comprises two independent predistorters 510 and 512 which operate on the I and Q channel inputs respectively. The predistorters 510 and 512 are each constituted as described with reference to FIGS. 2 and 3. An upconverter 514 frequency upconverts the I and Q predistorted signals to provide an IF band signal which is then transferred to the analogue portion of the circuit via digital to analogue converter 516. The analogue portion of the system functions in the same manner as described for the embodiment of FIG. 1 with the exception that the I and Q feedback paths terminate in splitters 518 and 520 which feed the correlation processes (described below).

[0034] An advantage of this approach to predistortion generation, is that the processing is quite simple, with each of the mixer blocks (310,312, etc) simply being equivalent to a multiplication which involves only a single instruction cycle in most DSPs. The predistortion generation mechanism operates directly on the input signals supplied at 300, and hence no memory is required to store coefficients, unlike some conventional forms of baseband predistortion generation where the memory requirement may be large, or if it is reduced, real-time interpolation calculations must be performed, thereby increasing the processing power requirement.

[0035] In the FIG. 1 embodiment, a high speed analogue to digital converter may be required to sample the IF band feedback signal. The embodiment of FIG. 4 avoids the use of resource-draining fast analogue to digital converters by using correlation processors external to the DSP as a method of simply reducing the required sampling rate of the analogue to digital converters. Only a single correlator (mixer) is shown in each of the feedback paths to the in-phase and quadrature channel predistorters (correlators 410 and 412), but the principle may be extended to a number of correlators and hence a number of orders of distortion as will be discussed later with reference to FIG. 5. In other respects, the embodiment of FIG. 4 is similar to that of FIG. 1.

[0036] This technique operates by correlating a version of the relevant baseband distortion component (for example, third order), following frequency-offset up-conversion to the IF band and digital to analogue conversion (416,418), with the downconverted (at 414) feedback signal from the amplifier output. The control signal acts to minimise this correlation result, as this will minimise the residual distortion at the output of the amplifier. The use of a small frequency offset when upconverting the distortion component ensures that the wanted IF band correlator result is at an appropriate (audio) frequency, thus removing any problems with DC offsets at the correlator output. The audio frequency result of the correlation may then be sampled by a low sample rate converter (420,422) and detected within the DSP, which eliminates the possibility of DC drifts.

[0037] It will be appreciated that although this approach uses high sampling rate digital to analogue converters (416,418) to supply the offset baseband distortion output, this solution will, however, involve lower cost and lower power consumption than the high sampling rate analogue to digital converters which would otherwise be used in the provision of the feedback signal to the DSP in FIG. 1 embodiment (even taking into consideration the additional cost and power consumption of the low sample rate analogue to digital converters 420,422). The dynamic range (number of bits) required of the digital to analogue converters 416 and 418 will also be much smaller than that required in the analogue to digital converters of the feedback path of the FIG. 1 embodiment. This results in a further cost and power saving.

[0038] The operation of these correlating processes and their extension to multiple distortion orders will now be explained with reference to FIG. 5. In the embodiment shown in this figure, the I and Q channel digital inputs are provided to digital signal processor 500 which comprises two independent predistorters 510 and 512 which operate on the I and Q channel inputs respectively. The predistorters 510 and 512 are each constituted as described with reference to FIGS. 2 and 3. An upconverter 514 frequency upconverts the I and Q predistorted signals to provide an IF band signal which is then transferred to the analogue portion of the circuit via digital to analogue converter 516. The analogue portion of the system functions in the same manner as described for the embodiment of FIG. 1 with the exception that the I and Q feedback paths terminate in splitters 518 and 520 which feed the correlation processes (described below).

[0039] The control processing is carried out independently for the I and Q channels, thus providing independent quadrature polynomial models of the amplifier characteristic. Since the control scheme for each of the predistorters 510 and 512 is essentially the same, only that for the predistorter 512 operating on the quadrature channel digital input signal will now be described.

[0040] Each of the odd orders of distortion 522,524,526,528 generated in predistorter 512 are provided to an input of a respective mixer 530,532,534,536 to the other input of which is supplied a quadrature-shifted, offset local oscillator signal from generator 538. It will be appreciated that quadrature splitter 540 provides a corresponding in-phase version of the offset local oscillator signal to the control mechanism for predistorter 510. Returning to the control mechanism for predistorter 512, the outputs of mixers 530,532,534,536 represent the orders of distortion generated within the predistorter 512 as upconverted by the offset local oscillator signal. These signals are converted to analogue signals and are supplied to inputs of mixers 542,544,546,548. These mixers correlate the offset-upconverted distortion orders with the feedback signal provided to splitter 520.

[0041] The resulting audio range signals are sampled by a bank of analogue to digital converters and are fed to a further set of correlating mixers 550,552,554,556 within the DSP. To the other input of each of these mixers is supplied a signal derived from the correlation of the output of offset local oscillator 538 with the signal from the local oscillator 558 (in upconverter 514) at 560. The LOs 558 and 538, respectively, could have frequencies of 70 MHz and 70.001 MHz, the output of mixer 560 being at 1 KHz, the off-set frequency.

[0042] The outputs of correlators 550,552,554,556 are then integrated to supply control signals for the amplitude adjusting elements of the predistorter 512 (which were described with reference to FIG. 2). Equally, the control signals produced by the integrators could be used to control the phase adjusting elements of the predistorter 512. In this way, feedback control of the predistorters 510 and 512 is achieved. Since the integration and the preceding correlation takes place digitally any possibility of DC drift or offsets degrading the level of (intermodulation) distortion is eliminated. In order for the processing to remain coherent, it is necessary for the DSP clock and the RF local oscillator(s) to be derived from the same source, or to be phase locked in some way. The simplest method of achieving this is to drive both the DSP clock and the local oscillator(s) from the same crystal reference oscillator.

[0043] It should be noted that the system could be operated in polar (amplitude and phase) format in place of the Cartesian (I & Q) format described above.

[0044] It is possible to include adaptive filtering within the predistorters to create a controlled arbitrary amplitude and/or phase versus frequency characteristic for each order of distortion generated. This can enable linearisation of an output signal which would otherwise experience unequal intermodulation distortion. As shown in FIG. 6, the basic predistortion scheme, as illustrated in FIG. 2, can be adapted by the inclusion of an adaptive filter 610, etc. in each of the paths for generating the various orders of distortion. These filters can be implemented digitally, and can be of recursive or non-recursive type, and may be adapted using a feedback signal from the output of the RF power amplifier.

[0045] The basic system may also be modified to use a pilot signal which is injected into the main signal path prior to upconversion and amplification. The pilot tone would be created within the DSP (using, for example, a numerically controlled oscillator) and added prior to upconversion of the I and Q input signals to the IF band. The pilot signal will be subject to cross-modulation distortion from the input signal proper during the upconversion and amplification processes, and this cross-modulation distortion can be fed back from the output of the RF power amplifier to control the predistorters as described in UK Patent Application 9814391.0. The cross modulation components afflicting the pilot signal can be minimised using the feedback control mechanism which, in turn, leads to minimisation of the related distortion of the main signal due to intermodulation processes.