US 6,549,065 B2Grant
Low-voltage bandgap reference circuit
Issue Date:2003-04-15
•3 Claims
•3 Drawing Sheets
Abstract
A low-voltage reference circuit is provided wherein (i) the output voltage can be set to be a fraction of the silicon bandgap voltage of 1.206 volts, or on the order of 0.9 volts, (ii) the output voltage can have a zero thermal coefficient (TC), and (iii) the operating supply voltage Vcc can be less than 1.5 volts, or on the order of 1.1 volts. In one embodiment, the reference circuit modifies a conventional Brokaw bandgap circuit to lower both the required Vcc level and the output voltage by a constant offset. Referring to FIG. 3,the modification includes adding bipolar transistor (Q6), an opamp (A3) and resistors (R5,R6and R7). In another embodiment, the reference circuit modifies a conventional circuit with PNP transistors connected to the substrate, referring to FIG. 4, by adding current source I6,NMOS transistor M3,opamp A4and resistors R8-R10.A further embodiment modifies FIG. 4, referring to FIG. 5, by omitting the current source I6,and moving the location of resistor R4.
Metadata
Inventor
- Ion E. Opris
Application Information
Application Number:US 10/141,597
Filing Date:2002-05-07
Priority Date:2001-03-13
Art Unit:7
Classifications
IPC:
G05F 110
Field of Search:
327198327538327539327540327542323313323314323316
Patent Drawings (3 sheets)
Description
[0002] This application is a divisional of Ser. No. 09/804,779, filed Mar. 13, 2001 now U.S. Pat. No. 6,407,622.
I. Background of the Invention
[0003] A. Field of the Invention
[0004] The present invention relates to constant voltage reference circuits. More particularly, the present invention relates to a bandgap voltage reference circuit wherein (i) the output voltage can be low and set relative to the silicon bandgap voltage, (ii) the output voltage can have a zero TC, and (iii) the operating supply voltage Vcccan be limited.
[0005] B. Description of the Related Art
[0006] So-called bandgap reference circuit produces an output voltage that is approximately equal to the silicon bandgap voltage of 1.206 V (hereinafter termed simply the “bandgap voltage”) with a zero temperature coefficient (“TC”).
[0007] 1. FIG. 1—Prior Art
[0008] FIG. 1 shows a prior art bandgap reference circuit, sometimes called the Brokaw bandgap circuit. This circuit is built with current sources I1-I2, npn bipolar junction transistors Q1-Q2, resistors R1-R2, and operational amplifier (“opamp”) A1. Opamp A1has a negative input terminal (node n1), a positive input terminal (node n2), and an output terminal (node n3).
[0009] Current sources I1-I2are implemented so that each current source produces a substantially equal current I. This can be done, for example, by utilizing p-channel MOS transistors. In such an implementation, the source of each PMOS transistor is connected to Vcc, and the gates of the PMOS transistors are connected together in a current mirror configuration to node n1.
[0010] Transistor Q2is N times larger in size than transistor Q1. Initially, with Q2larger than Q1and equal current from I1-I2, the voltage across Q1will be N times larger than the voltage across Q2. Thus, node n1will be driven higher than node n2. This will cause the voltage at node n3to increase. The bases of transistors Q1and Q2are connected to node n3, so increasing the voltage at node n3causes current I from current sources I1-I2to increase. Current I will increase until the voltage across resistor R1balances the voltage difference between transistors Q1and Q2.
[0011] The equilibrium value for the current I is given by
[0012] The difference in the base-emitter voltage of the two transistors Q1and Q2is expressed as
[0013] Because ΔVBEis a function of thermal voltage kT/q, it is said to be proportional to absolute temperature (PTAT).
[0014] The output voltage Vout1in FIG. 1 is expressed as
[0015] Three observations can be made about Vout1. First, for a certain ratio of the resistors R1and R2, Vout1becomes equal to the silicon bandgap voltage. Second, Vout1, does not depend on the absolute value of the resistors used, which is hard to control. Third, Vout1is temperature independent—that is, it has a zero TC.
[0016] B. FIG. 2—Prior Art
[0017] Most modern CMOS processes have only substrate pnp bipolar junction transistors available. In this case the collector of the pnp transistor is forced to be the VSS/ground node. The configuration for a bandgap reference circuit using this type of bipolar junction transistor is shown in FIG. 2.
[0018] The circuit of FIG. 2 is built with current sources I3-I5, pnp bipolar junction transistors Q3-Q5, resistors R3-R4, and opamp A2Opamp A2has a negative input terminal (node n4), a positive input terminal (node n5), and an output terminal (node n6).
[0019] Current sources I3-I5are implemented so that each current source produces a substantially equal current I. As described above, this can be done by utilizing PMOS transistors.
[0020] Transistor Q4is N times larger in size than transistors Q3and Q5. Initially, with Q4larger than Q3and Q5and equal current from I3-I5, the voltage across Q3and Q5will be N times larger than the voltage across Q4. Thus, node n4will be driven higher than node n5. This will cause node n6to increase, causing the current I from current sources I3-I5to increase. Current I will increase until the voltage across resistor R3balances the voltage difference between transistor Q4and transistors Q3and Q5.
[0021] In this case, the output voltage Vout2in FIG. 2 is expressed as
[0022] As with Vout1in FIG. 1, Vout2can be set equal to the silicon bandgap voltage, Vout2is temperature independent, and Vout2does not depend on the absolute value of the resistors used.
[0023] The prior art circuits of FIGS. 1 and 2 cannot work with supply voltages below about 1.5 V, since the bandgap voltage with a zero TC is about 1.2 V for silicon. Many applications, however, require the voltage reference circuit to operate with a voltage supply below 1.5 V. The present invention presents such a circuit.
Ii. Summary of the Invention
[0024] In accordance with the present invention, a bandgap voltage reference circuit is provided wherein (i) the output voltage can be a fraction of the silicon bandgap voltage, (ii) the output voltage can have a zero TC, and (iii) the operating supply voltage can be less than 1.5 V.
[0025] In one embodiment of the present invention, the prior art Brokaw bandgap circuit of FIG. 1 is modified so that the operating supply voltage Vcc is lowered together with the output voltage by a constant offset. Referring to FIG. 3, the offset is created using an additional npn bipolar junction transistor (Q2), an opamp (A3) and a plurality of resistors (R5, R6 and R7).
[0026] In further embodiments of the present invention, the prior art bandgap reference circuit of FIG. 2 is modified so that the operating supply voltage is lowered together with the output voltage by a constant offset. In one embodiment, referring to FIG. 4, the offset is created using an additional current source I6, NMOS transistor M3, opamp A4, and resistors R8-R10. In another embodiment the offset is created, referring to FIG. 5, by modifying FIG. 4 to omit current source I6, and the resistor R4 shown connected in FIG. 4 is moved to the emitter of transistor Q5.
Iii. Brief Description of the Drawings
[0027] Further details of the present invention are explained with the help of the attached drawings in which:
[0028] FIG. 1 is a circuit diagram showing the prior art Brokaw bandgap reference circuit;
[0029] FIG. 2 is a circuit diagram showing a prior art bandgap reference circuit implemented with substrate pnp bipolar junction transistors;
[0030] FIG. 3 is a circuit diagram showing a low-voltage reference circuit in accordance with the present invention;
[0031] FIG. 4 is a circuit diagram showing a low-voltage reference circuit in accordance with the present invention; and
[0032] FIG. 5 is a circuit diagram showing a low-voltage reference circuit in accordance with the present invention.
Iv. Detailed Description
[0033] A. FIG. 3
[0034] FIG. 3 shows a low-voltage reference circuit in accordance with the present invention. Like the prior art Brokaw bandgap circuit shown in FIG. 1, the circuit of FIG. 3 contains current sources I1-I2, npn bipolar junction transistors Q1-Q2, resistors R1-R2, and opamp A1. Opamp A1has a negative input terminal (node n1), a positive input terminal (node n2), and an output terminal (node n3). In addition, the circuit of FIG. 3 comprises an npn bipolar junction transistor Q6, resistors R5-R7, and opamp A3.
[0035] The output of opamp A3drives the base of transistor Q6, which has a collector drawing an offset current from node n7. This offset current IOis directed through resistor R7. The voltage on R7is set by the R5-R6tap from the output voltage Vout3using opamp A3. Thus, the magnitude of offset current IOthrough R7is expressed as
[0036] Neglecting all of the base currents, the output voltage Vout3in FIG. 3 is determined by
[0037] Recalling equation 2, equation 5 can be rewritten as
[0038] Vout3=Vout1−IO·R2 (7)
[0039] which can be reduced to
[0040] Thus, for certain resistor ratios, Vout3can be made to be an exact fraction of the bandgap voltage, with a zero TC.
[0041] The supply voltage Vccmust be set sufficiently high so that Q6is maintained in saturation. The output voltage Vout3has to be set sufficiently high so that transistors Q1and Q2are turned on. In one embodiment, Vout3is preferably chosen to be about 0.9 V, which can be maintained for a supply voltage Vcc as low as 1.1 V. Further reduction in the operating supply voltage Vcc can be obtained for a reduced temperature range.
[0042] Thus, the circuit of FIG. 3 is a bandgap reference circuit wherein (i) the output voltage can be set equal to or less than the silicon bandgap voltage by adjusting resistor ratios, (ii) the output voltage can have a zero TC, and (iii) the operating supply voltage can be less than 1.5 V.
[0043] B. FIG. 4
[0044] FIG. 4 shows an embodiment of the present invention implemented with substrate pnp bipolar transistors. As with the circuit shown in FIG. 2, the circuit shown in FIG. 4 comprises current sources I3-I5, pnp bipolar junction transistors Q3-Q5, opamp A2, and resistors R3-R4. In addition, the circuit shown in FIG. 4 comprises current source I6, NMOS transistor M1, opamp A4, and resistors R8-R10. Instead of being connected between current source I5and transistor Q5as in FIG. 2, one terminal of resistor R4is connected to the base of transistor Q5, current source I6, and the drain of NMOS transistor M1(this terminal of resistor R4 is also referred to as node n8), and the other terminal of resistor R4is connected to ground.
[0045] These additional components form a controlled current source which generates an offset current. In particular, the output of opamp A4drives transistor M1, which draws an offset current from node n8. This offset current is directed through resistor R10. The voltage on R10is set by the R8-R9tap from the output voltage Vout4using opamp A4. Thus, the magnitude of offset current IOthrough R10is expressed as
[0046] The output voltage Vout4in FIG. 4 is expressed as
[0047] Vout4=VBE+(I−IO)·R4 (10)
[0048] which can also be expressed as
[0049] Therefore, for certain resistor ratios, Vout4can be made to be a fraction of the bandgap voltage.
[0050] In FIG. 4, the output voltage Vout4has to be set sufficiently high so that transistors Q3, Q4 and Q5are turned on. As with the circuit of FIG. 3, in one embodiment Vout4is chosen to be about 0.9 V, which can be maintained for a supply voltage as low as 1.1 V. Further reduction in the operating supply voltage can be obtained for a reduced temperature range.
[0051] Thus, the circuit of FIG. 4 is a bandgap reference circuit wherein (i) the output voltage can be set equal to or less than the silicon bandgap voltage by adjusting resistor ratios, (ii) the output voltage can have a zero TC, and (iii) the operating supply voltage can be less than 1.5 V.
[0052] C. FIG. 5
[0053] FIG. 5 shows another embodiment of the present invention implemented with substrate pnp bipolar transistors. There are two principal differences between the circuit of FIG. 5 and the circuit of FIG. 4. First, the resistor R4is moved to the emitter side of transistor Q5. Second, current source I6is omitted. This means that the transistor Q5now has a collector current of I-I0. However, the equation for Vout5is equivalent to the expression for Vout4(eqn. 11). Therefore, for certain resistor ratios, Vout5can be made to be a fraction of the bandgap voltage.
[0054] In FIG. 5, as in FIG. 4, the output voltage Vout5has to be set sufficiently high so that transistors Q3, Q4 and Q5 are turned on. In one embodiment for FIG. 5, Vout5is preferably chosen to be about 0.9 V, which can be maintained for a supply voltage as low as 1.1 V. Further reduction in the operating supply voltage can be obtained for a reduced temperature range.
[0055] Thus, the circuit of FIG. 5 is a bandgap reference circuit wherein (i) the output voltage can be set equal to or less than the silicon bandgap voltage by adjusting resistor ratios, (ii) the output voltage can have a zero TC, and (iii) the operating supply voltage can be less than 1.5 V.
[0056] Although the present invention has been described above with particularity, this was merely to teach one of ordinary skill in the art how to make and use the invention. Many additional modifications will fall within the scope of the invention. Thus, the scope of the invention is defined by the claims which immediately follow.
Claims
What is claimed is:
1. A low-voltage reference circuit, comprising:
a first current source (I3);
a second current source (I4);
a third current source (I5);
a fourth current source (I6);
a first bipolar junction transistor (Q3) having an emitter connected to the first current source (I3), and a collector and base connected to VSS;
a second bipolar junction transistor (Q4) having an emitter connected to the second current source (I4), and a collector and base connected to VSS;
a third bipolar junction transistor (Q5) having an emitter connected tote third current source (I5), a collector connected to VSS, and having a base connected to the fourth current source (I6);
an NMOS transistor (M1) having a drain connected to the fourth current source (I6), a source, and a gate;
a first operational amplifier (A2) having an inverting (−) input connected to the first current source (I3), a noninverting (+) input connected to the second current source (I4), and an output connected to drive the first, second, third, and fourth current sources (I3-I6);
a second operational amplifier (A4) having a noninverting (+) input an inverting (−) input connected to the source of the NMOS transistor (M1) and having an output connected to the gate of the NMOS transistor (M1);
a first resistor (R3) having a first terminal connected to the second current source (I4) and having a second terminal connected to the emitter of the second transistor (Q4);
a second resistor (R4) having a first terminal connected tote fourth current source (I6), and having a second terminal connected to VSS;
a third resistor (R8) having a first terminal connected tote third current source (I5), and having a second terminal connected to the noninverting (+) input of the second amplifier (A4);
a fourth resistor (R9) having a first terminal connected tote noninverting (+) input of the second amplifier (A4), and having a second terminal connected to VSS;
a fifth resistor (R10) having a first terminal connected to the inverting (−) input of the second amplifier (A4), and having a second terminal connected to VSS.
2. The low voltage reference circuit of claim 1, wherein a size of the second transistor (Q4)is a multiple of a size of the first transistor (Q3).
3. The low voltage reference circuit of claim 1, wherein the first, second, third and fourth current sources (I3-I6) are formed from transistors having substantially equal sizes, with gates driven by the output of the first amplifier (A2).