Method for enhancing etching of TiSix

[0002] This application is a continuation application of application Ser. No. 09/264,381, filed Mar. 5, 1999, which is currently pending

[0003] 1. Field of the Invention

[0004] The present invention relates generally to a fabrication process for manufacturing semiconductor devices. More particularly, the present invention relates to a method and etchant useful for etching TiSi_x.

[0005] 2. Background

[0006] Titanium silicide (TiSi_x) is a material likely to be used with increasing frequency in semiconductor devices. In particular, TiSi_xis a candidate for use as a gate material in memory devices such as DRAMs and SRAMs, because it favorably has a lower resistivity than materials presently used as gate materials in such devices, such as tungsten silicide (WSi_x) and polysilicon. This lower resistivity allows faster devices, i.e., devices having a smaller RC delay, to be fabricated. Moreover, it is becoming possible to fabricate memory devices having dimensions smaller than about 0.25 microns. At this small scale, the resistance of the conventional gate electrode composed of polysilicon and tungsten silicide (WSi_x) will be high enough to cause significant delay in signal transmission. Substituting TiSi_xfor the WSi_xis expected to advantageously mitigate such delay.

[0007] Many desirable applications require the ability to anisotropically etch TiSi_x. It is known to anisotropically etch TiSi_xusing Cl₂or HBr in an inductively coupled plasma (ICP) etcher. See Soda et al., “Correlation between Etching Characteristics of Titanium Silicide and its Crystal Structure under Cl₂or HBr Plasma Etching,” Dry Process Symposium, 33, 1997, (“Soda”) which is hereby incorporated by reference in its entirety. However, it has been observed that such etching may leave a residue due to the presence of Si nodules in the TiSi_x. See Soda. This residue is very difficult to remove, and may interfere with device performance. In addition, the Si nodules may act as “micro-masks” that shield underlying TiSi_xfrom the etching process, which can lead to roughness in the profile of the etched surface. Also, many process conditions may lead to undercutting, due to isotropic etching of the sidewall.

[0008] A method of etching TiSi_xis provided. A patterned mask is provided on top of a layer of TiSi_x. The TiSi_xis exposed, through the patterned mask, to a plasma etchant. The plasma etchant comprises (i) at least one fluorine containing gas, such as SF₆, NF₃, C_xF_y(where x ranges from about 1 to about 10), and compatible mixtures of such gases; and (ii) a gas selected from the group consisting of HBr, Cl₂, and combinations thereof.

[0009] Conventional methods of etching TiSi_xuse Cl₂or HBr as the plasma etchant. However, these methods can lead to undesirable residues, due to the presence of silicon nodules in the present TiSi_x. While not intending to be limited to any explanation as to why the present invention works, it is believed that the conventional Cl₂or HBr plasma chemistry has a selectivity for TiSi_x, relative to Si nodules, significantly greater than 1, ie., the plasma etches TiSi_xat a faster rate than Si nodules that are often present in TiSi_x. Since the Si nodules are not etched as quickly as the TiSi_x, they act as “micro-masks,” by shielding underlying TiSi_xfrom the etching process. The Si nodules may also act as micro-masks for other layers, such as a layer of polysilicon underlying the TiSi_x. Note that the Si nodules are not polysilicon, and are etched at rates significantly different from polysilicon. The difference in the etch rate of the Si nodules and TiSi_xis more pronounced when Cl₂is used as the etchant than when HBr is used. As a result, the residue and micro-masking effect are more severe when Cl₂is used as the etchant. The present invention overcomes the residue problem by adding a fluorine containing gas to the plasma etchant, which is then able to effectively etch the Si nodules so that the undesirable residue is not formed.

[0010] FIGS. 1A and 1B (prior art) each show a schematic of a cross-sectional view of a trench fabricated using conventional methods.

[0011] FIGS. 2A and 2B each show a schematic of a cross-sectional view of a trench fabricated in accordance with the present invention.

[0012] FIG. 3 (prior art) shows a schematic of a three-dimensional view of a silicon etch chamber having a decoupled plasma source.

[0013] FIG. 4 (prior art) shows a schematic of a cross sectional view of a silicon etch decoupled plasma source chamber of the kind shown in FIG. 3.

[0014] FIG. 5 shows a computer used to control processes being carried out in an etch chamber of the kind shown in FIG. 4.

[0015] Conventional HBr and/or Cl₂plasma etchant chemistries for TiSi_x, which use a feed gas that includes HBr and/or Cl₂, usually produce an etched surface which exhibits undesirable residues. As used herein, the terms “including” and “comprising” are used, inter alia, to describe a plasma source gas mixture of the particular gases included, which source gas may include additional gases as well. These terms are not intended to limit where the gases are mixed, such that a feed gas including two separate gases may be implemented by mixing the gases prior to feeding them into the vacuum chamber, or by feeding them into the vacuum chamber via separate routes.

[0016] The present invention improves upon conventional HBr and/or Cl₂plasma etching of TiSi_xby using a plasma source gas that includes a fluorine containing gas as well as HBr and/or Cl₂. As used herein, the term “element containing gas” refers to a gas having molecules that contain an atom of the particular element. For example, carbon tetrafluoride (CF₄), nitrogen trifluoride (NF₃) and sulfur hexafluoride (SF₆) are “fluorine containing gases.”

[0017] While not intending to be limited as to any explanation as to why the present invention works, it is believed that the addition of a fluorine containing gas reduces the difference between the etch rate of the TiSi_xand the etch rate of the Si nodules. In particular, the addition of a fluorine containing gas to a conventional HBr and/or Cl₂plasma feed gas, in the ranges described herein, decreases the selectivity of the resultant plasma etchant for TiSi_xrelative to the Si nodules. As a result, undesirable residue and micro-masking effect are reduced or eliminated.

[0018] The inventors estimate that a plasma etchant having a selectivity (etch rate ratio) of TiSi_x: Si nodules of below about 1.5:1 (preferably below about 1.2:1, and most preferably about 1:1) will reduce residue problems due to the Si nodules.

[0019] Preferably, the feed gas does not include any hydrocarbon-containing gases. We believe that such hydrogen containing gases may cause undesirable polymer deposition during the etch process.

[0020] The present invention may be used in conjunction with any process step that etches TiSi_x. Features that may be fabricated include trenches, vias, and lines, by way of example and not by way of limitation.

[0021] One frequently etched feature is a gate electrode trench. FIGS. 1A (prior art) and 1B (prior art) each show a trench 100 fabricated using conventional methods. Layer 110 of titanium silicide is disposed on top of layer 120 of polysilicon, which is disposed on top of a layer 130 of gate oxide. In FIG. 1A, the trench 100 is etched through (into) a layer 110 of titanium silicide. In FIG. 1B, the trench is extended through a layer 120 of polysilicon. Trench 100 was etched from layer 110 of TiSi_xusing conventional plasma etching, i.e., an HBr and/or Cl₂plasma with a substrate bias applied to provide ion bombardment. Trench 100 has side walls 102. In FIG. 1A, trench 100 has a bottom surface 104 which is covered with residue (debris) 150. In FIG. 1B, trench 100 has a bottom surface 106 which is also covered with residue 150. The residue is attributed to the presence of Si nodules 140 in layer 110 of titanium silicide. These Si nodules act as micro-masks during the etching process, and are responsible for residue 150 on bottom surfaces 104 and 106. Even though there are not silicon nodules 140 in layer 120 of polysilicon, residue 150 on bottom surface 104 propagates itself during the etching of layer 120 of polysilicon.

[0022] FIGS. 2A and 2B show a trench 200 fabricated in a layer 210 of titanium silicide and extended into a layer 220 of polysilicon, respectively, in accordance with the present invention. Layer 210 of titanium silicide is disposed on top of layer 220 of polysilicon, which is disposed on top of a layer 230 of gate oxide. FIG. 2A shows the trench as partially fabricated through layer 210, but not through layer 220. FIG. 2B shows the trench fully fabricated through both layers 210 and 220. Trench 200 was etched from layer 210 of TiSi_xin accordance with the present invention, i.e., a plasma generated from a plasma source gas that includes a fluorine-containing gas as well as HBr and/or Cl₂, with a substrate bias applied to provide ion bombardment. Trench 200 has side walls 202. In FIG. 2A, trench 200 has a bottom surface 204, and in FIG. 2B, trench 200 has a bottom surface 206, and in each instance there is no residue on these bottom surfaces after the trench etching process. Although Si nodules 240 are present in layer 210 of titanium silicide, these Si nodules are removed during the etching process, such that there is little or no residue on bottom surfaces 204 and 206 of FIGS. 2A and 2B, respectively.

[0023] The present invention may be practiced in any apparatus adapted to expose a substrate to a plasma. Preferably, the apparatus has the capability of applying a substrate bias to the substrate. Most preferably, the apparatus has a “decoupled plasma source”, which has separate controls for power input to a plasma source generator and for power input to a substrate bias device. The power to the plasma source generator determines the plasma density, while the power to the substrate bias device determines the degree of ion bombardment energy on the substrate surface and enables anisotropic etching. A decoupled plasma source typically incorporates measures to separate (decouple) the influence of the plasma source power and bias power on one another. The CENTURA® DPS™ silicon etching system including a decoupled plasma source, available from Applied Materials, Inc. of Santa Clara, Calif. was used to produce the preferred embodiments of the present invention. However, the present invention may be practiced in an apparatus having a plasma source that is not decoupled, i.e., the plasma source power and the bias power are not separately controllable, or in any other type of apparatus adapted to expose a substrate to a plasma.

[0024] FIG. 3 (prior art) shows a three-dimensional schematic of a silicon etch chamber 300, including a decoupled plasma source, of the type used in the CENTURA® DPS™ etch system. Chamber 300 includes a ceramic dome 302 and a standard monopolar electrostatic chuck (ESC) 304. Gas is introduced into the chamber via four ceramic gas injection nozzles 308 for uniform gas distribution. Chamber pressure is controlled by a closed-loop pressure control system 310 with a throttle valve 312.

[0025] Chamber 300 uses an inductive plasma source, frequency typically tuned at approximately 12.56 MHZ, to generate and sustain a high density plasma (i.e., having an electron density of at least 10¹¹e/cm³). The wafer is typically biased with a 13.56 MHZ RF power source. The decoupled nature of the plasma source allows independent control of ion energy and ion density, which provides highly uniform plasma (<5% variation) with a wide process window over changes in source and bias power, pressure, and etch gas chemistry. Note that optimal process parameters, such as plasma source power and bias power, may be highly dependent on a number of factors, such as the frequency of the power source, chamber geometry, etc. When the present invention is practiced in an apparatus different from the preferred apparatus, one of skill in the art can determine the process parameter appropriate for use with the particular apparatus with minimal experimentation.

[0026] FIG. 4 (prior art) shows a schematic of a vertical cross-sectional view of a chamber 400 of the kind shown in FIG. 3. Electrostatic chuck 402 is adapted to hold a substrate 404. Electrostatic chuck 402 overlies a cathode plasma electrode 406, which is electrically connected to an independently controlled plasma electrode (RF) power source 408. The upper portion 413 of the chamber wall comprises ceramic. The lower portion 410 of the chamber wall typically comprises an anodized aluminum surface 422 over an aluminum base body 424 which is electrically grounded at ground 415. A plasma source gas is introduced into and distributed throughout chamber 400 by means of a gas distributor 412 peripherally disposed above substrate 404. Plasma ions are formed from the plasma source gas by applying an RF current to an inductive coil plasma generator 414, which is connected to an independently controlled plasma generator (RF) power source 416. The cathode electrode 406 is electrically biased with respect to the inductor 410 by applying an RF voltage to the cathode electrode 406 via power source 408, so that the plasma ions formed in chamber 400 are attracted toward and energetically impinge upon the substrate 404. Spent process gas and etchant by-products are exhausted from chamber 400 through an exhaust system 418. A throttle valve 420 is provided in exhaust system 418 to control the pressure in the chamber 400.

[0027] Preferably, the apparatus used to practice the present invention is adapted to be controlled by a computer. FIG. 5 shows a computer 500 adapted to provide process control for etch chamber 512. Computer 500 comprises a processor 502, memory 504 adapted to store instructions 506, and one or more ports 508. Processor 502 is adapted to communicate with memory 504 and to execute instructions 506. Processor 502 and memory 504 are also adapted to communicate with one or more ports 508. Ports 508 are adapted to communicate with a plasma etch chamber 512. Plasma etch chamber is adapted to carry out process steps in accordance with signals received from processor 502 via ports 508. Preferably, computer 500 can control process variables such as the composition and feed rate of the plasma source gas, the temperature, the pressure in the chamber, the bias power, the plasma source generation power. Preferably, computer 502 is adapted to receive measurements that describe the condition in the chamber, and adapt the process variables accordingly, such as shutting down the etch process when an optical etch end point determination is made.

[0028] For many structures incorporating TiSi_x, it is desirable to etch the TiSi_xanisotropically, i.e., the etching proceeds at an appreciable rate in a direction normal to the surface of a wafer, but does not proceed at an appreciable rate in lateral directions. Anisotropy may be caused by the etch process itself, and/or by the crystal structure of the TiSi_x. Device fabrication relies primarily on the etch process itself, although crystal structure may affect the direction of etching as well. Depending upon the particular device, some deviation from a perfect anisotropic etch may be tolerable. For example, a trench that is measurably narrower at the bottom than the top, or that has walls that bow outward to some degree, may be acceptable. In addition, while many situations in which the present invention might be used involve anisotropic etching, the present invention is not limited to anisotropic etching.

[0029] Plasma etching with ion bombardment is one process used to achieve anisotropic etching. The ion bombardment is directional, normal to the surface of the wafer. Chemically reactive plasma etching is typically used in combination with ion bombardment to enable the etching to proceed at an appreciable rate in the direction of the ion bombardment. Preferably, etching does not occur at an appreciable rate in other directions, even though surfaces such as sidewalls may be exposed to plasma reactive etchants, because there is no ion bombardment in those directions. However, if process conditions and the reactive etchant are not selected properly, etching may occur in lateral directions, even though there is no ion bombardment in the lateral directions.

[0030] For etching silicon, as well as most silicides, fluorine containing gases are more aggressive reactive etchants than HBr and Cl₂, with Cl₂being a more aggressive etchant than HBr. Any of these etchants may, depending upon the process conditions, etch laterally, into an exposed sidewall although the problem is more pronounced with more aggressive etchants. Process conditions that may affect whether lateral etching occurs include plasma density (plasma source generation power), the temperature of the substrate, substrate surface bias voltage (substrate bias power), process chamber pressure, and plasma composition.

[0031] One problem that may arise during an anisotropic etch is tapering, i.e., the area etched decreases as the distance away from the mask increases. Tapering may be caused by the formation of a passivation layer on the sidewalls, and in particular at the juncture between the sidewalls and the base of the etched feature. One cause of such a passivation layer is plasma polymerization due to the presence of carbon in the plasma. This carbon may come from a plasma source gas that contains carbon, such as CF₄, or the erosion of a photo resist mask that contains carbon. Plasma polymerization may be decreased or eliminated by the addition of a small amount of oxygen to the plasma source gas. For example, where CF₄is a component of the plasma source gas, oxygen is preferably added in an amount such that the ratio of oxygen to CF₄is about 1:5 by volume. Using too little oxygen may result in plasma polymerization. Using too much oxygen undesirably decreases the amount of the primary etchant gases, and may also result in passivation of the TiSi_xsurface by an oxidation mechanism, resulting in a decrease in etch rate.

[0032] Using a CENTURA® DPS™ etching system, the inventors have found that anisotropic etching of TiSi_xwithout formation of appreciable residue may be achieved using a plasma source gas comprising a mixture of HBr and SF₆, wherein the amount of SF₆is less than about 20% by volume of the feed gas; or using a plasma source gas mixture of HBr and CF₄, wherein the amount of CF₄is less than about 40% by volume of the feed gas. Preferably, the amount of SF₆and/or CF₄is greater than about 5% by volume of the plasma source gas. Amounts of SF₆or CF₄in excess of 20% by volume or 40% by volume, respectively, attacked the trench side walls, such that the etching was not anisotropic. Using too little SF₆or CF₄results in an undesirable residue. Our analysis shows that similar amounts of other fluorine containing gases will also be effective in reducing or eliminating residue. These other fluorine containing gases include inorganic gases, such as NF₃, as well as organic gases, such as C_xF_y, where x ranges from about 1 to 10. The appropriate range for the amount of inorganic fluorine containing gases should be similar to that for SF₆. The appropriate range for the amount of organic fluorine containing gases should be similar to that for CF₄.

[0033] We believe that the presence of fluorine in the plasma not only provides isotropic etching, but also cleans the residue from the wafer surface, and reduces and/or removes deposition on the walls of the vacuum chamber. The use of fluorine may therefore favorably increase the number of wafers which may be processed prior to cleaning the process chamber.

[0034] The substrate temperature typically is about 40° C.-80° C., and more preferably about 40° C.-50° C. By-products of the etching process may not be sufficiently volatile at to sustain a desirable etch rate at significantly lower temperatures. A temperature too far above these ranges may result in etching that is not anisotropic. Note that the temperature “measured” by the CENTURA® DPS™ etching system and reported herein is about 30° C.-40° C. lower than the actual substrate temperature, due to the placement of the thermocouple used to measure temperature. Note that substrate temperature is difficult to estimate, and there may be an inaccuracy of ±10° C. or more. If a different system is used, the difference between “measured” temperature and substrate temperature may be different, but can be indexed off the substrate temperature.

[0035] The bias power is typically about 100-180 W. When the plasma source gas includes Cl₂(as opposed to HBr), the upper end of the bias power range is preferably used to maintain anisotropic etching. Bias power that is too far below this range may result in undesirably slow etch rates, profile undercutting, and/or undesirable residue. Bias powers that are too far above these ranges may result in an unacceptable amount of mask erosion and/or a tapered etch profile. Suitable bias powers may vary depending upon the system used.

[0036] The gas feed rate was 100 sccm, and the pressure inside the vacuum chamber was maintained at 3 mTorr. The plasma source generator power was 300 W. These parameters may be varied in a manner apparent to one of skill in the art. Suitable values may vary depending upon the system used.

[0037] Whether anisotropic etching is achieved depends upon whether a particular combination of the various processing parameters can achieve a suitably fast etching rate in a direction normal to the substrate without attacking the side walls. Accordingly, the process parameters provided above are only preferred guidelines, and it may be possible to achieve anisotropic etching with one or more parameters falling outside of the ranges provided, depending upon the particular combination of parameters.

[0038] Several samples were fabricated by sputtering a TiSi_xfilm onto a layer of poly silicon above a thin gate oxide, followed by a high temperature anneal, using techniques known to the art. Masks having apertures in the shape of parallel lines with a width of about 0.25 microns, with 0.25 microns of mask separating the apertures, were provided above the TiSi_x, using techniques known to the art. Both photo resist and hard masks were used in each example.

[0039] Etch with Cl₂

[0040] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using Cl₂plasma. The measured temperature was 50° C., i.e., the substrate temperature was about 80° C., Cl₂gas was fed into the chamber at a rate of 100 sccm, the pressure in the chamber was maintained at 3 mTorr, the plasma source generation power was 300 W, and the bias power was 100 W.

[0041] Trenches were obtained having an appearance similar to that of FIG. 1B. Significant residue was present on the bottom of the trenches. In addition, the sidewalls were undercut, due to the Cl specie attacking the side walls during the etch. The undercutting was less pronounced in the samples using photo resist masks, probably due to the formation of a protective passivation layer on the side walls as a by-product of resist erosion.

[0042] It may be possible to reduce the isotropic etching of the side wall by Cl specie by adding a passivation gas such as O₂and/or N₂However, the amount of these gases must be carefully controlled to avoid the creation of significant difference between the etch rates of TiSi_xand polysilicon (which may increase the formation of undesirable residue).

[0043] Etch with HBr

[0044] Samples were fabricated as described above, and etched in a CENTURA® DPS™ etching system using HBr plasma. All process parameters were the same as Example 1, except that HBr was used instead of Cl₂.

[0045] Trenches were obtained having an appearance similar to that of FIG. 1B. Significant residue was present on the bottom of the trenches. The amount of residue was less than in Example 1, probably because the difference in the etch rates between TiSi_xand poly silicon is less in the HBr process than in the Cl₂process. The sidewalls were not significantly bowed outward, in contrast to Example 1. This superior profile control, i.e., no bowing, probably occurs because HBr is a less aggressive etchant than Cl₂.

[0046] Low Temperature Etch with Cl₂

[0047] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using a Cl₂-based plasma. The process parameters were the same as Example 1, except that the measured temperature was 5° C., i.e., the substrate temperature was about 40° C., with several different bias powers used on several different samples. Bias powers of 100 W, and 150 W led to etch rates of about 2250 Å/min and 2500 Å, respectively.

[0048] Trenches were obtained having an appearance similar to those of Example 1. Significant residue was present on the bottom of the trenches. The bowing of the sidewalls was less pronounced than in Example 1.

[0049] Low Temperature Etch with HBr

[0050] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using an HBr-based plasma. The process parameters were the same as Example 2, except that the measured temperature was 5° C., and several different bias powers were used on several different samples. Bias powers of 100, 150, and 180 W led to etch rates of about 1000 Å/min, 1250 Å/min, and 1400 Å/min, respectively. The bias power of 180 W, higher than those used for Cl₂, was used to increase the lower etch rates achieved with the less aggressive HBr etchant.

[0051] In both examples 3 and 4, less residue was observed at higher bias powers, probably because the higher bias power may decrease the difference in the etch rates of TiSi_xand poly silicon, and due to increased ion bombardment of the etch surface. However, very high bias power (greater than about 200 W for the equipment used in this example) may cause undesirable mask erosion, which may lead to undesirable profile micro loading. One skilled in the art can determine, with minimal experimentation, the optimum bias power for a particular piece of equipment.

[0052] In example 4, trenches were obtained having an appearance similar to those of Example 2. Significant residue was present on the bottom of the trenches; however, the amount of residue was less than in Example 3.

[0053] The ability to achieve reasonable etch rates at a measured temperature of 5° C. (substrate temperatures of about 40° C.) is an unexpected result. In particular, etch rates of the conventional material WSi_xdecrease rapidly as temperature decreases, preventing the use of low temperature etching, i.e., etching at substrate temperatures below about 50° C. One of skill in the art would expect a similar phenomena to occur with TiSi_x. However, the etch byproducts for TiSi_xturned out to be particularly volatile, making it possible to etch TiSi_xat lower temperatures than expected.

[0054] Low Temperature Etch

[0055] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using either HBr or Cl₂plasma. The process parameters were the same as Examples 3 and 4, except that the measured temperature was 10° C., i.e., the substrate temperature was about 40° C., and the bias power was 100 W.

[0056] Results similar to those observed for Examples 3 and 4 were obtained.

[0057] HBr and SF₆Etchant

[0058] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using an HBr/SF₆plasma where the plasma source gas flow rate was 100 SCCM and the volumetric percentages were 85% HBr and 15% SF₆. The measured temperature was 5° C., the pressure in the chamber was maintained at 3 mTorr, the plasma source generation power was 300 W. Samples were etched using bias powers of 100 W and 200 W.

[0059] Trenches were obtained having an appearance similar to that of FIG. 2B. Significant residue was not observed on the bottom of the trenches. The side walls were not significantly undercut. Example 6 shows how an etchant comprising HBr and SF₆can be used to effectively reduce or eliminate residue formation during the etching of TiSi_x. This residue reduction was achieved at a relatively lower bias power of 100 W, reducing the likelihood that profile micro loading might be a problem. The residue reduction was also achieved without significant isotropic etching of the side walls.

[0060] It is believed that inorganic fluorine containing gases may be substituted for SF₆to achieve similar results. One example of such a gas is NF₃. The amount of fluorine containing gas used should be such that the volumetric percentage of the fluorine containing gas in the plasma source gas is within the same range recommended for SF₆.

[0061] HBr and CF₄Etchant

[0062] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using an HBr/CF₄plasma. The measured temperature was 5° C., the pressure in the chamber was maintained at 3 mTorr, the plasma source generation power was 300 W, and the bias power was 100 W. A gas comprising 90% by volume HBr AND 10% by volume CF₄was fed into the chamber at a total rate of 100 sccm.

[0063] Results similar to those for Example 6 were observed. However, the side walls were tapered, i.e., the bottom surface of the trench was narrower than the mouth of the trench. This tapering is caused by plasma polymerization due at least in part to the carbon-containing free radicals generated from the CF₄. The inventors believe that the efficiency of residue removal can be improved and sidewall plasma polymerization reduced by adding O₂into the plasma. It is believed that the O₂would reduce carbon concentration in the plasma. It is further believed that the O₂:CF₄ratio should be about 1:5 or less.

[0064] One skilled in the art may substitute other organic fluorine containing gases for CF₄to achieve similar results, wherein the chemical formula is C_xF_Yand x ranges from 1 to about 10. The amount of fluorine containing gas used should be such that the amount of C_xF_Yis about 5%-40% of the total plasma source gas.

[0065] Integration with Other Process Steps

[0066] The samples produced in Examples 7 and 8 were further processed using conventional methods. In particular, the TiSi_xwas etched using the process described in Examples 7 and 8 to the interface between the TiSi_xand the underlying polysilicon. The polysilicon was then etched using a conventional Cl₂/HBr/O₂chemistry to the interface between the polysilicon and the underlying gate oxide. The samples were then exposed to a conventional HBr/O₂overetch to clean any remaining polysilicon. This further processing appears to be easily integrated into the present invention TiSi_xetch method.

[0067] HBR AND CF₄Etchant

[0068] Samples were fabricated as described above. The samples were etched in a CENTURA® DPS™ etching system using an HBr/CF₄plasma. The process parameters were the same as for Example 7, except the bias power was 150 W, and the plasma source gas comprised 80% by volume HBr and 20% by volume CF₄.

[0069] Results similar to those for Example 7 were observed.

[0070] While the foregoing is directed to preferred embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow.