Liquid crystal apparatus

[0002] The present invention relates to a liquid crystal apparatus for effecting an active matrix drive by using a liquid crystal having a spontaneous polarization.

[0003] At present, most of liquid crystal display apparatus for use in monitors of liquid crystal television sets, word processors and personal computers principally employ a TN (twisted nematic) mode or an STN (super twisted nematic) mode using a nematic liquid crystal as a display mode.

[0004] In the case of using such a TN or STN mode for multiplex driving scheme, however, an increase in the number of scanning signal lines is liable to lower a contrast. Even if a drive waveform is optimized in order to provide practical display qualities, the number of scanning signal line has been restricted to ca. 400-500 lines at best.

[0005] In order to sole such a problem that display qualities are lowered with an increased number of scanning signal lines in a liquid crystal display mode (TN or STN mode), there has been proposed an active matrix (display) mode using a plurality of switching devices or devices, such as MIM (metal-insulator-metal) devices or TFTs (thin-film-transistors), disposed in a matrix form on a substrate.

[0006] In this case, however, a nematic liquid crystal used as a liquid crystal material therefor shows a slow response speed of several hundred msec particularly for gradation display signals, thus failing to follow high-speed motion display. As a result, it is difficult to provide sufficient display qualities. Further, in the above-mentioned TN (or STN) mode, liquid crystal molecules cause switching between a state where they are twisted and in parallel with a substrate and a state where they are perpendicular to the substrate, thus resulting in a large viewing angle-dependence based on its principle.

[0007] On the other hand, there have been developed display devices using a liquid crystal having a spontaneous polarization, such as a ferroelectric or chiral smectic liquid crystal, in view of, e.g., a higher-speed responsiveness and a wider viewing-angle characteristic when compared with those of the TN or (STN) mode using the nematic liquid crystal.

[0008] For example, as a display device using a liquid crystal showing ferroelectricity, there has been proposed a surface-stabilized ferroelectric liquid crystal display device as described in Japanese Laid-Open Patent Application (JP-A) 56-107216, wherein multiplex driving scheme is practiced according to a simple matrix mode utilizing bistability of liquid crystal molecules. However, this driving scheme fails to continuously change a resultant transmittance since it performs two-value (binary) driving using bistable states of liquid crystal molecules, thus not facilitating gradational display. For this reason, there have been proposed various gradational display methods using, e.g., pixel division, time-division display, and image processing.

[0009] Further, there have been proposed active matrix driving schemes utilizing a high-speed responsiveness and a wide view-angle characteristic of a ferroelectric or antiferroelectric liquid crystal. For example JP-A 5-100208 discloses a method of effecting gradational display by performing active matrix driving of an antiferroelectric liquid crystal assuming three stable states and JP-A 9-68728 discloses a gradational display method using an active matrix driving scheme and a thresholdless-antiferroelectric liquid crystal (TL-AFLC).

[0010] However, in the case of the active matrix driving scheme using a chiral smectic liquid crystal (e.g., a ferroelectric or antiferroelectric liquid crystal), an effective voltage applied to the liquid crystal is substantially lowered to cause image-quality deterioration as described in, e.g., (1) A full-color thresholdless Antiferroelectric LCD exhibiting wide viewing angle with fast response time, T. Yoshida et al., SID (Society for Information Display) 97 DIGEST, pp. 841-844, and (2) Voltage-holding properties of thresholdless Antiferroelectric liquid crystals driven by active matrices, T. Saishu et al., SID 96 DIGEST, pp. 703-706. More specifically, in the case where an antiferroelectric (or ferroelectric) liquid crystal having a spontaneous polarization is driven (i.e., subjected to switching) by using an active element or device (e.g., TFT), an inversion of the spontaneous polarization of the liquid crystal causes a lowering in holding voltage to substantially decrease a voltage applied to the liquid crystal, thus resulting in a deterioration in image qualities, such as a low contrast.

[0011] The lowering in holding voltage leading to inferior image qualities will be simply described hereinbelow with reference to FIGS. 3-5.

[0012] FIG. 4 shows an equivalent circuit of one pixel portion of a liquid crystal device using a liquid crystal having a spontaneous polarization (in this instance, the TL-AFLC as described in the above document (1) is used), and FIG. 3 shows a V-T (voltage-transmittance) curve as an optical response characteristic of the liquid crystal device using the TL-AFLC when a low-frequency triangular waveform is applied.

[0013] Referring to FIG. 4, the equivalent circuit includes a TFT 14, a liquid crystal capacitance (C_lc) 31, a storage capacitance (Cs) 32, a spontaneous polarization of the liquid crystal (Ps) 50, a storage capacitance electrode 30 and a common electrode 42. The TFT 14 includes a gate electrode, a source electrode and a drain electrode and supplies a voltage to the liquid crystal through the drain electrode. The storage capacitance (Cs) 32 for holding a voltage applied to the liquid crystal layer at the time of “OFF” state of the TFT 14 is disposed in parallel with the liquid crystal capacitance (Clc) 31.

[0014] FIGS. 5A-5D show drive waveforms applied to the pixel (shown in FIG. 4) and an optical response (transmittance) of the liquid crystal. More specifically, FIG. 5A shows a voltage waveform of a scanning selection signal applied to a scanning signal line (gate line) connected to the gate electrode of the TFT 14. FIG. 5B shows a data signal voltage waveform applied to a data signal line (source line) connected to the source electrode of the TFT 14. FIG. 5C shows a voltage waveform applied to the liquid crystal layer (portion) of the pixel concerned. FIG. 5D shows a transmittance of the pixel.

[0015] Referring to FIG. 5A, a gate voltage Vg as a signal for placing the gate of the TFT 14 in an “ON” state is periodically applied in every selection period Ton. In synchronism with the gate voltage Vg, a source voltage (data signal voltage) Vs is applied to the source electrode, thus being supplied to the liquid crystal layer via the drain electrode of the TFT 14 (FIG. 5B). The source voltage Vs has a polarity which is inverted periodically in order to prevent a deterioration of the liquid crystal due to an asymmetrical voltage applied to the liquid crystal layer. Referring to FIG. 5C, a voltage Vpix applied to the liquid crystal layer is applied in a selection period Ton so that the Vpix has a polarity which is opposite to that in a period immediately before the selection period Ton. The liquid crystal starts to transfer its alignment state to that depending on the polarity of the voltage Vpix applied to the liquid crystal layer in the selection period Ton. If the response time of the liquid crystal is sufficiently shorter than the Ton, the transfer of the liquid crystal is continued to a (subsequent) non-selection period Toff by a voltage based on a storage capacitance. The liquid crystal used has a spontaneous polarization, so that a voltage decrease (lowering) (corresponding to ΔV) is caused by the spontaneous polarization when the direction thereof is inverted (FIG. 5C). As a result, the liquid crystal is finally placed in an alignment state corresponding to the voltage Vpix including the voltage drop ΔV. Accordingly, as shown in FIG. 5D, an optical response of the liquid crystal is also continued to the non-selection period Toff.

[0016] As described above, in order to obtain a desired optical (display) state, it is necessary to effect a drive in view of the voltage drop due to the spontaneous polarization. The voltage drop phenomenon is, however, affected by the spontaneous polarization of the liquid crystal, driving voltage, storage capacitance, liquid crystal capacitance, etc., thus leading to such a problem that a desired gradational data is not accurately displayed.

[0017] A principal object of the present invention is to provide a liquid crystal apparatus having solved the above problems caused by the voltage decrease based on inversion of a spontaneous polarization of a liquid crystal.

[0018] A specific object of the present invention is to provide a liquid crystal apparatus capable of improving image qualities, particularly for gradational display, such as a contrast, while retaining a high-speed responsiveness at the time of effecting display by driving a liquid crystal device using a liquid crystal having a spontaneous polarization according to an active matrix driving scheme.

[0019] According to the present invention, there is provided a liquid crystal apparatus, comprising:

[0020] a liquid crystal device including an active matrix substrate, a counter substrate disposed opposite thereto, and a liquid crystal disposed between the active matrix substrate and the counter substrate; said active matrix substrate having thereon a plurality of scanning signal lines, a plurality of data signal lines intersecting the scanning signal lines, a plurality of switching devices each disposed at an intersection of the scanning signal lines and the data signal lines and connected to an associated one of the scanning signal lines, and a plurality of pixel electrodes each connected via one of the switching devices to an associated one of the data signal lines and form a pixel together with the liquid crystal thereat for applying a data signal voltage to the liquid crystal at the pixel; said liquid crystal having a spontaneous polarization and causing a state change accompanied with a polarity inversion thereof within a response time, and

[0021] drive means for sequentially selecting the scanning signal lines each in a scanning selection period and applying data signal voltages to the pixels along an associated scanning signal line, wherein the scanning selection period for a scanning signal line is shorter than the response time for the liquid crystal at a pixel on the scanning signal line thus being liable to leave a remaining portion of polarity inversion to reach a desired state change, and the data signal voltage applied to the pixel is set to include a compensation voltage for compensating for a voltage decrease caused by the remaining portion of polarity inversion.

[0022] According to the present invention, there is also provided a liquid crystal apparatus, comprising:

[0023] a liquid crystal device including an active matrix substrate, a counter substrate disposed opposite thereto, and a liquid crystal disposed between the active matrix substrate and the counter substrate; said active matrix substrate having thereon a plurality of scanning signal lines, a plurality of data signal lines intersecting the scanning signal lines, a plurality of switching devices each disposed at an intersection of the scanning signal lines and the data signal lines and connected to an associated one of the scanning signal lines, and a plurality of pixel electrodes each connected via one of the switching devices to an associated one of the data signal lines and form a pixel together with the liquid crystal thereat for applying a data signal voltage to the liquid crystal at the pixel; each pixel being provided with a storage capacitance disposed in parallel with the liquid crystal, and said liquid crystal having a spontaneous polarization and causing a state change accompanied with a polarity inversion thereof within a response time, and

[0024] drive means for sequentially selecting the scanning signal lines each in a scanning selection period and applying data signal voltages to the pixels along an associated scanning signal line, wherein the scanning selection period for a scanning signal line is shorter than the response time for the liquid crystal at a pixel on the scanning signal line thus being liable to leave a remaining portion of polarity inversion to reach a desired state change, and the liquid crystal device and the drive means are set to satisfy the following conditions:

[0025] Vs2≧{ΔQ×M/(C_lc+Cs)}+Vs1  (12)

[0026] wherein Vs2 is a data signal voltage (volt) applied to one pixel, Vs1 is a voltage (volt) for providing writing data for the pixel based on a voltage-transmittance characteristic of the liquid crystal, ΔQ is an amount (C) of inversion of the spontaneous polarization of the liquid crystal, C_lcis a liquid crystal capacitance (F) at one pixel, Cs is a storage capacitance (F) at one pixel, and M is a proportion of the remaining portion of polarity inversion in a scanning selection period for one scanning signal line.

[0027] According to the present invention, there is further provided a liquid crystal apparatus, comprising:

[0028] a liquid crystal device including an active matrix substrate, a counter substrate disposed opposite thereto, and a liquid crystal disposed between the active matrix substrate and the counter substrate; said active matrix substrate having thereon a plurality of scanning signal lines, a plurality of data signal lines intersecting the scanning signal lines, a plurality of switching devices each disposed at an intersection of the scanning signal lines and the data signal lines and connected to an associated one of the scanning signal lines, and a plurality of pixel electrodes each connected via one of the switching devices to an associated one of the data signal lines and form a pixel together with the liquid crystal thereat for applying a data signal voltage to the liquid crystal at the pixel; each pixel being provided with a storage capacitance disposed in parallel with the liquid crystal, and said liquid crystal having a spontaneous polarization and causing a state change accompanied with a polarity inversion thereof within a response time, and

[0029] drive means for sequentially selecting the scanning signal lines each in a scanning selection period and applying data signal voltages to the pixels along an associated scanning signal line, wherein the scanning selection period for a scanning signal line is shorter than the response time for the liquid crystal at a pixel on the scanning signal line thus being liable to leave a remaining portion of polarity inversion to reach a desired state change, and the liquid crystal device and the drive means are set to satisfy the following conditions:

[0030] 1/(n−1)>A(2Ps×S)/V₀(C_lc+Cs)_ave,

[0031] wherein n represents the number of gradational levels per one period; A is represented by the following equation:

[0032] A={(C_lc+Cs)_max−(C_lc+Cs)_min}/(C_lc+Cs)_ave,

[0033] where (C_lc+Cs)_maxrepresents a maximum of the sum (C_lc+Cs) of a liquid crystal capacitance C_lc(F) at one pixel and a storage capacitance Cs (F) at one pixel, (C_lc+Cs)_minrepresents a minimum of (C_lc+Cs) and (C_lc+Cs)_averepresents an average of (C_lc+Cs); Ps represents a spontaneous polarization (C/cm²) per unit area of the liquid crystal; S represents a pixel electrode area (cm²) at one pixel; and V₀represents a saturation voltage (volt) for the liquid crystal providing a maximum transmittance.

[0034] These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings.

[0035] FIG. 1 is a schematic plan view of a liquid crystal panel (device) used in the liquid crystal apparatus according to the present invention.

[0036] FIGS. 2 and 10 are respectively a schematic sectional view of an example of a one-pixel portion of a liquid crystal device used in the liquid crystal apparatus according to the present invention.

[0037] FIG. 3 is a graph showing a voltage-transmittance characteristic when a liquid crystal layer in the liquid crystal apparatus of the present invention is supplied with a rectangular wave voltage.

[0038] FIG. 4 is an equivalent circuit diagram of a one-pixel portion of a liquid crystal device used in the liquid crystal apparatus.

[0039] FIGS. 5A-5D are a scanning signal voltage waveform, a data signal voltage waveform, a voltage waveform applied to a pixel, and an optical response (transmittance) at the pixel, respectively, for an ordinary active matrix drive.

[0040] FIGS. 6A-6D and 11A-11D are a scanning signal voltage waveform, a data signal voltage waveform, a voltage waveform applied to a pixel, and an optical response at the pixel, respectively, for an active matrix drive of the liquid crystal apparatus of the present invention.

[0041] FIGS. 7 and 8 are respectively a block diagram showing the liquid crystal apparatus of the present invention.

[0042] FIG. 9 is a block diagram showing an example of a signal voltage correction circuit used in the liquid crystal apparatus of the present invention.

[0043] FIG. 12 is a graph showing a relationship between total of a liquid crystal capacitance and a storage capacitance and a luminance (transmittance) for displaying a whole white image.

[0044] FIG. 13 is a graph showing a relationship between a drive voltage and a luminance for displaying a whole white image.

[0045] FIGS. 14 and 15 are respectively another voltage-transmittance characteristic of a liquid crystal used in the present invention.

[0046] Some preferred embodiments of the liquid crystal apparatus of the present invention will be described with reference to the drawings.

[0047] In a first embodiment, a liquid crystal apparatus is constituted by a liquid crystal device (panel) including an active matrix substrate provided with a plurality of switching devices and a plurality of pixel electrodes, a counter substrate provided with a common electrode, and a liquid crystal having a spontaneous polarization disposed between the active matrix and counter substrates, and by a drive means for driving the liquid crystal device.

[0048] FIG. 1 shows a schematic plan view of such a liquid crystal device in combination with drive means (drive circuits) used in the liquid crystal apparatus of the present invention x and principally illustrates a structure of the active matrix substrate.

[0049] Referring to FIG. 1, a liquid crystal device (panel) 10 includes a structure such that gate lines (G1, G2, G3, G4, G5, . . . ) corresponding to scanning lines connected to a scanning signal driver 11 (drive means) and source lines (S1, S2, S3, S4, S5, . . . ) corresponding to data signal lines connected to a data signal driver 12 (drive means) are disposed to intersect each other at right angles in an electrically isolated state, thus forming a plurality of pixels (5×5 in FIG. 1 for simplicity) each at intersection thereof. Each pixel is provided with a thin film transistor (TFT) 14 as a switching device or element and a pixel electrode 15. The switching device may be a metal-insulator-metal (MIM) device. The gate lines (G1, G2, . . . ) are connected with gate electrodes (not shown) of the TFT 14, respectively, and the source lines (S1, S2, . . . ) are connected with source electrodes (not shown) of the TFT 14, respectively. The pixel electrodes 15 are connected with drain electrodes (not shown) of the TFT 14, respectively.

[0050] A gate voltage is supplied to the gate lines (G1, G2, . . . ) from the scanning signal driver 11 by effecting scanning selection in, e.g., a line-sequential manner. In synchronism with this scanning selection on the gate lines, the source lines (S1, S2, . . . ) are supplied with a data signal voltage depending on writing data for each pixel from the data signal driver 12. The thus-supplied gate and data signal voltages are applied to each pixel electrode 15 via the TFT 14.

[0051] FIG. 2 shows a sectional structure of a one-pixel portion (corr. to 1 bit portion) in the panel structure shown in FIG. 1.

[0052] Referring to FIG. 2, a layer of a liquid crystal material 49 having a spontaneous polarization are sandwiched between an active matrix plate 20 provided with a TFT 14 and a pixel electrode 15 and a counter plate 40 provided with a common electrode 42, thus providing a liquid crystal capacitance (Clc) 31. The liquid crystal capacitance 31 includes alignment films 43aand 43bbut these films are very thin, thus being substantially constituted by the pixel electrode 15, the common electrode 42 and the liquid crystal layer 49.

[0053] In this embodiment, the active matrix plate 20 includes an amorphous silicon (a-Si) TFT as the TFT 14.

[0054] The TFT 14 is formed on an active matrix substrate 21 of, e.g., glass and includes: a gate electrode 22 connected with the gate lines (G1, G2, . . . shown in FIG. 1); an insulating film (gate insulation film) 23 of, e.g., silicon nitride (SiNx) formed on the gate electrode 22; an a-Si layer 24 formed on the insulating film 23; n⁺ a-Si layers 25 and 26 formed on the a-Si layer 24 and spaced apart from each other; a source electrode 27 formed on the n⁺ a-Si layer 25; a drain electrode 28 formed on the n⁺ a-Si layer 26 and spaced apart from the source electrode 27; a channel protective film 29 partially covering the a-Si layer 24 and the source and drain electrodes 27 and 28. The source electrode 27 is connected with the source lines (S1, S2, . . . shown in FIG. 1) and the drain electrode 28 is connected with a pixel electrode 15 of a transparent conductor film (e.g., ITO (indium-tin-oxide) film). The TFT 94 is placed in an “ON” state by applying a gate pulse to the gate electrode 22 in a scanning selection period of the corresponding gate line.

[0055] Further, on the active matrix substrate 20, a structure constituting a storage or holding capacitance (supplementary capacitance) (Cs) 32 is constituted by the pixel electrode 15, a storage capacitance electrode 30 disposed on the (glass) substrate 21, and the insulating film 23 (extending from that of the TFT portion on the gate electrode 22) disposed therebetween. The structure (storage capacitance) (Cs) 32 is disposed in parallel with the liquid crystal capacitance (structure) (Clc) 31. In the case where the storage capacitor electrode 30 has a large area, a resultant opening rate is decreased. In such a case, the storage capacitor electrode 30 is formed of a transparent conductor film (e.g., ITO film).

[0056] On the TFT 14 and the pixel electrode 15 of the active matrix plate 20, an alignment film 43afor controlling an alignment state of the liquid crystal 49. The alignment film 43amay preferably be subjected to a uniaxial alignment treatment (e.g., rubbing).

[0057] On the other hand, the counter plate 40 includes a counter substrate (e.g., glass substrate) 41; a common (counter) electrode 42 having a uniform thickness disposed on the entire substrate 41; and an alignment film 43bhaving a uniform thickness, disposed on the common electrode 42, for controlling an alignment state of the liquid crystal 49.

[0058] The above panel structure (liquid crystal device) including a plurality of the pixels each having the structure shown in FIG. 2 is sandwiched between a pair of polarizers (not shown) with polarizing axes intersecting each other at right angles.

[0059] Referring to FIG. 2, the liquid crystal layer 49 comprises a liquid crystal material, such as a chiral smectic liquid crystal, a ferroelectric liquid crystal or an antiferroelectric liquid crystal. In a particularly preferred embodiment, the liquid crystal layer 49 may preferably be set by appropriately selecting a composition of the liquid crystal material and a panel structure so that the liquid crystal material used has a voltage (applied voltage)−transmittance (V-T) characteristic as shown in FIG. 3 representing a thresholdless V-T characteristic when supplied with a DC rectangular wave voltage according to a static drive scheme.

[0060] More specifically, as shown in FIG. 3, the liquid crystal assumes a first alignment state exhibiting a first transmittance under no voltage application (under no electric field), is tilted from the first alignment state to a second alignment state in one direction when supplied with a voltage of a first polarity (e.g., a positive-polarity voltage) to exhibit a second transmittance at a prescribed voltage V₀, and is tilted from the first alignment state to a third alignment state in the other direction when supplied with a voltage of a second polarity opposite to the first polarity (e.g., a negative-polarity voltage) to exhibit a second transmittance at a prescribed voltage −V₀Further, the pair of polarizers are disposed so that the first transmittance is substantially zero (%) and the second transmittance is a maximum transmittance (100%), whereby the liquid crystal changes its transmittance continuously between the first transmittance and the second transmittance depending on a voltage value applied thereto, thus allowing gradational display depending on the applied voltage.

[0061] The one-pixel portion of the liquid crystal device shown in FIG. 2 is represented by an equivalent circuit shown in FIG. 4 (as specifically described hereinabove).

[0062] As the active matrix plate 20 (as described with reference to FIGS. 1 and 2), it is also possible to use a (glass) substrate having thereon a polycrystalline (p-)Si TFT as the TFT.

[0063] FIG. 10 illustrates a sectional structure of a one-pixel portion (1 bit portion) of a liquid crystal device using such a p-Si TFT. The structure is identical to that of the liquid crystal device using the α-Si TFT (FIG. 1) except for a TFT structure.

[0064] Referring to FIG. 10, a p-Si TFT (structure) 14 includes a p-Si layer 101 formed on an active matrix substrate 21 (e.g., a glass substrate). On the p-Si layer 101, a gate electrode 22 connected to the gate liens (G1, G2, . . . shown in FIG. 1) via a gate insulation film 23. Further, on the p-Si layer 101, a passivation film 102 is disposed so as to cover the gate electrode 22 and the gate insulation film 23. The passivation film 102 has two through-holes through which a source electrode 27 and a drain electrode 28 are connected to the p-Si layer 101, respectively.

[0065] Next, an example of an ordinary active matrix driving scheme applicable to the liquid crystal apparatus as described above will be described with reference to FIGS. 1-5.

[0066] FIG. 4 shows an example of an equivalent circuit for each (one-)pixel portion of such a liquid crystal apparatus shown in FIG. 1.

[0067] FIG. 5A shows a voltage waveform applied to one gate line (e.g., G1 shown in FIG. 1) (as a scanning signal line) connected with each pixel.

[0068] In the liquid crystal apparatus driven by the active matrix driving scheme, the gate lines G1, G2, . . . shown in FIG. 1 are selected in a line-sequential scanning manner. At this time, a gate electrode 22 connected with a corresponding gate line is supplied with a prescribed gate voltage Vg in a selection period T_on,thus placing the TFT 14 in an “ON” state. In a non-selection period T_offcorresponding to a period in which other gate lines are selected, the gate electrode 22 is not supplied with the gate voltage Vg, thus placing the TFT 14 in an “OFF” state (high-resistance state). In every non-selection period T_off, a prescribed (and same) gate line is selected and a corresponding gate electrode 22 is supplied with the gate voltage Vg.

[0069] FIG. 5B shows a voltage waveform applied to one source line (e.g., S1 shown in FIG. 1) (as a data signal line) connected to the pixel concerned.

[0070] When the gate electrode 22 is supplied with the gate voltage Vg in the selection period T_onas shown in FIG. 5A, in synchronism with this voltage application, a prescribed source voltage (data signal voltage) Vs having a potential providing a prescribed writing data (e.g., an optical state or display information (transmittance) intended to be obtained at the pixel based on V-T characteristic of the liquid crystal used as shown in FIG. 3) to the pixel concerned is applied to a source electrode 27 through the source line connected with the pixel based on a potential Vc of a common electrode 42 as a reference potential.

[0071] At that time, the TFT 14 is in an “ON” state, whereby the source voltage Vs applied to the source electrode 27 is applied to a pixel electrode 15 via a drain electrode 28, thus electrical charging a liquid crystal capacitance (Clc) 31 and a storage (holding) capacitance (Cs) 32. As a result, the potential of the pixel electrode 15 becomes a level equal to that of the source (data signal) voltage Vs.

[0072] Thereafter, in a subsequent non-selection period T_offof the gate line on the pixel concerned, the TFT 14 is in an “OFF” (high-resistance) state. At this time, in the liquid crystal cell, ideally, the liquid crystal capacitance (Clc) 31 and the storage capacitance (Cs) 32 retain the electric charges therein, respectively, charged in the selection period T_onto keep the voltage Vs. As a result, the liquid crystal layer 49 of the pixel is supplied with the voltage Vs through one frame period to provide a desired optical state (display data) at the pixel depending on the voltage value. Particularly, by appropriately control a voltage value of the data signal voltage Vs depending on a desired image information (data), it is possible to effect gradational display wherein the liquid crystal changes its transmittance continuously along a V-T curve as shown in FIG. 3.

[0073] The data signal (source) voltage Vs may preferably have a polarity which is inverted for a prescribed period (e.g., a frame period) as shown in FIG. 3, so that the polarity of a voltage applied to the liquid crystal layer 49 is inverted for each frame period. As a result, the voltage waveform actually applied to the liquid crystal layer 49 is controlled not to be asymmetrical, thus suppressing a deterioration of the liquid crystal material.

[0074] FIG. 5C shows schematically a waveform of a (pixel) voltage Vpix actually held by the liquid crystal capacitance (Clc) 31 and the storage capacitance (Cs) 32 of the pixel concerned and also applied to the liquid crystal layer 49 when the liquid crystal having a spontaneous polarization is driven, and FIG. 5D shows schematically an example of an actual optical response (transmittance) at the pixel concerned.

[0075] The liquid crystal layer 49 comprises a liquid crystal material (e.g., a chiral smectic liquid crystal) having a spontaneous polarization as described above, so that switching (between the alignment states) is caused by inversion of the spontaneous polarization direction at the time of application of a prescribed voltage Vs in a selection period Ton. As a result, electrical charges charged by the liquid crystal capacitance (Clc) 31 and the storage capacitance (Cs) 32 are consumed depending on a degree of the spontaneous polarization inversion. At that time, if the liquid crystal having the spontaneous polarization shows a sufficiently quick response speed so that the switching is completed within the selection period Ton, electrical charges are charged or stored in the liquid crystal and storage capacitances (Clc and Cs) 31 and 32 in the selection period Ton so that the resultant charges are those including the consumed ones (by the spontaneous polarization inversion) and necessary to keep the voltage Vs. In this instance, a further switching of the liquid crystal is not caused in a subsequent non-selection period Toff, so that the electrical charges stored in the selection period Ton immediately before the Toff are not consumed. As a result, the (data signal) voltage Vs is held by the capacitances of the pixel concerned in also the non-selection period Toff, thus providing a desired optical state or a desired display information depending on the voltage value of Vs.

[0076] In the above-described active matrix drive scheme for driving the liquid crystal apparatus, a scanning selection period (Ton) for one scanning signal line (one gate line) is determined unambiguously by a frame frequency and the number of scanning signal lines of the liquid crystal apparatus used. In recent years, the liquid crystal apparatus is required to have a larger size and a higher resolution and effect motion display, so that the number of gate lines G1, G2, . . . and the frame frequency are increased, thus resulting in a shorter (smaller) selection period (Ton). Particularly, in the case where image signals corresponding to those for ordinary CRT displays are utilized, a frequency employed therefor is a certain value. In this case, one horizontal scan (selection) period is unambiguously determined by the liquid crystal panel structure (the number of scanning signal lines), thus considerably shortening the selection period Ton.

[0077] For example, when a liquid crystal display apparatus including 1000 scanning signal lines is driven at a frequency of 60 Hz, one horizontal scan period is 16 μsec. On the other hand, a practical liquid crystal material (particularly, one showing antiferroelectricity) exhibiting the V-T characteristic as shown in FIG. 3 can provide a switching speed (time) of several ten psec to several hundred psec in some cases when a switching from a point A (shown in FIG. 3) providing a maximum transmission state under application of a one-polarity voltage to a point B providing a maximum transmission state under application of the other (opposite)-polarity voltage although the switching time varies depending on the applied voltage, the operating temperature, etc. In a low-temperature environment (e.g., at ca. 5° C.), the response time exceeds 1 msec in some cases. Accordingly, the current liquid crystal material having a particle size is liable to fail to ensure a response time (speed) sufficient to complete the switching within the selection period Ton.

[0078] Herein, the “response time” refers to a time required for switching between two maximum transmission states (e.g., point A and point B) as shown in FIG. 3 in the case where a polarity of a drive (data signal) voltage is inverted for each pixel (frame inversion drive) or a time required for a transmittance change (0%⇄100%) between a maximum transmission state (e.g., point A shown in FIG. 3) and a minimum transmission state (e.g., point F) in the case where the frame inversion drive is not performed.

[0079] In this case, the switching in the liquid crystal layer 49 is caused and continued from the selection period Ton to the non-selection period Toff, whereby the electrical charges stored in the liquid crystal capacitance (Clc) and the storage capacitance (Cs) are consumed depending on a degree of the above-mentioned spontaneous polarization inversion. In the non-selection period Toff, a further electrical charging is not performed by the liquid crystal capacitance (Clc) and the storage capacitance (Cs), so that a (pixel) voltage Vpix applied to the liquid crystal layer 49 is lowered from the original (data signal) voltage Vs by a voltage decrement ΔV corresponding to the amount of the consumed electrical charges as shown in FIG. 5C. As a result, at the pixel, the voltage Vs for providing a prescribed optical state or display data is not applied to the liquid crystal layer 49. Actually, the liquid crystal layer 49 is supplied with a lower voltage (Vs−ΔV) providing an optical state or display data different from those of desired levels, thus failing to effect desired data-switching operation.

[0080] In the case where the liquid crystal device using the liquid crystal having a spontaneous polarization is driven by the active matrix drive scheme as described above, a net voltage decrement ΔV1 (V: volt) for switching of the liquid crystal at one-pixel portion of the liquid crystal layer 49 is given by the inversion of the spontaneous polarization of the liquid crystal and is determined according to the following equation (1):

[0081] ΔV1=ΔQ/Clc(1+α)(α=Cs/Clc)  (1),

[0082] wherein ΔQ (C) is an amount of inversion of the spontaneous polarization of the liquid crystal at one pixel, Clc (F) is a liquid crystal capacitance at one pixel, and Cs (F) is a storage capacitance at one pixel.

[0083] Particularly, in the case of the liquid crystal device providing the V-T characteristic as shown in FIG. 3, when the liquid crystal is switched in its alignment state from a maximum transmission state (point A) under application of one-polarity voltage, e.g., a positive-polarity voltage to another maximum transmission state (point B) under application of the other (opposite)-polarity (e.g., negative-polarity voltage), i.e., when a bright (while) state is continuously displayed in plural frames, the above parameter ΔQ is represented by the formula: ΔQ=2Ps×S where Ps (C/cm²) is a spontaneous polarization intrinsic to the liquid crystal material used and S (cm²) is an (effective) area of the pixel electrode.

[0084] Accordingly, a maximum (ΔVmax1:V) of the voltage decrement is obtained according to the following equation (2):

[0085] ΔVmax1=2Ps×S/Clc(1+α)  (2).

[0086] More specifically, the maximum voltage decrement ΔVmax1 (V) is calculated by the above equation (2) while changing values of Ps (spontaneous polarization of the liquid crystal) and α (which is determined unambiguously by the liquid crystal panel structure) and setting Clc=1.77 nF/cm²and S=300 μm×100 μm×0.7 (opening rate: 70%).

[0087] The results are shown in Table 1.

[0088] As apparent from Table 1, a larger ΔVmax1 is given by a larger Ps or a smaller α.

[0089] In an actual liquid crystal panel, a selection period Ton for one pixel is shorter, so that it is difficult to complete the switching of liquid crystal (i.e., inversion of the spontaneous polarization) in the period Ton. As a result, most of the switching (inversion) is liable to occur in a subsequent non-selection period Toff (immediately after the Ton). For this reason, in an actual (active matrix) drive, a voltage applied to the liquid crystal layer 49 in the non-selection period Toff is considered to be lowered from the prescribed voltage level Vs by a voltage decrement ΔV1 which can be closer to the ΔVmax1 (shown in Table 1) as a maximum level.

[0090] Referring again to FIG. 3, when writing operation from a gradational (display) state (point C) to a gradational state (point D) is performed by using the liquid crystal having a spontaneous polarization (exhibiting the V-T characteristic shown in FIG. 3) according to frame inversion drive (wherein a data signal voltage is applied while inverting its polarity for each frame), the voltage lowering is caused to provide a voltage decrement ΔV1 (=ΔQ/Clc (1+α)) based on an inversion degree (ΔQ) of the spontaneous polarization, which is basically in proportion to the spontaneous polarization (Ps).

[0091] In this instance, assuming that the liquid crystal device provides a transmittance Tc (%) at the point C and a transmittance T_D(%) at the point D and a change in Ps is in accordance with one-order theory, the voltage decrement ΔV1 is determined according to the following equation (3): $\begin{array}{cc}\begin{array}{c}\Delta V1=\left\{1/2\left(\mathrm{Tc}/100+T_D/100\right)\right\}\times 2\mathrm{Ps}\times S/\mathrm{Clc}\left(1+\alpha \right)\\ =\left\{1/2\left(\mathrm{Tc}/100+T_D/100\right)\right\}\times \Delta V\max 1.\end{array}& \left(3\right)\end{array}$

[0092] Accordingly, the voltage decrement ΔV1 by the frame inversion drive can be determined (converted) as a value which is in proportion to the ΔVmax1.

[0093] On the other hand, in the case where the frame inversion drive is not performed, e.g., when writing operation from a gradational state (point C shown in FIG. 3) to a gradational state (point E) is performed, a voltage decrement ΔV1 at that time is determined by the following equation (3)′: $\begin{array}{cc}\begin{array}{c}\Delta V1=\left\{\left(\mathrm{Tc}/T_E\right)/100\right)\}\times \mathrm{Ps}\times S/\mathrm{Clc}\left(1+\alpha \right)\\ =\left\{\left(\mathrm{Tc}/T_E\right)/100\right)\}\times \Delta V\max 1^{\prime },\end{array}& {\left(3\right)}^{\prime }\end{array}$

[0094] wherein Tc is a transmittance (%) at the point C, T_Eis a transmittance (%) at the point E, and ΔVmax1′ is a maximum voltage decrement (volt) (in the case of not performing the frame inversion drive) and satisfies

[0095] ΔVmax1′=Ps×S/Clc(1+α).

[0096] Similarly, switching operation from the maximum transmission state (point A) under one (e.g., positive)-polarity voltage application to a state (point F) providing transmittance=0 (%) under no voltage application is performed without effecting the frame inversion drive, an inversion degree of the spontaneous polarization is represented by the formula: ΔQ=Ps×S. Accordingly, the maximum voltage decrement (ΔVmax1′) based on the inversion of the spontaneous polarization of the liquid crystal is represented by the formula:

[0097] ΔVmax1′=Ps×S/Clc(1+α)  (3)″.

[0098] As described above, the voltage decrement ΔV1 in the case of not performing the frame inversion drive can be determined (converted) as a value which is in proportion to the ΔVmax1′.

[0099] The liquid crystal exhibiting the V-T characteristic as shown in FIG. 3 (particularly, in the case of antiferroelectric liquid crystal) generally has a very large spontaneous polarization (Ps) of at least 100 (nC/cm²), thus leading to a larger voltage decrement (ΔV1) from the applied data signal voltage (Vs) in the active matrix drive. As a result, a desired gradational (display) state cannot be obtained.

[0100] In the liquid crystal apparatus according to the present invention, even when a gate selection period Ton is shorter (smaller) than a switching (response) time of a liquid crystal having a spontaneous polarization in the above-mentioned active matrix drive scheme, drive conditions may appropriately be set so as to compensate a lowering in a holding voltage (by the liquid crystal and storage capacitances) due to the inversion of the spontaneous polarization (switching) of the liquid crystal, thus allowing a quick writing operation of desired data within each frame period.

[0101] As is understood from the above-mentioned formulas (1) to (3)″, we have found that a voltage (potential) decrement ΔV1 of a pixel electrode due to the spontaneous polarization inversion at the time of switching of the liquid crystal having a spontaneous polarization is (directly) proportional to an amount (ΔQ) of inversion of the spontaneous polarization of the liquid crystal used and the inversion amount ΔQ is substantially (directly) proportional to transmittances in gradational (display) states between which writing operation of the liquid crystal exhibiting a V-T characteristic, e.g., as shown in FIG. 3 is performed. In other words, it has been found that if gradational states before and after the writing operation are determined, a voltage (potential) decrement ΔV1 corresponding to a compensation voltage at that time is also obtained. In the present invention, the compensation voltage is determined by the voltage decrement ΔV1 based on a current display data (state) and a subsequent display data (state) and is superposed on an image (data) signal voltage Vs (i.e., source voltage), thus providing a desired gradational display potential.

[0102] More specifically, as shown in FIG. 6B, a data signal line (source line) is supplied with a corrected data signal voltage including a compensation voltage (Vs+ΔV1), i.e., an original data signal voltage (Vs) determined from the V-T characteristic as shown in FIG. 3 superposed with a specific voltage decrement (ΔV1) determined depending on prescribed image data (transmittances). As a result, in the selection period Ton, the corrected data signal voltage (Vs+ΔV1) is held at the pixel concerned but, as show in FIG. 6C, is gradually lowered in the subsequent non-selection period Toff with the switching of the liquid crystal (inversion of the spontaneous polarization), thus supplying the liquid crystal layer 49 with the original data signal voltage Vs (as a result of the voltage lowering of ΔV1 from the voltage Vs+ΔV1). Consequently, the original data signal voltage Vs for displaying desired data is applied to the liquid crystal at the pixel in one frame period, thus allowing desired gradational (data) display.

[0103] FIG. 7 shows an example of a block diagram illustrating the liquid crystal apparatus including a liquid crystal device (panel) and a drive means according to the present invention.

[0104] Referring to FIG. 7, the liquid crystal apparatus includes: a controller unit 70, a liquid crystal device (panel) unit 71, a data generator unit 72, an active matrix panel 73, a scanning signal line driver 74, a data signal line driver 75, a scanning signal control circuit 76, data signal control circuit 77, a drive voltage generation circuit 78, a scanning signal correction circuit 79, a video RAM (VRAM) 80, image data 81, a data transfer clock signal 82, a signal voltage 83, display data 84, and scanning signal line address data 85.

[0105] In the liquid crystal apparatus shown in FIG. 7, a data signal sent from the data signal control circuit 77 depending on the image data 81 transmitted from the VRAM 81 is corrected by determining a voltage decrement ΔV1 (compensation voltage) by the signal voltage correction circuit 79 depending on its data and its immediately preceding data stored in the controller unit 70 by reference to a V-T characteristic of the liquid crystal as described above. The thus corrected data signal voltage (Vs+ΔV1) as the display data 84 is applied to data signal (source) line(s) via the data signal line diver 75.

[0106] FIG. 8 shows another example of a block diagram of the liquid crystal apparatus of the present invention. The block diagram of the liquid crystal apparatus further includes a temperature sensor 86 and a temperature signal 87 in addition to those for the block diagram of the liquid crystal apparatus shown in FIG. 7.

[0107] The liquid crystal having a spontaneous polarization exhibits a property such that a value of the spontaneous polarization (Ps) is lower at a higher temperature and is higher at a lower temperature. Accordingly, an amount (ΔQ) of inversion of the spontaneous polarization at the time of switching in the active matrix drive is fluctuated depending on a change in temperature, thus resulting in a change in voltage decrement (ΔV1) with temperature change or distribution.

[0108] In the liquid crystal apparatus shown in FIG. 8, in addition to the voltage decrement correction as a first correction factor as in the case of the liquid crystal apparatus shown in FIG. 7, another correction based on a temperature characteristic (temperature dependence) of the spontaneous polarization is employed as a second correction factor.

[0109] More specifically, in addition to the above-mentioned data signal, a temperature signal 87 sent from a temperature sensor 86 is transmitted to the signal voltage correction circuit 79 for the data signal, whereby the temperature characteristic for the drive of the active matrix panel is corrected at the same time, thus allowing a combination of corrections based on the voltage decrement and the temperature characteristic of the spontaneous polarization.

[0110] FIG. 9 shows a block diagram for illustrating a structure of the signal voltage correction circuit 79 used in the liquid crystal apparatus shown in FIG. 8.

[0111] Referring to FIG. 9, the correction circuit 79 includes a subtractor 91, integrating units 92 and 93, and an adder 94.

[0112] A temperature data (Z° C.) from a temperature sensor provided to the liquid crystal panel is inputted into the substrate 91 to calculate a spontaneous polarization at that temperature. Further, a current display data (transmittance T1 (%)) and a subsequent display data (transmittance T2 (%)) at one pixel concerned are inputted into the integrating unit 92 to calculate an amount of inversion of the spontaneous polarization (at a reference temperature). These data thus obtained (by the subtractor 91 and the integrating unit 92) are set to the integrating unit 93 to determine a voltage decrement ΔV1 at that temperature at the time of writing operation of these data. The voltage decrement ΔV1 and an input (data signal) voltage Vs which is unambiguously determined depending on a V-T characteristic (as shown in FIG. 3) with respect to a subsequent writing data are inputted into the adder 84 to obtain an image data signal (Vs+ΔV1).

[0113] The correction circuits 79 (in combination with the temperature sensor 86) as shown in FIGS. 7 and 8 can be additionally incorporated in a conventional TN-type drive circuit, so that it is possible to use a drive circuit (drive means) for the conventional TN-type liquid crystal device in the present invention, thus advantageously reducing production costs for the liquid crystal apparatus according to the present invention.

[0114] IN the present invention, the compensation voltage (ΔV1) is in proportion to the inversion amount of the spontaneous polarization as described above, so that it is difficult to effect voltage correction control for each transmittance by a conventional voltage application method for the ordinary TN-type liquid crystal cell (device) wherein a drive voltage is applied across the board to the liquid crystal layer by means of a luminance-adjusting volume.

[0115] In this embodiment, a voltage decrement in a non-selection period Toff is particularly taken into consideration for displaying a desired gradational state.

[0116] As described in First Embodiment, in the case where the liquid crystal device using the liquid crystal having a spontaneous polarization is driven by the active matrix drive scheme as described above, a net voltage decrement ΔV1 (V: volt) for switching of the liquid crystal at one-pixel portion of the liquid crystal layer 49 is is determined according to the following equation (1):

[0117] ΔV1=ΔQ/Clc(1+α)(α=Cs/Clc)  (1),

[0118] wherein ΔQ (C) is an amount of inversion of the spontaneous polarization of the liquid crystal at one pixel, Clc (F) is a liquid crystal capacitance at one pixel, and Cs (F) is a storage capacitance at one pixel.

[0119] More specifically, as described above, inversion of spontaneous polarization of a liquid crystal is partially performed in ai selection period Ton although a degree of the inversion varies depending on a liquid crystal material used. In a subsequent non-selection period Toff, a voltage decrement ΔV2 is determined according to the following equation (7):

[0120] ΔV2={ΔQ×M/Clc(1+α)}  (7),

[0121] wherein M represents a proportion (rate) of polarized (electric) charges incapable of inversion in a scanning selection period of one scanning line depending on writing data for each pixel.

[0122] Particularly, in the case of the liquid crystal device providing the V-T characteristic as shown in FIG. 3, when the liquid crystal is switched in its alignment state from a maximum transmission state (point A) under application of one-polarity voltage, e.g., a positive-polarity voltage to another maximum transmission state (point B) under application of the other (opposite)-polarity (e.g., negative-polarity voltage), i.e., when a bright (while) state is continuously displayed in plural frames, the above parameter ΔQ is represented by the formula: ΔQ=2Ps×S where Ps (C/cm²) is a spontaneous polarization intrinsic to the liquid crystal material used and S (cm²) is an (effective) area of the pixel electrode.

[0123] Accordingly, a maximum (ΔVmax1:V) for each pixel of the voltage decrement is obtained according to the following equation (2):

[0124] ΔVmax1=2Ps×S/Clc(1+α)  (2).

[0125] Further, a maximum (ΔVmax2) of the voltage decrement ΔV2 in the non-selection period Toff subsequent to the selection period Ton is also obtained by the following equation (8):

[0126] ΔVmax2=2Ps×S×M/Clc(1+α)  (8).

[0127] Referring again to FIG. 3, when writing operation from a gradational (display) state (point C) to a gradational state (point D) is performed by using the liquid crystal having a spontaneous polarization according to frame inversion drive, the voltage lowering is caused to provide a voltage decrement ΔV2 (=ΔQ×M/Clc (1+α)) based on an inversion degree (ΔQ) of the spontaneous polarization in the period Toff, which is basically in proportion to the spontaneous polarization (Ps).

[0128] In this instance, assuming that the liquid crystal device provides a transmittance Tc (%) at the point C and a transmittance T_D(%) at the point D and a change in Ps is in accordance with one-order theory, the voltage decrement ΔV2 is determined according to the following equation (9): $\begin{array}{cc}\begin{array}{c}\Delta V2=\left\{1/2\left(\mathrm{Tc}/100+T_D/100\right)\right\}\times 2\mathrm{Ps}\times S\times M/\mathrm{Clc}\left(1+\alpha \right)\\ =\left\{1/2\left(\mathrm{Tc}/100+T_D/100\right)\right\}\times \Delta V\max 2.\end{array}& \left(9\right)\end{array}$

[0129] Accordingly, the voltage decrement ΔV2 by the frame inversion drive can be determined (converted) as a value which is in proportion to the ΔVmax2.

[0130] On the other hand, in the case where the frame inversion drive is not performed, e.g., when writing operation from a gradational state (point C shown in FIG. 3) to a gradational state (point E) is performed, a voltage decrement ΔV2 at that time in the period Toff is determined by the following equation (10): $\begin{array}{cc}\begin{array}{c}\Delta V2=\left\{\mathrm{Tc}-T_E\right)/100\}\times \mathrm{Ps}\times S\times M/\mathrm{Clc}\left(1+\alpha \right)\\ =\left\{\mathrm{Tc}-T_E\right)/100\}\times \Delta V\max 2^{\prime },\end{array}& \left(10\right)\end{array}$

[0131] wherein Tc is a transmittance (%) at the point C, T_Eis a transmittance (%) at the point E, and ΔVmax2′ is a maximum voltage decrement (volt) (in the case of not performing the frame inversion drive) and satisfies

[0132] ΔVmax2′=Ps×S×M/Clc(1+α).

[0133] Similarly, switching operation from the maximum transmission state (point A) under one (e.g., positive)-polarity voltage application to a state (point F) providing transmittance=0 (%) under no voltage application is performed without effecting the frame inversion drive, an inversion degree of the spontaneous polarization is represented by the formula: ΔQ=Ps×S. Accordingly, the maximum voltage decrement (ΔVmax2′) based on the inversion of the spontaneous polarization of the liquid crystal in the period Toff is represented by the formula:

[0134] Vmax2′=Ps×S×M/Clc(1+α)  (11).

[0135] As described above, the voltage decrement V2 in the case of not performing the frame inversion drive can be determined (converted) as a value which is in proportion to the ΔVmax2′.

[0136] The liquid crystal exhibiting the V-T characteristic as shown in FIG. 3 (particularly, in the case of antiferroelectric liquid crystal) generally has a very large spontaneous polarization (Ps) of at least 100 (nC/cm²), thus leading to a larger voltage decrement (ΔV1) from the applied data signal voltage (Vs) in the active matrix drive. As a result, a desired gradational (display) state cannot be obtained.

[0137] In the liquid crystal apparatus according to the present invention, even when a gate selection period Ton is shorter (smaller) than a switching (response) time of a liquid crystal having a spontaneous polarization in the above-mentioned active matrix drive scheme, drive conditions and panel structure may appropriately be set to satisfy a formula (12) shown below so as to compensate a lowering in a holding voltage (by the liquid crystal and storage capacitances) due to the inversion of the spontaneous polarization (switching) of the liquid crystal in the non-selection period Toff, thus allowing a quick writing operation of desired data within each frame period.

[0138] Vs2≧{ΔQ×M/(Clc+Cs)}+Vs1  (12),

[0139] wherein Vs2 is a data signal voltage (V) applied to one pixel, Vs1 is a voltage (V) for providing writing data for the pixel based on a voltage-transmittance characteristic of the liquid crystal, ΔQ is an amount (C) of inversion of the spontaneous polarization of the liquid crystal, Clc is a liquid crystal capacitance (F) at one pixel, Cs is a storage capacitance (F) at one pixel, and M is a proportion of polarized charges incapable of inversion in a scanning selection period of one scanning line depending on writing data for the pixel.

[0140] Herein, the parameter M may also be represented by a portion of the remaining portion of polarity inversion (of the spontaneous polarization of the liquid crystal) in a scanning selection period for an associated scanning signal line.

[0141] In an actual liquid crystal panel, when a selection period Ton for one pixel is set to be considerably shorter, it is difficult to complete the switching of liquid crystal (i.e., inversion of the spontaneous polarization) in the period Ton. As a result, most of the switching (inversion) is liable to occur in a subsequent non-selection period Toff (immediately after the Ton). For this reason, in an actual (active matrix) drive, a voltage applied to the liquid crystal layer 49 in the non-selection period Toff is considered to be lowered from a desired voltage level Vs by a voltage decrement ΔV1 which can be closer to the ΔVmax1 as a maximum level.

[0142] By appropriately controlling the voltage decrement ΔV1 (or ΔVmax1), it is possible to realize a good gradational display. In further detail, the voltage lowering is caused depending on an amount of electric charges which cannot be inverted in the selection period Ton, so that an accurate voltage decrement in the non-selection period Toff is ΔV2 or ΔVmax2. Accordingly, in order to effect gradational display including accurate gradational level control, it is necessary to control the voltage decrement ΔV2 (or ΔVmax2). In the present invention, the liquid crystal panel structure and/or driving conditions are designed or set so as to fulfill the above-mentioned formula (condition) (12).

[0143] As is understood from the above-mentioned formulas (7) to (12), we have found that a voltage (potential) decrement ΔV2 of a pixel electrode due to the spontaneous polarization inversion at the time of switching of the liquid crystal having a spontaneous polarization is (directly) proportional to an amount (ΔQ) of inversion of the spontaneous polarization of the liquid crystal used and the inversion amount ΔQ is substantially (directly) proportional to transmittances in gradational (display) states between which writing operation of the liquid crystal exhibiting a V-T characteristic, e.g., as shown in FIG. 3 is performed. In other words, it has been found that if gradational states before and after the writing operation are determined, a voltage (potential) decrement ΔV2 corresponding to a compensation voltage at that time is also obtained. In the present invention, a voltage Vs2 is applied to the pixel so that the Vs2 is equal to or larger than a voltage (ΔV2+Vs1) determined by superposing the voltage decrement ΔV2 based on a current display data (state) and a subsequent display data (state) on an image (data) signal voltage Vs1 (i.e., source voltage), thus providing a desired gradational display potential.

[0144] Herein, the value of M (a proportion of polarized charges incapable of inversion in Ton for one scanning line depending on writing data for a pixel concerned) may be determined unambiguously by current writing data for the pixel concerned and writing data in the (immediately) preceding frame (an average liquid crystal molecular position in the preceding frame). The value of M may vary depending on Ton (scanning selection period) for one scanning line, physical properties (e.g., response time or speed) of the liquid crystal material used, environmental (operation) temperature, etc.

[0145] In the case of the frame inversion drive, a minimum M (M=0) is given when a data (signal) voltage for a preceding frame is 0 (V) (providing a minimum transmittance for display a black (dark) state) and a data voltage for a current frame is also 0 (V). Further, a maximum M is given, e.g., when a data voltage for a preceding frame is −V0 (V) (providing a maximum transmittance for displaying a white (bright) state as shown in FIG. 3) and a data voltage for a current frame is V0 (V) (maximum transmittance: white state).

[0146] On the other hand, in the case where the frame inversion drive is not performed, a minimum M (M−0) is given, e.g., when both of data voltages for a preceding frame and a current frame, respectively, are 0 (V) (minimum transmittance: black state). Further, a maximum M is given, e.g., when a data voltage for a preceding frame is V0 (V) (maximum transmittance: white state) and a data voltage for a current frame is 0 (V) (minimum transmittance: black state).

[0147] Particularly, when the response time (speed) is shorter (slower) and the scanning selection period (Ton) is shorter, the value of M becomes larger and approaches 1 (M=1).

[0148] In view of any gradational display levels (including, e.g., back-to-white display, white-to-black display, and halftone-to-halftone display), the value of M determined by the preceding frame data and the current from data may be in the range of 0≦M<1. For example, the value of M in Example 4 appearing hereinafter is 0.5 (M=0.5).

[0149] In this (second) embodiment, e.g., as shown in FIG. 1B, a data signal line (source line) is supplied with a corrected data signal voltage including a compensation voltage (Vs+ΔV1), i.e., an original data signal voltage (Vs) determined from the V-T characteristic as shown in FIG. 3 superposed with a specific voltage decrement (ΔV2) determined depending on prescribed image data (transmittances). As a result, in the selection period Ton, the corrected data signal voltage (Vs1+ΔV2) is held at the pixel concerned but, as show in FIG. 11C, is gradually lowered in the subsequent non-selection period Toff with the switching of the liquid crystal (inversion of the spontaneous polarization), thus supplying the liquid crystal layer 49 with the original data signal voltage Vs1 (as a result of the voltage lowering of ΔV2 from the voltage Vs1+ΔV2). Consequently, the original data signal voltage Vs1 for displaying desired data is applied to the liquid crystal at the pixel in one frame period, thus allowing desired gradational (data) display.

[0150] In this (second) embodiment, similarly as in First Embodiment, the liquid crystal apparatus may be driven by using drive (control) means as described with reference to FIGS. 7, 8 and 9. More specifically, it is possible to effect correction of a data signal voltage applied to the pixel (liquid crystal layer) based on a voltage decrement or a combination of a voltage decrement with a temperature change (distribution) of the spontaneous polarization (Ps).

[0151] In this embodiment, the number of gradational levels and a fluctuation in total capacitance (Clc+Cs) within a liquid crystal cell are particularly taken into consideration for effecting a good gradational display.

[0152] More specifically, also in this embodiment, as shown in FIG. 6B, a data signal line (source line) is supplied with a corrected data signal voltage including a compensation voltage (Vs+ΔV1), i.e., an original data signal voltage (Vs) determined from the V-T characteristic as shown in FIG. 3 superposed with a specific voltage decrement (ΔV1) determined depending on prescribed image data (transmittances). As a result, in the selection period Ton, the corrected data signal voltage (Vs+ΔV1) is held at the pixel concerned but, as show in FIG. 6C, is gradually lowered in the subsequent non-selection period Toff with the switching of the liquid crystal (inversion of the spontaneous polarization), thus supplying the liquid crystal layer 49 with the original data signal voltage Vs (as a result of the voltage lowering of ΔV1 from the voltage Vs+ΔV1). Consequently, the original data signal voltage Vs for displaying desired data is applied to the liquid crystal at the pixel in one frame period, thus allowing desired gradational (data) display.

[0153] As mentioned above, in the case where the liquid crystal device using the liquid crystal having a spontaneous polarization is driven by the active matrix drive scheme as described above, a net voltage decrement ΔV1 (V: volt) for switching of the liquid crystal at one-pixel portion of the liquid crystal layer 49 is given by the inversion of the spontaneous polarization of the liquid crystal and is determined according to the following equation (1):

[0154] ΔV1=ΔQ/(Clc+Cs)  (1),

[0155] wherein ΔQ (C) is an amount of inversion of the spontaneous polarization of the liquid crystal at one pixel, Clc (F) is a liquid crystal capacitance at one pixel, and Cs (F) is a storage capacitance at one pixel.

[0156] Particularly, in the case of the liquid crystal device providing the V-T characteristic as shown in FIG. 3, when the liquid crystal is switched in its alignment state from a maximum transmission state (point A) under application of one-polarity voltage, e.g., a positive-polarity voltage to another maximum transmission state (point B) under application of the other (opposite)-polarity (e.g., negative-polarity voltage), i.e., when a bright (while) state is continuously displayed in plural frames, the above parameter ΔQ is represented by the formula: ΔQ=2Ps×S where Ps (C/cm²) is a spontaneous polarization intrinsic to the liquid crystal material used and S (cm²) is an (effective) area of the pixel electrode.

[0157] Accordingly, a maximum (ΔVmax1:V) of the voltage decrement is obtained according to the following equation:

[0158] ΔVmax1=2Ps×S/(Clc+Cs).

[0159] In an actual liquid crystal panel, a selection period Ton for one pixel is shorter, so that it is difficult to complete the switching of liquid crystal (i.e., inversion of the spontaneous polarization) in the period Ton. As a result, most of the switching (inversion) is liable to occur in a subsequent non-selection period Toff (immediately after the Ton). For this reason, in an actual (active matrix) drive, a voltage applied to the liquid crystal layer 49 in the non-selection period Toff is considered to be lowered from the prescribed voltage level Vs by a voltage decrement ΔV1 which can be closer to the ΔVmax1 as a maximum level.

[0160] For example, in the case of effecting the above-mentioned switching from the point A to the point C (shown in FIG. 3), a voltage consisting of a saturation voltage V0 of the liquid crystal (a voltage providing a maximum transmittance in a state (DC) drive corresponding to V0 shown in FIG. 3) superposed with the above-mentioned ΔV1 (or ΔVmax1) is applied to the liquid crystal layer 49.

[0161] As apparent from the above formulas (1) and (2), ΔV1 (ΔVmax1) is changed depending on the total capacitance (Clc+Cs) within the liquid crystal cell. In the actual liquid crystal panel, each of the liquid crystal capacitance Clc and the storage capacitance inevitably causes a fluctuation (or distribution) from its set value for each pixel in view of the production process. As a result, the total capacitance (Clc+Cs) also causes a distribution of its value over the entire liquid crystal cell to provide a maximum value ((Clc+Cs)max) and a minimum value ((Clc+Cs)min).

[0162] If a fluctuation in ΔV1 (voltage decrement) based on (Clc+Cs)max and (Clc+Cs)min is within a voltage fraction for one gradational level, gradational display is little affected. More specifically, when gradation display (for displaying n gradational levels) is performed by applying a voltage in the range of 0 (V) to V0 (V) the (Clc+Cs)max and the (Clc+Cs)min may preferably satisfy the following relationship (13):

[0163] (V0−0)/(n−1)>{2Ps×S/(Clc+Cs)min−2Ps×S/(Clc+Cs)max},

[0164] i.e.,

[0165] V0/(n−1)>2Ps×S{1/(Clc+Cs)min−2/(Clc+Cs)max},

[0166] i.e.,

[0167] 1/(n−1)>{2Ps×S/V0}×{1/(Clc+Cs)min−1/(Clc+Cs)max}  (13)

[0168] In the relationship (13), the latter parameter {1/(Clc+Cs)min−1/(Clc+Cs)max} may be approximated as follows:

[0169] {(Clc+Cs)max−(Clc+Cs)min}/{(Clc+Cs)ave}²,

[0170] where (Clc+Cs)ave represents an average of (Clc+Cs) within the liquid crystal cell.

[0171] Here, assuming that a capacitance distribution factor (A) within the liquid crystal cell is represented by the equation:

[0172] A={(Clc+Cs)max−(Clc+Cs)min}/(Clc+Cs)ave,

[0173] the above formula (13) is represented by the following formula (14):

[0174] 1/(n−1)>A(2Ps×S)/V0(Clc+Cs)ave  (14).

[0175] In this (third) embodiment, the liquid crystal material used and the liquid crystal cell structure employed may appropriately selected so as to satisfy the above formula (14), whereby a good gradational display can be performed.

[0176] Further, in this (third) embodiment, similarly as in First Embodiment, the liquid crystal apparatus may be driven by using drive (control) means as described with reference to FIGS. 7, 8 and 9. More specifically, it is possible to effect correction of a data signal voltage applied to the pixel (liquid crystal layer) based on a voltage decrement or a combination of a voltage decrement with a temperature change (distribution) of the spontaneous polarization (Ps). Further, in this embodiment, it is also possible to drive the liquid crystal apparatus by a drive scheme without effecting frame inversion of a polarity of an applied voltage.

[0177] In the present invention, a liquid crystal device having a voltage (V)—transmittance (T) characteristic as shown in FIG. 14 can also be applied to First to Third Embodiments for the liquid crystal apparatus according to the present invention to attain similar effects as obtained by using a liquid crystal device having a voltage (V)—transmittance (T) characteristic as shown in FIG. 3.

[0178] A liquid crystal device having a V-T characteristic shown in FIG. 14 can be formed by using a liquid crystal material having a spontaneous polarization and exhibiting a chiral smectic phase, of which the composition is adjusted to preferably contain at most 50 wt. % of compounds having an ester skeleton, and further by appropriate adjustment of the liquid crystal material treatment, the device structure including a material, and a treatment condition for alignment control films. More specifically, the V-T characteristic of FIG. 14 is realized by a liquid crystal device wherein the liquid crystal molecules are aligned to provide an average molecular axis substantially coinciding with an average uniaxial aligning treatment axis to be mono-stabilized in the absence of an electric field applied thereto and, under application of voltages of one polarity (a first polarity), are realigned to provide a tilt angle which varies continuously from the average molecular axis of the monostabilized position depending on the magnitude of the applied voltage, but under application of voltages of the other polarity (i.e., a second polarity opposite to the first polarity), the liquid crystal molecules are not substantially tilted but provide an average molecular axis substantially coinciding with the average molecular axis under no electric field regardless of the magnitude of the applied voltages. The liquid crystal material (having a spontaneous polarization and showing a chiral smectic phase) may preferably exhibit a phase transition series on temperature decrease of I (isotropic) phase—Ch (cholesteric) phase—SmC* (chiral smectic) phase or I phase—SmC* phase and be placed in a non-memory state in the SmC* phase.

[0179] Further, a liquid crystal device having a voltage (V)—transmittance (T) characteristic as shown in FIG. 15 can also be applied to First to Third Embodiments for the liquid crystal apparatus according to the present invention to attain similar effects as obtained by using a liquid crystal device having a voltage (V)—transmittance (T) characteristic as shown in FIG. 3.

[0180] A liquid crystal device having a V-T characteristic shown in FIG. 15 can be formed by using a liquid crystal material having a spontaneous polarization and exhibiting a chiral smectic phase, while adjusting the composition thereof, and further by appropriate adjustment of the liquid crystal material treatment, the device structure including a material, and a treatment condition for alignment control films. More specifically, the V-T characteristic of FIG. 15 is realized by a liquid crystal device wherein the liquid crystal molecules are aligned to provide an average molecular axis substantially coinciding with an average uniaxial aligning treatment axis to be mono-stabilized in the absence of an electric field applied thereto and, under application of voltages of one polarity (a first polarity), are realigned to provide a tilt angle which varies continuously from the average molecular axis of the monostabilized position depending on the magnitude of the applied voltage. On the other hand, under application of voltages of the other polarity (i.e., a second polarity opposite to the first polarity), the liquid crystal molecules are tilted from the average molecular axis under no electric field depending on the magnitude of the applied voltages, but the maximum tilt angle obtained under application of the second polarity voltages is substantially smaller than the maximum tilt angle formed under application of the first polarity voltages. The liquid crystal material (having a spontaneous polarization and showing a chiral smectic phase) may preferably exhibit a phase transition series on temperature decrease of I phase—Ch phase—SmC* phase or I phase—SmC* phase and be placed in a non-memory state in the SmC* phase.

[0181] A liquid crystal panel for active matrix drive including a plurality of TFTs as shown in FIG. 1 and a plurality of pixels (100×100 pixels) each having a structure as shown in FIG. 2 was prepared in accordance with an ordinary production process therefor.

[0182] More specifically, referring to FIG. 2 for each pixel, with respect to an active matrix plate 20, an a-Si (amorphous silicon) TFT 14 including a gate insulation film 23 of silicon nitride was used as a TFT and an ITO film was used as a pixel electrode 15. A storage capacitance 32 was constituted by the pixel electrode 15, a storage capacitance electrode 30 of ITO, and the gate insulation (silicon nitride) film 23 disposed between the electrodes 15 and 30 so that it had a capacitance (Sc) which was 20 times a liquid crystal (pixel) capacitance (Clc). On the TFT 14 and the pixel electrode 15, a 20 nm-thick alignment film 43aof aliphatic polyimide resin was formed and subjected to a rubbing (uniaxial aligning) treatment, thus preparing an active matrix plate.

[0183] A counter plate 40 was prepared by forming a 20 nm-thick alignment film 43bof aliphatic polyimide resin on an alkaline glass substrate 41 entirely coated with a common electrode 42 of ITO, followed by rubbing treatment for uniaxial alignment.

[0184] On the counter plate 40, spacer beads having an average particle size of 2 μm were dispersed, and the active matrix plate 20 was superposed to prepare a blank cell.

[0185] As gap of the blank cell (between the substrates 20 and 40) was filled with a chiral smectic liquid crystal 49 having a spontaneous polarization and exhibiting a voltage-transmittance (V-T) characteristic (as shown in FIG. 3 at the time of voltage application of a rectangular waveform) in accordance with an ordinary process (vacuum injection under heating), thus preparing a liquid crystal panel (device) for active matrix drive scheme having 10,000 (100×100) pixels.

[0186] The chiral smectic liquid crystal showed a spontaneous polarization (Ps) of ca. 40 nC/cm at 30° C. as measured by the triangular wave method. The liquid crystal capacitance (Clc) per unit area 31 between the pixel electrode 15 and the common electrode 42 was set to ca. 1.77 nF/cm . The pixel electrode 15 (for one pixel) had an area of 300 μm×100 μm and an opening rate of 70%, thus providing an effective spontaneous polarization (S) of 300 μm×100 μm×0.7=2.1×10⁻⁴cm².

[0187] The resultant liquid crystal panel showed a V-T characteristic under application of a rectangular wave (60 Hz) as shown in FIG. 3 wherein a transmittance was substantially linearly increased from 0% (at 0 volt: point F) to 100% (at a saturation voltage V0 (at 30° C.)=ca. 4 volts: point A). This V-T characteristic was not substantially changed in a temperature range of 10-45° C. At further high temperatures, a tilt angle of the chiral smectic liquid crystal used as decreased to lower a resultant transmittance (T) but the gradient (slope) of the V-T curve was not substantially changed.

[0188] As apparent from Table 1 (shown above and employing the same S and Clc), when Ps=40 nC/cm²and α(Cs/Clc)=20, a maximum voltage decrement ΔVmax1 is 2.15 (volt) at the time of switching between the point A and the point B each providing a maximum transmission state.

[0189] In this example, a voltage decrement (ΔV1R) for respective gradational (display) levels may be approximately represented by a formula (4) shown below based on the above-mentioned formula (3) and a linearity of the change in transmittance between 0 (V) and 2.15 (V) (=V0).

[0190] ΔV1R(volt)=2.15 (volt)×transmittance (%)/100  (4).

[0191] A liquid crystal apparatus including the above-prepared liquid crystal panel (device) and drive means arranged and designed to have a structure as shown by the block diagram of FIG. 7 was prepared so that a signal voltage correction circuit 79 was set to supply a data signal voltage including the voltage decrement ΔV1R according to the formula (4) depending on a prescribed image data (transmittance).

[0192] When the liquid crystal apparatus as shown in FIG. 7 was driven by using driving waveforms as shown in FIGS. 6A-6C (one horizontal scanning selection period (Ton)=16 μsec, frame frequency=60 Hz) in the active matrix drive scheme, it is possible to provide a transmittance of 100% as in the case of rectangular wave voltage application and also provide desired gradational levels (transmission states).

[0193] A liquid crystal apparatus was prepared in the same manner as in Example 1 except that the drive means (as shown in FIG. 7) was changed to that shown in FIG. 8 including a signal voltage correction circuit 79 as specifically show in FIG. 9.

[0194] The liquid crystal used (the same as in Example 1) showed the following temperature characteristic (dependence) of a spontaneous polarization (Ps), wherein the Ps was relatively linearly changed in an operation temperature range.

[0195] As apparent from above, the Ps value is increased on temperature decrease at a rate of ca. 0.5 (nC/cm²) per 1° C., thus being represented by the following formula (5):

[0196] Ps(nC/cm²)=40+(½)×(30−Z)  (5),

[0197] wherein Z represents an operation temperature.

[0198] On the other hand, at the respective temperature, as is understood from the formulas (1), (3) and (3)′ in First Embodiment described above, the voltage decrement ΔV1 is always in proportion to ΔQ (inversion amount of Ps).

[0199] In this example, the signal voltage correction circuit 79 as show in FIGS. 8 and 9 was designed and set so that a corrected data signal supplied therefrom was determined based on an additional (second) correction factor according to the formula (5) (temperature characteristic of Ps) in addition to the (first) correction factor according to the formula (4) (the voltage decrement correction by a transmittance), thus further accurately providing desired gradational levels.

[0200] According to this example, the signal voltage correction circuit 79 can provide a corrected voltage signal based on a first correction (voltage) signal sent from the data signal control circuit 77 and a second correction (temperature) signal set from the temperature sensor 86 in combination. This corrected voltage signal from the correction circuit 79 is determined based on linear functions, so that the correction circuit 79 can result in a simplified circuit and also is applicable to a drive circuit system (means) of the conventional TN-type liquid crystal apparatus as an additional circuit, thus advantageously reducing production costs.

[0201] A liquid crystal apparatus was prepared in the same manner as in Example 1 except that the liquid crystal device (panel) was prepared by using the following materials and conditions:

[0202] α(Cs/Clc): 3,

[0203] Alignment film: aromatic polyimide film,

[0204] Spacer beads: 1.4 μm dia.,

[0205] Liquid crystal composition: principally comprising pyrimidine skeleton-based liquid crystal compounds, and

[0206] Ps: 2.5 nC/cm².

[0207] When the liquid crystal device was subjected to measurement of transmittance in combination with a pair of polarizers arranged to provide the darkest state under no voltage application by changing a source voltage while applying a DC voltage to gate lines, the resultant V-T characteristic was that shown in FIG. 3 with 0=3 (volts) and −V0=−3 (volts).

[0208] In this example, a maximum voltage decrement ΔVmax1 according to the above-mentioned formula (2) (in First Embodiment) was calculated as ΔVmax1=0.71 (V). Accordingly, a voltage decrement ΔV1R for respective gradational levels due to inversion of spontaneous polarization at the pixel electrode portion was approximately represented by the following formula (6):

[0209] ΔV1R=0.71 (V)×transmittance (%)/100  (6).

[0210] When the liquid crystal was driven similarly as in Example 1, it was possible to effect good gradational display.

[0211] A liquid crystal apparatus was prepared in the same manner as in Example 1 and was driven in the same manner as in Example 1 except that the drive voltage (V0=4 (V) as shown in FIG. 3) was applied without effecting correction of the voltage decrease as in the case of the conventional TN-type liquid crystal apparatus.

[0212] The thus-driven liquid crystal apparatus caused a maximum voltage decrement (ΔVmax1) of 2.15 (V), thus providing a display state providing a transmittance below ca. 50% even if the maximum voltage (V0=4 (V)) for providing a transmittance of 100% was applied.

[0213] As a result, the liquid crystal apparatus failed to effect a good gradational display for displaying desired gradational levels.

[0214] As described above, according to the liquid crystal apparatus of the present invention prepared in Examples 1-3, a lowering in transmittance caused by a potential (voltage) drop (lowering) of the pixel electrode due to inversion of the spontaneous polarization of the liquid crystal used was accurately corrected by a simple correction means or circuit, thus providing a prescribed (original) higher transmittance.

[0215] Further, the corrected data signal voltage to be applied can be obtained by approximate calculation based on a combination of simple linear functions without using a table reference method with an expensive memory, thus resulting in a simple correction circuit leading to cost reduction of the resultant liquid crystal apparatus.

[0216] Further, the liquid crystal apparatus of the present invention may be constituted by using a ferroelectric liquid crystal having a smaller spontaneous polarization instead of the antiferroelectric liquid crystal having a larger spontaneous polarization. In this case, it may be possible to attain the similar results as in Example 1-3.

[0217] Liquid crystal panels for active matrix drive each including a plurality of TFTs as shown in FIG. 1 and a plurality of pixels (320×240 pixels) each having a structure as shown in FIG. 2 was prepared in accordance with an ordinary production process therefor.

[0218] More specifically, referring to FIG. 2 for each pixel, with respect to an active matrix plate 20 for each liquid crystal panel, an a-Si (amorphous silicon) TFT 14 including a gate insulation film 23 of silicon nitride was used as a TFT and an ITO film (300 μm×100 μm for each pixel) was used as a pixel electrode 15. A storage capacitance 32 for each pixel was constituted by the pixel electrode 15, a storage capacitance electrode 30 of ITO, and the gate insulation (silicon nitride) film 23 (0.3 μm-thick) disposed between the electrodes 15 and 30.

[0219] In this example, an areal ratio between the storage capacitance electrode and the pixel electrode was changed for respective liquid crystal panels in a range of 1:20 to 18:20, thus providing a plurality of storage capacitances different in capacitance value. Further, each of the pixel electrodes had an opening rate of 70% for each pixel (corr. to one bit) and the respective pixel electrodes were arranged with a pitch of 300 μm.

[0220] On the TFT 14 and the pixel electrode 15, a 20 nm-thick alignment film 43aof a polyimide prepared by using a polyacid acid (“LP-64”, mfd. by Toray K.K.) dissolved in NMP (N-methylpyrrolidone) was formed and subjected to a rubbing (uniaxial aligning) treatment, thus preparing an active matrix plate 20 provided with different storage capacitances.

[0221] A counter plate 40 was prepared by forming a 20 nm-thick alignment film 43bof the same polyimide resin (as in the active matrix plate 20) on a glass substrate 41 entirely coated with a common electrode 42 of ITO, followed by rubbing treatment for uniaxial alignment.

[0222] On the counter plate 40, spacer beads having an average particle size of 2.2 μm were dispersed at a density of 300 (particles)/mm², and the active matrix plate 20 was superposed to prepare a blank cell.

[0223] As gap of the blank cell (between the substrates 20 and 40) was filled with a chiral smectic liquid crystal 49 having a spontaneous polarization and exhibiting a voltage-transmittance (V-T) characteristic (as shown in FIG. 3 at the time of voltage application of a rectangular waveform) in accordance with an ordinary process (vacuum injection under heating), thus preparing liquid crystal panels (devices) for active matrix drive scheme each having 320×240 pixels (corr. to the number of storage capacitances) but having capacitance values different for the respective liquid crystal panels.

[0224] In each liquid crystal panel, the chiral smectic liquid crystal showed the following phase transition series and physical (electrical) properties.

[0225] Cry: crystal phase,

[0226] SmC*: chiral smectic C phase,

[0227] SmA: smectic A phase, and

[0228] Iso: isotropic phase.

[0229] Tilt angle Ĥ (30° C.)=29.1 degrees.

[0230] Spontaneous polarization Ps (30° C.)=91.2 nc/cm².

[0231] Relative dielectric constant ∈_r=5.

[0232] The resultant liquid crystal panel provided a saturation voltage V0 of 5 volts when measured in a similar manner as in Example 1 with respect to its V-T characteristic as shown in FIG. 3.

[0233] As described above, the liquid crystal panel was prepared to provide the following parameters:

[0234] Ps=91.2 nC/cm²,

[0235] S=300 μm×100 μm×0.7 (opening rate 70%),

[0236] Vs2=5 (V),

[0237] Clc=0.465 pF (obtained from the pixel electrode area (S), the thickness of the liquid crystal layer of 2.0 μm and the relative dielectric constant of the liquid crystal (∈_r) of 5),

[0238] Cs=0.217-3.91 pF (obtained from the storage capacitance electrode area (S/20 to 0.9S), the thickness (0.3 μm) of the dielectric material layer (gate insulation film), a relative dielectric constant of the dielectric material layer of 7),

[0239] Clc+Cs=0.68-4.38 pF (varied).

[0240] The liquid crystal panels having different storage capacitances were each driven in an active matrix drive scheme with interlaced scanning by using driving waveforms shown in FIGS. 11A-11C under the following conditions:

[0241] frequency: 60 Hz,

[0242] Vs100 (a data signal (drive) voltage for providing a transmittance of 100%)=±10 (V),

[0243] Vs0 (a data signal voltage for providing a transmittance of 0%)=0 (V),

[0244] Vg (gate voltage)=+15 (V),

[0245] Ton (gate (scanning) selection period)=20 μsec.

[0246] In these conditions, the liquid crystal material used showed a response time (a time required for causing switching between point A (T=100%) and point B (T=100%) as shown in FIG. 3) of 200 μsec. Further, within the gate selection period (Ton), the liquid crystal material having the spontaneous polarization used in this example causes about a half polarity inversion thereof (i.e., M÷0.5 in the formula (12) described above).

[0247] When these liquid crystal panels were driven for displaying the whole white state, the liquid crystal panels showed a relationship between total capacitances (Clc+Cs) changed for the respective liquid crystal panels and corresponding luminances (wherein an ideal transmittance (luminance) providing the whole white state based on the tilt angle (29.1 deg.) of the liquid crystal used was taken as 1.0) in FIG. 12.

[0248] As apparent from FIG. 12, it is possible to attain an objective transmittance for the liquid crystal (i.e., a maximum transmittance based on the tilt angle Ĥ of 29.1 deg.) by setting the Cs to satisfy the relationship: (Clc+Cs)≧3.83 (since the Clc is a certain value determined based on the liquid crystal material, the pixel electrode area and the cell thickness).

[0249] In this example, when the relationship: (Clc+Cs)≧3.83 is fulfilled, the above-mentioned formula (12) (Vs2≧{ΔQ×M/(Clc+Cs)}+Vs1) is also satisfied.

[0250] Further, in this example (Example 4), the storage capacitances (Cs) were changed. In an ordinary liquid crystal display panel using TFTs, a storage capacitance may generally be constituted by an insulation film (which is formed in a common step together with a gate insulation film of SiNx (relative dielectric constant=7)) and a pair of a pixel electrode and a storage capacitance electrode sandwiching the insulation film, thus generally providing a minimum thickness of ca. 300 nm. In this case, assuming that an electrode for constituting the Cs has a maximum area when an areal ratio of the storage capacitance electrode to the pixel electrode is 0.9:1, the resultant Cs has an upper limit value of ca. 4.37 (pF). Further, in the case where the gate selection period (Ton) is sufficiently shorter than the response time of the liquid crystal, the resultant M nearly equal to 1.

[0251] Further, as driver ICs for the liquid crystal apparatus, CMOS (complementary metal-oxide semiconductor)-type driver ICs providing a maximum drive voltage of ±10 (V) are preferentially used in view of reductions in size and power consumption therefor. Accordingly, in the formula (12) in the present invention, a spontaneous polarization voltage Vs2 may preferably have a maximum of at most ±10 (V).

[0252] In addition, taking a minimum saturation voltage (V0: a voltage providing a maximum tilt angle of the liquid crystal) for a ferroelectric or anti-ferroelectric liquid crystal of ca. 2 (V) into consideration with respect to the formula (12), the liquid crystal material used is required to have a spontaneous polarization always satisfying Ps<83.4 nC/cm². Even if some fluctuation factors (e.g., a relative dielectric constant and a saturation voltage of the liquid crystal, thicknesses of structural members of TFT and Cs, and a drive voltage) is further taken into consideration, the liquid crystal material is required to have a spontaneous polarization satisfying Ps<100 nC/cm²in order to ensure a good luminance and a high contrast.

[0253] Liquid crystal panels were prepared in the same manner as in Example 4 except that a storage capacitance (Cs) was set to 4.0 pF (constant) and driven in the same manner as in Example 4 except that drive voltages the respective liquid crystal panels were changed, thus effecting a display for the whole white state.

[0254] The liquid crystal panels showed a relationship between drive voltage (Vs2) changed for the respective liquid crystal panels and corresponding luminances (wherein an ideal transmittance (luminance) providing the whole white state based on the tilt angle (29.1 deg.) of the liquid crystal used was taken as 1.0) in FIG. 13.

[0255] As apparent from FIG. 13, it is possible to attain an objective transmittance for the liquid crystal (i.e., a maximum transmittance based on the tilt angle Ĥ of 29.1 deg.) by setting the Vs2 to satisfy the relationship: Vs2≧9.8 (volts).

[0256] In this example, when the relationship: Vs2≧9.8 (volts) is fulfilled, the above-mentioned formula (12) (Vs2≧{ΔQ×M/(Clc+Cs)}+Vs1) is also satisfied.

[0257] According to this example (Example 5), in the case of using a liquid crystal material exhibiting a larger temperature-dependence of Ps, the drive voltage Vs2 is set to satisfy the above formula (12) for varying Ps at respective operation temperatures, thus ensuring a good luminance and a high contrast.

[0258] As described above, according to the liquid crystal apparatus of the present invention used in Examples 4 and 5, desired display states can be ensured by selecting and setting driving conditions, physical properties of the liquid crystal used and a panel structure so as to fulfill the above-mentioned formula (12) when the liquid crystal apparatus is driven in an active matrix drive scheme.

[0259] A liquid crystal panel having a structure as shown in FIGS. 1 and 2 was prepared.

[0260] The thus-prepared liquid crystal panel had 1024×3 (R (red), G (green) and B (blue))×768 pixels each having a size of 300 μm×100 μm (corr. to 1 bit) at a pitch of 300 μm and each having an opening rate of 70%.

[0261] In this example, a layer storage capacitance 32 was provided in order to effect good gradational display. Specifically, between a pixel electrode 15 and a storage capacitance 30, a 3000 Å-thick film of SbTiO₃as a dielectric layer material was formed by sputtering instead of an extended portion of a gate insulation film (SiNx film) as in Example 1. The dielectric layer material (SbTiO₃) had a relative dielectric constant (∈r) of 150. An areal ratio of the storage capacitance electrode 30 and the pixel electrode 15 was set to 1:5.

[0262] A blank cell was prepared in the following manner.

[0263] On a substrate 21 provided with an a-TFT 14 and the pixel electrode 15, a 1 wt. %-solution of polyamic acid (“LP-64”, mfd. by Toray K.K.) (as a polyimide precursor) in a mixture solvent of NMP (N-methylpyrrolidone)/n-BC (n-butyl cellosolve) (=2/1) was applied by spin coating for 20 sec. at 2700 rpm and dried for 5 min. at 80° C. in an oven, followed by hot curing for 1 hour at 200° C. in the oven to form a 10 nm-thick polyimide film. The polyimide film was subjected to rubbing to provide a polyimide alignment film 43a.

[0264] On the surface of the thus-treated substrate (active matrix plate 20), a 0.008 wt. %-dispersion of silica beans (spacer beads) having an average diameter of 2.2 μm in isopropyl alcohol (IPA) was spin-coated for 10 sec. at 1500 rpm so as to provide a dispersion density of ca. 300 (particles)/mm².

[0265] On another substrate 41 provided with a common electrode 42, a 10 nm-thick polyimide film (similar to that for the active matrix plate 20) was formed and subjected to rubbing to provide a polyimide alignment film 43b, thus preparing a counter plate 40.

[0266] The thus prepared active matrix plate 20 and counter plate 40 were applied to each other via the silica beads so that their rubbing axes were substantially parallel with each other and in the same direction, followed by hot curing for 90 min. at 150° C. in an oven, thus preparing a blank cell with a cell gap (corr. to a liquid crystal layer thickness) of ca. 2.0 μm.

[0267] Into the gap of the blank cell, a liquid crystal 49 (an antiferroelectric liquid crystal layer having a Ps (spontaneous polarization) of 200 nC/cm²at 30° C. as measured by the triangular wave method and an ∈r (relative dielectric constant) of 5) was injected, thus preparing a liquid crystal panel (device).

[0268] The liquid crystal 49 showed a V-T characteristic as shown in FIG. 3 wherein a transmittance changed continuously with a change in a voltage applied to the liquid crystal 49 and provided a maximum at a saturation voltage V0 of 5 (V) and there was no clear threshold voltage. Accordingly, it is possible change a transmittance continuously by controlling the voltage applied to the liquid crystal 49.

[0269] The physical and electrical properties for the above-prepared liquid crystal panel with respect to the formula (14) described hereinabove were summarized a follows:

[0270] Ps=200 nC/cm²,

[0271] S=300 μm×100 μm×0.7 (opening rate: 70%),

[0272] V0=5 volts,

[0273] Clc=0.664 pF (obtained from the pixel electrode area (S), the liquid crystal layer thickness (2.0 μm) and ∈r (=5) of the liquid crystal 49),

[0274] Cs=26.55 pF (obtained from the storage capacitance electrode area (S/5), the thickness (0.3 μm) of the dielectric material layer and ∈r (=150) of the dielectric material layer),

[0275] A=0.07.

[0276] More specifically, the value A (={(Clc+Cs)max—(Clc+Cs)min}/(Clc+Cs)ave) was determined in the following manner.

[0277] Clc (liquid crystal capacitance) may be determined by the pixel electrode area, the liquid crystal layer thickness and the relative dielectric constant (∈r) of the liquid crystal. Among these factors, fluctuations in the pixel electrode area and ∈r are generally very small, thus being negligible factors. Accordingly, a fluctuation in Clc within the liquid crystal panel is principally attributable to a distribution of the liquid crystal layer thickness.

[0278] When the thickness of the liquid crystal layer was measured by utilizing birefringence of the liquid crystal at 25 (meaning) points (A1 to E5: equally spaced 5×5 points in the liquid crystal panel), a maximum-thickness of 2.10 μm, a minimum thickness of 1.90 μm and an average thickness of 2.00 μm were obtained. Based on these thicknesses, a maximum Clc (Clc-max) of 0.699 pF, a minimum Clc (Clc-min) of 0.632 pF and an average Clc (Clc-ave) of 0.664 pF were determined.

[0279] Similarly, a fluctuation in Cs (storage capacitance) within the liquid crystal panel is principally attributable to a distribution of the layer thickness of the dielectric material.

[0280] When the thickness of the dielectric material layer was measured in a similar manner (as in the liquid crystal layer), three values including a maximum thickness of 0.32 μm, a minimum thickness of 0.28 μm and an average thickness of 0.30 μm were obtained. Based on these values, a maximum Cs (Cs-max) of 27.45 pF, a minimum Cs (Cs-min) of 25.65 pF and an average Cs (Cs-ave) of 26.55 pF were determined.

[0281] Based on the above values of Clc and Cs (at 25 points), values of the sum of Clc and Cs (Clc+Cs) were summarized in Table 2.

[0282] Based on the values (Clc+Cs) shown in Table 2, A={(Clc+Cs)max—(Clc+Cs)min}/(Clc+Cs)ave=0.07 was obtained.

[0283] When the above-mentioned parameter values for the formula (14), i.e.,

[0284] 1/(n−1)>A(2Ps×S)/V0(Clc+Cs)ave

[0285] were applied to the formula (14), the right side provided a value of 0.0432, which satisfied the formula (14) where n=16 ({fraction (1/15)}>0.0432), thus allowing a gradational display with 16 gradational levels.

[0286] The above-prepared liquid crystal panel wa driven in an active matrix drive scheme with interlaced scanning under the following conditions:

[0287] Frequency=60 Hz,

[0288] Vs (providing T (transmittance)=100%): ±5 (V),

[0289] Vs (providing T=0%): 0 (V),

[0290] Vg (gate voltage): +15 (V), and

[0291] Ton (gate selection period): 20 μsec (which was sufficiently shorter than a response time (200 μsec) of the liquid crystal required for switching between point A (T=100%) and point B (T=100%) as shown in FIG. 3).

[0292] As a result, good optical states (16 gradational levels for each pixel) corresponding to data signal voltages for 16 bit were displayed.

[0293] In this example (Example 6), although the liquid crystal material having a Ps of 200 nC/cm²was used, the similar results can be attained by using a liquid crystal material having a Ps of at most 200 nC/cm²since the condition (14) is satisfied.

[0294] A liquid crystal panel was prepared and driven in the same manner as in Example 6 except that the liquid crystal material was changed to an antiferroelectric liquid crystal (Ps=50 nC/cm², ∈r=5, V0=5 volts) and the dielectric material layer was changed to a tantalum oxide (TaOx) film (thickness=2000 Å, ∈r=25).

[0295] The physical and electrical properties for the above-prepared liquid crystal panel with respect to the formula (14) described hereinabove were summarized a follows:

[0296] Ps=50 nC/cm²,

[0297] S=300 μm×100 μm×0.7 (opening rate: 70%),

[0298] V0=5 volts,

[0299] Clc=0.664 pF (obtained from the pixel electrode area (S), the liquid crystal layer thickness (2.0 μm) and ∈r (=5) of the liquid crystal 49),

[0300] Cs=6.64 pF (obtained from the storage capacitance electrode area (S/5), the thickness (0.2 μm) of the dielectric material layer and ∈r (=25) of the dielectric material layer),

[0301] A=0.07 (determined similarly as in Example 6).

[0302] When the above-mentioned parameter values for the formula (14), i.e.,

[0303] 1/(n−1)>A(2Ps×S)/V0(Clc+Cs)ave

[0304] were applied to the formula (14), the right side provided a value of 0.0403, which satisfied the formula (14) where n=16 ({fraction (1/15)}>0.0403), thus allowing a gradational display with 16 gradational levels.

[0305] As a result of the driving of the liquid crystal panel, good optical states (16 gradational levels for each pixel) corresponding to data signal voltages for 16 bit were displayed.

[0306] In this example (Example 7), although the liquid crystal material having a Ps of 50 nC/cm²was used, the similar results can be attained by using a liquid crystal material having a Ps of at most 50 nC/cm²since the condition (14) is satisfied.

[0307] A liquid crystal panel was prepared and driven in the same manner as in Example 6 except that the liquid crystal material was changed to an antiferroelectric liquid crystal (Ps 20 nC/cm², ∈r=5, V0=5 volts), the dielectric material layer was changed to a silicon nitride (SiNx) film (thickness=3000 Å, ∈r=7) and the areal ratio (1:5) of the storage capacitance electrode and the pixel electrode was changed to 2:5.

[0308] The physical and electrical properties for the above-prepared liquid crystal panel with respect to the formula (14) described hereinabove were summarized a follows:

[0309] Ps=20 nC/cm²,

[0310] S=300 μm×100 μm×0.7 (opening rate: 70%),

[0311] V0=5 volts,

[0312] Clc=0.664 pF (obtained from the pixel electrode area (S), the liquid crystal layer thickness (2.0 μm) and ∈r (=5) of the liquid crystal 49),

[0313] Cs=2.48 pF (obtained from the storage capacitance electrode area (2S/5), the thickness (0.3 μm) of the dielectric material layer and ∈r (=7) of the dielectric material layer),

[0314] A=0.07 (determined similarly as in Example 6).

[0315] When the above-mentioned parameter values for the formula (14), i.e.,

[0316] 1/(n−1)>A(2Ps×S)/V0(Clc+Cs)ave

[0317] were applied to the formula (14), the right side provided a value of 0.0374, which satisfied the formula (14) where n=16 ({fraction (1/15)}>0.0374), thus allowing a gradational display with 16 gradational levels.

[0318] As a result, good optical states (16 gradational levels for each pixel) corresponding to data signal voltages for 16 bit were displayed.

[0319] In this example (Example 8), although the liquid crystal material having a Ps of 20 nC/cm²was used, the similar results can be attained by using a liquid crystal material having a Ps of at most 20 nC/cm²since the condition (14) is satisfied.

[0320] In Examples 6-8, the gradational display for 16 bit was performed. However, as apparent from the formula (14), it is possible to effect a desired gradational display by appropriately selecting and setting the liquid crystal material used and the panel structure so as to satisfy the formula (14) when the liquid crystal panel using the liquid crystal material having a spontaneous polarization was subjected to a high-speed active matrix drive using TFTs.