Feedforward clamping applied to the control voltage in switch mode power supplies (SMPS)

[0002] Robert Mammano, Applying the UCC3570 voltage-mode PWM controller to both off-line and DC/DC converter designs, Application Note U-150, Unitrode Applications Handbook 1997 VIPer100/SP, VIPer100A/ASP Application Note—Current Limitation Circuit example (Page 15/20), ST Microelectronics

[0003] A DC—DC converter developed under any topology, with or without isolation between input and output, is using a control signal to adjust the duty-cycle and regulate the output against input or load variations. The control section may comprise different configurations: direct duty-cycle voltage-mode control, feed-forward voltage-mode control, peak current-mode control or average current-mode control. By combining these multitude of topologies (buck, boost, flyback, etc) with different control options, a big variety of DC—DC conversion solutions can be achieved, to suit particular applications requirements (size, output power, power dissipation, output noise, input or output voltages). However, all existing topologies have a common problem, when dealing with transient events, like start-up, sudden variation of input voltage or load. During this relatively short period of time, the feedback control loop behavior is critical and will translate on how fast and accurate the power supply is adapting to the new conditions. There are physical limitations to an ideal and instant response from the feedback control circuit. Energy levels previously stored in the output inductors and capacitors, in the control loop compensation capacitors are impossibly to change as fast as the external conditions may vary. Consequently, there is a momentary discrepancy between the actual and needed control value, usually triggering dumped oscillations, resulting in unwanted control overshoots. This momentary open loop condition is wrongly generating an abnormal high ON time, with additional stress at the level of the power switches and magnetic components. FIG. 1 shows how different control configurations typically handle a transient event. The solution to this problem is to oversize the power switch, to handle the increased peak current and to oversize the magnetic components (number of turns and/or magnetic cross-section area) to prevent saturation because of higher flux density. This may not be acceptable in some designs, where the size is an issue. A method to overcome this problem is illustrated in FIG. 2. It consists in limiting the duty-cycle to a maximum by clamping the control signal to a fixed level. The disadvantage of this technique is that for wide input voltage variation is corresponding a high variation of the duty cycle, according to the following transfer functions:

[0004] V_o=V_inD(RT/2L)^½—For flyback topology (in discontinuous inductor current)

[0005] V_o=V_inD/(1−D)—For flyback topology (in continuous inductor current)

[0006] V_o=V_inDT_OFFR/2L—For buck topology (in discontinuous inductor current)

[0007] V_o=V_inD—For buck topology (in continuous inductor current)

[0008] V_o=V_inRDT_OFF/2L—For boost topology (in discontinuous inductor current)

[0009] V_o=V_in/(1−D)—For boost topology (in continuous inductor current)

[0010] where:

[0011] V_o=output voltage

[0012] V_in=input voltage

[0013] D=T_ON/T (duty cycle)

[0014] R=load resistance

[0015] T=switching period of time

[0016] T_ON=period of time when the switch is ON

[0017] T_OFF=period of time when the switch is OFF

[0018] L=inductance value of the inductor

[0019] Generally emerging from the above transfer functions, for low input voltage corresponds high duty-cycle D (and control voltage) and vice-versa, if output voltage and current are constant. If fixed clamp is applied to control voltage (which determines duty-cycle D), for its maximum level (corresponding to low input voltage and full output power), this may not protect the magnetic cores from saturation if high input voltage and momentary overshoot of control voltage. Although this technique is limiting the overshoot of the feedback loop response, further improvements will be introduced by the invention presented below, conducting to further switches and magnetic components size optimization.

[0020] This invention offers reliable protection against over-current in the main switches and/or saturation of the magnetic components (power transformer and/or inductors) in a DC—DC converter built under any topology, by using a feed-forward clamping circuit to limit the feedback control signal over a wide range of input voltage. The result is an increase of reliability and enables optimization of the main switches and magnetic components (power transformer and/or main inductor) in the way that minimizes their overall size. The protection is active only during transient events, when momentary open loop condition may occur.

[0021] FIG. 1.A is showing the feedback control overshoot during a step load increase and resulting waveforms if direct duty-cycle voltage-mode control is used in a typical buck regulator.

[0022] FIG. 1.B is showing the feedback control overshoot during a step load increase and resulting waveforms if average current-mode control is used in a typical buck regulator.

[0023] FIG. 1.C is showing the feedback control overshoot during a step load increase and resulting waveforms if peak current-mode control is used in a typical buck regulator.

[0024] FIG. 2 is a schematic circuit diagram of a buck DC—DC converter having a fixed clamping circuit of the feedback control (prior art).

[0025] FIG. 3 is a functional block diagram of the invention.

[0026] FIG. 4 is a schematic circuit diagram of the first preferred embodiment of the present invention.

[0027] FIG. 5 is a schematic circuit diagram of a second preferred embodiment of the present invention.

[0028] FIG. 6 is exemplifying where the first or second preferred embodiment will insert in the schematic of a typical non-isolated buck converter using direct duty-cycle voltage-mode control.

[0029] FIG. 7 is exemplifying where the first or second preferred embodiment will insert in the schematic of a typical non-isolated buck converter using peak current-mode control

[0030] FIG. 8 is exemplifying where the first or second preferred embodiment will insert in the schematic of a typical non-isolated buck converter using average current-mode control.

[0031] FIG. 9 is a schematic circuit diagram of the third preferred embodiment of the present invention.

[0032] FIG. 10 is a schematic circuit diagram of the fourth preferred embodiment of the present invention.

[0033] FIG. 11 is exemplifying where the third or fourth preferred embodiment will insert in the schematic of a typical isolated forward converter using direct duty-cycle voltage-mode control.

[0034] FIG. 12 is exemplifying where the third or fourth preferred embodiment will insert in the schematic of a typical isolated forward converter using peak current-mode control.

[0035] FIG. 13 is exemplifying where the third or fourth preferred embodiment will insert in the schematic of a typical isolated forward converter using average current-mode control.

[0036] As discussed when previously analyzed the prior art, momentary feedback open loop condition triggered by transient events may saturate the magnetic components and may destroy the main switches. To prevent this to happen, the magnetic components and/or the switches should be over-sized and/or the feedback should be designed to act faster and/or the output filter magnetics and capacitors should have smaller values in order to store less energy and to faster respond to the system changes. Any of these approaches have their drawbacks; the present document will not elaborate on these issues.

[0037] The present invention offers a better option, which is an adaptive feed-forward clamping circuit to limit the feedback control overshoot to an optimized level, function of the input voltage, protecting the circuit during transient conditions and not interfering with the system stability. This approach addresses the problem directly, limiting the main switches ON time in accordance with the specific input voltage level.

[0038] For a transformer, magnetic core saturation will occur if V_inand T_ONare generating a flux density level B in the core bigger than B_s, according to formula (1):

[0039] B=V_inT_ON/N_pA_e  (1)

[0040] where:

[0041] B_s=saturation flux density.

[0042] N_p=number of turns of primary of the transformer.

[0043] V_in=voltage across primary of the transformer.

[0044] A_e=cross-section area of the core.

[0045] For an inductor, the flux density level B is given by the formula (2):

[0046] B=I_pkL/NA_e  (2)

[0047] where:

[0048] I_pk=peak current developed in the inductor at the end of the ON time period

[0049] L=inductance value of the inductor

[0050] N=number of turns of the inductor

[0051] A_e=cross-section area of the magnetic core

[0052] As transpiring from above formulas, the magnetic flux density level is in direct proportionality with the ON time and input voltage level. In order to prevent saturation, the combination of the two elements must be kept under control.

[0053] FIG. 3 is a generalized, functional, block diagram of the adaptive feed-forward clamping circuit. The first block diagram addresses the non-isolated topologies and will be detailed in the first preferred embodiment (FIG. 4) and second preferred embodiment (FIG. 5). The second block diagram addresses the isolated topologies and will be detailed in the third preferred embodiment (FIG. 9) and fourth preferred embodiment (FIG. 10).

[0054] FIG. 4 is the schematic circuit diagram of the first preferred embodiment. It uses an operational amplifier to generate V_clampfrom V_infed to its inverting input.

[0055] Further with reference to FIG. 4, the transfer function of this circuit is:

[0056] V_clamp=V_off(R₁+R₂)/R₂−k₁V_inR₁/R₂, V_clamp>V_control  (3)

[0057] where:

[0058] k₁=R₄/(R_3+R4)

[0059] In its general form, by replacing V_off(R₁+R₂)/R₂with V_OFFSETand k₁R₁/R₂with k, the transfer function is:

[0060] V_clamp=V_OFFSET−kV_in, V_clamp>V_controlfor any working conditions.  (4)

[0061] where:

[0062] V_clamp=clamping voltage level

[0063] V_control=feedback control voltage level

[0064] k=constant parameter, depending with the particular SMPS solution adopted (topology, input voltage range, power requirements, control type)

[0065] V_in=input voltage

[0066] V_OFFSET=offset voltage, chosen upon the same criteria as the constant k

[0067] As stated in formula (3) and (4), to ensure the clamping effect does not interfere with the control voltage in the steady-state regime, V_clampmust always be bigger than V_control.

[0068] As observed from formula (4), V_clampdecreases with V_in, consequently the maximum ON time and duty-cycle D that can occur during a transient event decreases with V_in. This is consistent with the invention's idea, to limit the product volt-second in order to do not saturate the core of the magnetic components.

[0069] FIG. 5 is the schematic circuit diagram of the second preferred embodiment. It uses an Analog Computational Unit to compute the clamping voltage from the input voltage level. Further with reference to FIG. 5, the transfer function of this circuit is:

[0070] V=k₃V⁺+k₂V⁺/(k₁V_in), V_clamp>V_control  (5)

[0071] where:

[0072] k₁=R₂/(R₁+R₂), k₂=R₄/(R₃+R₄)

[0073] and

[0074] k₃=R₆/(R₅+R₆)

[0075] In its general form, by replacing k₃V⁺ with V_OFFSETand k₂V⁺/k₁with k, the transfer function is:

[0076] V_clamp=V_OFFSET+k/V_in, V_clamp>V_controlfor any working conditions.  (6)

[0077] As resulting from formula (5) and (6), V_clampis reverse proportional with V_in, consequently achieving the same goal as the first preferred embodiment.

[0078] FIG. 6 shows a typical non-isolated buck converter schematic, having direct duty-cycle voltage mode control, using the feed-forward clamping circuit described as “first preferred embodiment” or circuit described as “second preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.

[0079] FIG. 7 shows a typical non-isolated buck converter schematic, having peak current mode control, using the feed-forward clamping circuit described as “first preferred embodiment” or circuit described as “second preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.

[0080] FIG. 8 shows a typical non-isolated buck converter schematic, having average current mode control, using the feed-forward clamping circuit described as “first preferred embodiment” or circuit described as “second preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.

[0081] FIG. 9 is a schematic circuit diagram of the third preferred embodiment of the present invention. It is similar with the first preferred embodiment, with the difference that uses an additional linear isolation amplifier with a gain k₂, to insure isolation between input and output.

[0082] Further with reference to FIG. 9, the transfer function of this circuit becomes:

[0083] V_clamp=k₂V_off(R₁+R₂)/R₂−k₁k₂V_inR₁/R₂, V_clamp>V_control  (7)

[0084] where:

[0085] k₁=R₄/(R₃+R₄)

[0086] k₂=linear isolation amplifier gain

[0087] In its general form, by replacing k₂V_off(R₁+R₂)/R₂with V_OFFSETand k₁k₂R₁/R₂with k, the transfer function is:

[0088] V_clamp=V_OFFSET−kV_in, V_clamp>V_controlfor any working conditions.  (8)

[0089] where:

[0090] V_clamp=clamping voltage level

[0091] V_control=feedback control voltage level

[0092] k=constant parameter, depending with the particular SMPS solution adopted (topology, input voltage range, power requirements, control type)

[0093] V_in=input voltage

[0094] V_OFFSET=offset voltage, chosen upon the same criteria as the constant k

[0095] FIG. 10 is a schematic circuit diagram of the fourth preferred embodiment of the present invention. It is similar with the second preferred embodiment, with the difference that uses an additional linear isolation amplifier with a gain k₄, to insure isolation between input and output.

[0096] Further with reference to FIG. 10, the transfer function of this circuit becomes:

[0097] V=k₃k₄V₁+k₂k₄V₁/(k₁V_in), V_clamp>V_control  (9)

[0098] where:

[0099] k₁=R₂/(R₁+R₂), k₂=R₄/(R₃+R₄)

[0100] and

[0101] k₃=R₆/(R₅+R₆)

[0102] k₄=linear isolation amplifier gain

[0103] In its general form, by replacing k₃k₄V₁with V_OFFSETand k₂k₄V₁/k₁with k, the transfer function is:

[0104] V_clamp=V_OFFSET+k/V_in, V_clamp>V_controlfor any working conditions.  (10)

[0105] FIG. 11 shows a typical isolated forward converter schematic, having direct duty-cycle voltage mode control, using the feed-forward clamping circuit described as “third preferred embodiment” or circuit described as “fourth preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.

[0106] FIG. 12 shows a typical isolated forward converter schematic, having peak current mode control, using the feed-forward clamping circuit described as “third preferred embodiment” or circuit described as “fourth preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.

[0107] FIG. 13 shows a typical isolated forward converter schematic, having average current mode control, using the feed-forward clamping circuit described as “third preferred embodiment” or circuit described as “fourth preferred embodiment” with the purpose described in the present invention to clamp the feedback control voltage by means of diode D_clampand consequently limiting the volt-second product applied to the magnetic components over a wide range of input voltages.