Pulsed RF power delivery for plasma processing

[0002] The present invention relates to semiconductor manufacturing equipment. More particularly, the present invention relates to a system and method for delivering pulsed radio frequency (RF) power to a plasma processing chamber. A plasma processing chamber may be used for dry etching, or plasma-assisted deposition, or other processes.

[0003] One embodiment of the present invention relates to a system and method for delivering pulsed RF power to a dry etching chamber. Dry etching basically involves exposing a semiconductor wafer to an electrical discharge and a reactive gas at the same time. Dry etching includes plasma etching, reactive ion etching, and reactive sputtering.

[0004] In conventional dry etching, continuous wave (CW) RF power is delivered to the plasma chamber. One problem with using CW RF power for plasma processing is that charge-up damage may occur.

[0005] Delivering pulsed power prevents charge from building up and so mitigates charge-up damage effects. Prior art systems for delivering pulsed power include the ones described in U.S. Pat. No. 4,863,549 (Grunwald), U.S. Pat. No. 4,891,118 (Ooiwa et al.), U.S. Pat. No. 5,087,857 (Ahn), and U.S. Pat. No. 5,362,358 (Yamagata et al.). However, the prior art pulsed power systems suffer from various defects and disadvantages.

[0006] First, the prior art systems do not address the complex impedance mismatch problem which exists due to the pulsing of the power. Minimizing the amount of power that is reflected back towards the power generator from the processing chamber becomes more difficult for pulsed power. If the reflected power is too high, the generator may be detrimentally driven into foldback.

[0007] Second, the prior art systems do not address the complexities and difficulties in accurately measuring power delivered by the pulsed signal. Measuring the amount of energy delivered is needed so that manufacturing processes may be repeated in a highly predictable way.

[0008] The delivery process for pulsed RF power is more complex than the delivery process for CW RF power. In the CW case, the load impedance of the plasma chamber evolves in stages including an initial ignition stage when the plasma is ignited, a transient stage as the plasma approaches some steady-state condition, and a steady-state stage at which the plasma maintains the steady-state condition. Conventional CW RF power delivery systems have been designed to drive power into the steady-state plasma at a high level of stability, while merely tolerating the ignition and transient stages. These conventional systems operate on control algorithms with iteration times varying from 100 microseconds to a few milliseconds. Such time scales largely define the limits of temporal variation in load impedances that the conventional systems may compensate so as to deliver a highly stable level of power.

[0009] In the stable steady-state condition, the CW power transfer into the chamber is defined by only one impedance value and two voltage levels, where the impedance value corresponds to the impedance of the transmission line connecting the generator and chamber, and the two voltages corresponds to the amplitude of the forward and reflected voltage waves traveling on the transmission line. Reflected power is minimized by fixing degrees of freedom in the local matching circuit such that the transmission line impedance is matched during the steady-state condition, and the power transfer may be characterized with only the steady state impedance and two voltage amplitude measurements (forward and reflected amplitudes).

[0010] In contrast, in the pulsed case, the load impedance of the plasma chamber has no steady-state behavior. This lack of steady-state behavior significantly increases the complexity of the situation. The load impedance is repeatedly cycling from a value near ignition to a terminal value which can be held for as short a time as a few microseconds. Hence, the power delivery system must deal with transient conditions, instead of steady-state conditions. Conventional CW power delivery systems are not equipped to deal with such transient conditions.

[0011] In particular, the load impedance varies in time, so more is needed than fixing the local match's degrees of freedom in the local matching circuit. In order to deal with the cycling of the local impedance, determinations must be made on which degrees of freedom are available to be varied, how to control the degrees of freedom to accomplish such variation, and how to vary the degrees of freedom to minimize reflected power. In addition, the voltage amplitudes of the forward and reflected power waves vary in time, so simple measurements of voltage amplitudes do not yield an accurate measure of the power transmitted.

[0012] The present invention provides a system and method for overcoming the above-described problems relating to the delivery of pulsed RF power to a plasma processing chamber. The power reflected from the chamber is reduced using one or more of the following techniques: (1) varying the RF frequency within a pulse period; (2) ramping up the pulse heights at the leading edge of the pulse train; (3) simultaneously transmitting a relatively low CW signal along with the pulsed signal; and (4) rapidly switching the shunt capacitance within a local matching network within a pulse period. The amount of power delivered to the plasma by the pulses is measured by way of a time-averaging mechanism coupled to a directional coupler connected to the transmission line. The time-averaging mechanism may comprise circuitry to measure temperatures of loads attached to the directional coupler, or analog integrating circuitry attached to the directional coupler, or digital integrating circuitry attached to the directional coupler.

[0013] In accordance with a first aspect of the present invention, a method for delivering RF power to a plasma comprises: generating a RF oscillation having a frequency and an amplitude; modulating the frequency of the RF oscillation; modulating the amplitude of the RF oscillation; amplifying the RF oscillation; and transmitting the RF oscillation to the plasma. In one embodiment of this aspect, a method for delivering pulsed RF power to a plasma comprises: generating a pulse train comprising a series of pulses, each pulse being characterized by a pulse period; generating a frequency-varied RF oscillation which varies in frequency within the pulse period; modulating the frequency-varied RF oscillation with the pulse train to generate a frequency-varied pulsed RF signal; and transmitting the frequency-varied pulsed RF signal to the plasma.

[0014] In accordance with a second aspect of the present invention, a method for delivering pulsed radio frequency (RF) power to a plasma comprises: generating a RF oscillation; generating a pulse train comprising a series of pulses, each pulse being characterized by a pulse height; varying the pulse height from pulse to pulse in the pulse train to form a pulse train having varied pulse heights; modulating the RF oscillation with the pulse train having varied pulse heights to form a pulsed RF signal having varied pulse heights; and transmitting the pulsed RF signal having varied pulse heights to the plasma.

[0015] In accordance with a third aspect of the present invention, a method for delivering pulsed radio frequency (RF) power to a plasma comprises: generating a first continuous wave RF signal and a second continuous wave RF signal; generating a pulse train comprising a series of pulses; modulating the first continuous wave RF signal with the pulse train to form a pulsed RF signal; and transmitting simultaneously both the pulsed RF signal and the second continuous wave RF signal to the plasma.

[0016] In accordance with a fourth aspect of the present invention, a method for delivering pulsed RF power to a plasma comprises: transmitting a pulsed RF signal by way of an impedance matching network to the plasma, the pulsed RF signal including a series of pulses, each pulse being characterized by a pulse period; sensing a magnitude error signal related to a magnitude of a reflected signal coming back from the plasma; and utilizing the magnitude error signal for control over a variable shunt capacitor in the impedance matching network, where capacitance of the variable shunt capacitor is varied within the pulse period.

[0017] Finally, in accordance with a fifth aspect of the present invention, a system for delivering pulsed radio frequency (RF) power to a plasma and for measuring power absorbed by the plasma comprises: a pulsed RF power generator configured to generate forward RF pulses; a RF cable having a first end coupled to the pulsed RF power generator, the RF cable being adapted to carry the forward RF pulses; a reaction chamber coupled to a second end of the RF cable, the reaction chamber being adapted to contain the plasma and to couple the forward RF pulses to the plasma; a directional coupler coupled to the RF cable, the directional coupler being adapted to generate a first attenuated signal proportional to the forward RF pulses and a second attenuated signal proportional to the backward RF pulses; and a time-averaging mechanism coupled to the directional coupler and adapted to time-average the first attenuated signals to generate a first time-averaged signal and to time-average the second attenuated signal to generate a second time-averaged signal, where the power absorbed by the plasma is proportional to the difference between the first and second time averaged signals.

[0018] FIG. 1 is a schematic diagram of a pulsed RF power delivery system 100 in accordance with an embodiment of the present invention.

[0019] FIG. 2 is a schematic diagram of a pulsed RF power generator 102 in accordance with an embodiment of the present invention.

[0020] FIG. 3A is a circuit diagram of a first embodiment for the VCO 124 in accordance with the present invention.

[0021] FIG. 3B is a circuit diagram of a second embodiment for the VCO 124 in accordance with the present invention.

[0022] FIG. 4 is a schematic diagram of a time-averaging power meter 210 in accordance with an embodiment of the present invention.

[0023] FIG. 5A is a schematic diagram of a temperature-based time averager 404A in accordance with an embodiment of the present invention.

[0024] FIG. 5B is a schematic diagram of an analog time averager 404B in accordance with an embodiment of the present invention.

[0025] FIG. 5C is a schematic diagram of a digital time averager 404C in accordance with an embodiment of the present invention.

[0026] FIG. 6 is a schematic diagram of a local matching network 122 in accordance with an embodiment of the present invention.

[0027] FIG. 7 is a schematic diagram of a linear switch capacitor bank 606 in accordance with an embodiment of the present invention.

[0028] FIG. 8 is a graph showing, according to theoretical calculations, frequency variation within a pulse cycle needed to minimize reflected power.

[0029] FIG. 9 is a graph showing, according to theoretical calculations, a decrease in reflected power during a pulse cycle when frequency is varied in accordance with the graph in FIG. 12 rather than being fixed.

[0030] FIG. 10 is a graph of experimental results showing, for a pure Cl₂discharge, a decrease in reflected power during a pulse cycle when frequency is varied by closed loop control rather than being fixed.

[0031] FIG. 11 is a graph of experimental results showing, for a pure Cl₂discharge, a decrease in reflected power during a pulse cycle when frequency is swept linearly rather than being fixed.

[0032] FIG. 12 is a graph of experimental results showing, for a pure HBr discharge, a decrease in reflected power during a pulse cycle when frequency is swept linearly rather than being fixed.

[0033] FIG. 13 is a graph showing a forward waveform having ramped power at a leading end of a pulsed waveform in accordance with an embodiment of the present invention.

[0034] FIG. 14 is a graph of experimental results showing decreasing reflected power as ramp rise time increases.

[0035] FIG. 15 is a graph showing a forward waveform comprising a low-level of continuous waveform in addition to a pulsed waveform in accordance with an embodiment of the present invention.

[0036] FIG. 16 is a graph of experimental results showing decreasing reflected power as a ratio of continuous waveform power to pulse peak power increases.

[0037] FIG. 17 is a table showing PIN diode switch states for binary coded and linear capacitance banks.

[0038] FIG. 18 is a graph showing change in shunt capacitance during linear bank switching and during two scenarios of binary coded bank switching.

[0039] FIG. 19 is a graph showing a scheme for gating of the RF power during bank switching in accordance with an embodiment of the present invention.

[0040] FIG. 1 is a schematic diagram of a pulsed RF power delivery system 100 in accordance with an embodiment of the present invention. The pulsed RF power delivery system 100 includes pulsed RF power generator 102, high power coaxial cable 104, a match circuit 106, a load 108, and a small signal coaxial cable 110.

[0041] The pulsed RF power generator 102 generates forward RF pulses to the high power coaxial cable 104. The pulsed RF power generator 102 is described in further detail below in relation to FIG. 2. The high power coaxial cable 104 comprises a transmission line that connects the pulsed RF power generator 102 to the matching circuit 106 which, in turn, connects to the load 108. In a preferred embodiment, the load 108 comprises a plasma reaction chamber. The match circuit 106 also connects to one end of a small signal coaxial cable 110. The other end of the small signal coaxial cable 110 connects back to the RF power generator 102.

[0042] The match circuit 106 is further detailed in FIG. 1 and comprises a phase/magnitude error sensor 112, two low-pass filters 114 and 116, two servo controllers 118 and 120, a matching network 122, and a voltage-controlled oscillator (VCO) 124.

[0043] The phase/magnitude error sensor 112 produces phase and magnitude error signals. A first low-pass filter 114 receives and filters the magnitude error signal, and a second low-pass filter 116 receives and filters the phase error signal. The first and second low-pass filters 114 and 116 preferably have time constants in the range of 1-10 milliseconds. The first low-pass filter 114 outputs the filtered magnitude error signal to a first servo controller 118, and the second low-pass filter 116 outputs the filtered phase error signal to a second servo controller 120. The first servo controller 118 uses the filtered magnitude error signal to generate and output a shunt capacitance control signal to the matching network 122. The second servo controller 120 uses the filtered phase error signal to generate and output a series capacitance control signal to the matching network 122. The matching network 122 controlled by the servo controllers 118 and 120 is a mechanical matching network 122. Alternatively, a solidstate matching network 122 may be used.

[0044] In addition, the phase/magnitude error sensor 112 outputs the phase error signal to the VCO 124. In one embodiment of the present invention, the phase error signal output to the VCO 124 comprises a fast phase error signal which is generated by a separate fast phase error detector. The fast phase error signal may be either unfiltered or filtered by a filter with a time constant on the order of 1 microsecond or less.

[0045] As described above in the background section, one problem with using pulsed RF power relates to the difficulties in minimizing the amount of power that is reflected back towards the RF generator 102. In accordance with the present invention, one way to reduce the reflected power involves not using a fixed RF frequency. Instead, the present invention contemplates varying the RF frequency within each pulse to reduce reflected power.

[0046] FIG. 8 is a graph showing, according to theoretical calculations, frequency variation within a pulse cycle needed to minimize reflected power in accordance with the present invention. As shown in FIG. 8, the frequency to achieve minimum reflected power f_min(t) varies from less than 12.0 MHz at the start of a single 30 pulse to more than 12.5 MHz nearer to the pulse peak.

[0047] FIG. 9 is a graph showing, according to theoretical calculations, a decrease in reflected power during a pulse cycle when frequency is varied in accordance with the graph in FIG. 8, rather than being fixed. The reflected power during a pulse cycle when frequency is fixed is given by the R_fixedcurve. In comparison, the reflected power during a pulse cycle when frequency is varied in accordance with the graph in FIG. 8 is given by the R_varcurve. The difference between the two curves is the theoretical decrease in reflected power when frequency is varied in accordance with the graph in FIG. 8 rather than being fixed.

[0048] As described below, either closed-loop or open-loop frequency control may be used to vary frequency during a pulse cycle such that reflected power is reduced.

[0049] The pulsed RF power delivery system 100 as shown in FIG. 1 is configured for closed-loop frequency control. The closed-loop frequency control may be used to vary frequency during a pulse so as to reduce reflected power.

[0050] Experimental measurements demonstrating reduction in reflected power using closed-loop frequency control are described in relation to FIG. 10. FIG. 10 is a graph of experimental results showing, for a pure Cl₂discharge, a decrease in reflected power when frequency is varied during a pulse cycle by closed loop control rather than being fixed. The conditions associated with the experimental results in FIG. 10 are as follows: 100% Cl₂; T (pulse)=80 μs; on-time=35 μs; off-time=45 μs; and (time averaged) power ˜400 w. For the closed loop control, a phase error signal with a time constant of approximately 1 microsecond is used to bias the VCO 124.

[0051] In FIG. 10, the percentage reflected power for various Cl₂gas pressures using fixed 12.56 MHz frequency pulses is shown by the upper data points, and the percentage reflected power for various Cl₂gas pressures using closed-loop frequency control is shown by the lower data points. For all Cl₂gas pressures shown, the percentage reflected power is always lower when using closed-loop frequency control rather than a fixed frequency.

[0052] In an alternate embodiment of the present invention, the pulsed RF delivery system 100 shown in FIG. 1 may be modified to use open-loop frequency control. In such a modified system, the VCO 124 does not receive a phase error signal. Instead, the VCO 124 is controlled by a separate frequency controller. For example, the frequency controller may be used for frequency sweeping within each pulse to reduce reflected power. Experimental measurements demonstrating the reduction in reflected power using frequency sweeping within each pulse are described below in relation to FIGS. 12 and 13.

[0053] FIG. 11 is a graph of experimental results showing, for a pure Cl₂discharge, a decrease in percentage reflected power when frequency is swept linearly during a pulse cycle rather than being fixed. The conditions associated with the experimental results in FIG. 11 are as follows: 100% Cl₂; T (pulse)=80 μs; on-time=35 μs; rise-time=10 μs; off-time=45 μs; and (time averaged) power ˜600 w. The pulse period of 80 microseconds comprises a 10 microsecond ramp, followed by a 25 microsecond constant power, followed by a 45 microsecond off-time. The frequency sweeping within a pulse may be achieved using the open-loop frequency control of the VCO 124.

[0054] In FIG. 11, the percentage reflected power for various Cl₂gas pressures using fixed 12.56 MHz frequency pulses is shown by the upper data points, and the percentage reflected power for various Cl₂gas pressures using pulses having a frequency swept from 12.0 MHz to 12.95 MHz is shown by the lower data points. For all Cl₂gas pressures shown, the percentage reflected power is always lower when using pulses having swept frequencies rather than pulses having a fixed frequency.

[0055] FIG. 12 is a graph of experimental results showing, for a pure HBr discharge, a decrease in reflected power when frequency is swept linearly during a pulse cycle rather than being fixed. The frequency sweeping within a pulse may be achieved using the open-loop frequency control of the VCO 124.

[0056] In FIG. 12, the percentage reflected power for various HBr gas pressures using fixed 12.56 MHz frequency pulses is shown by the upper data points, and the percentage reflected power for various HBr gas pressures using pulses having a frequency swept from 12.0 MHz to 12.95 MHz is shown by the lower data points. For all HBr gas pressures shown, the percentage reflected power is always lower when using pulses having swept frequencies rather than pulses having a fixed frequency.

[0057] The results in FIGS. 12 and 13 are generated using a pulse cycle of 80 microseconds comprises a 10 microsecond ramp, followed by a 25 microsecond constant power, followed by a 45 microsecond off time. The on-time is 35 microseconds. The time-averaged power is approximately 600 W.

[0058] FIG. 2 is a schematic diagram of a pulsed RF power generator 102 in accordance with an embodiment of the present invention. The pulsed RF power generator 102 includes a pulse train generator 202, a pulse train adjuster 204, an amplitude modulator 206, a power amplifier 208, a time-averaged power meter 210, and a power level controller 212.

[0059] The pulse train generator 202 generates a train of pulses and outputs the train of pulses to a pulse train adjuster circuit 204. In one embodiment, pulse trains with variable duty cycles and variable other pulse parameters may be generated by the pulse train generator 202. The pulse train adjuster 204 receives the pulse train and operates to adjust the pulse train before transmitting it to the modulating signal input of the amplitude modulator 206.

[0060] The amplitude modulator 206 receives a RF oscillation signal from the VCO 124 and modulates the RF oscillation signal with the pulse train signal. The resultant pulsed RF signal is output by the amplitude modulator 206 to the power amplifier 208. The power amplifier 208 increases the power of the pulsed RF signal to generate a pulsed RF power signal. The pulsed RF power signal is transmitted from the power amplifier 208 through the time-averaged power meter 210 to the high power coaxial cable 104. The power level controller 212 receives time-averaged measures of the power from the meter 210 and uses them to adjust the amplification applied by the power amplifier 208 so as to level the power output.

[0061] In a first application of the pulsed RF power generator shown in FIG. 2, the pulse train adjuster 204 ramps the pulse heights to achieve a ramped pulsed power waveform. Such a ramped pulsed power waveform is illustrated in FIG. 13 and results in reduced reflected power.

[0062] FIG. 13 is a graph showing a forward waveform having ramped power at a leading end of a pulsed waveform in accordance with an embodiment of the present invention. The generation of the ramped pulse waveform utilizes the train adjuster 206 as described above. The ramped pulse waveform shown in FIG. 13 has a pulse time of 60 microseconds; a width of 30 microseconds; ramp rise time of 15 microseconds, and a fall time of 1 μs for 100% Cl₂/5 mT plasma. The results from using ramped pulse waveforms are described in relation to FIG. 14.

[0063] FIG. 14 is a graph of percent reflected power versus ramp rate at the leading end of a pulse waveform experimental results show decreasing reflected power as ramp rise time increases. Data points are shown for both 30 percent and 50 percent pulse duty cycles. In either case, the percent reflected power is shown to decrease with increasing ramp rise times. Hence, ramping the pulse waveform is shown to reduce reflected power.

[0064] In a second application of the pulsed RF power generator shown in FIG. 2, the pulse train adjuster 204 provides a non-zero minimum voltage value for the pulses which corresponds to a relatively low-level CW waveform being transmitted simultaneously with the pulsed waveform. Such simultaneous transmission of a relatively low-level CW waveform and a pulsed waveform is illustrated in FIG. 15 and also results in reduced reflected power.

[0065] FIG. 15 is a graph showing a forward waveform comprising a low-level of continuous waveform in addition to a pulsed waveform in accordance with an embodiment of the present invention. The generation of the combined CW and pulsed waveform utilizes the train adjuster 204 as described above. The combined waveform shown in FIG. 15 has a ratio between the CW power level and pulse peak power level of 7.3%. The following conditions were present: pulse time=80 microseconds; width=35 microseconds; and 100% Cl₂/5 mT plasma. The results from using the combined waveform are described below in relation to FIG. 16.

[0066] FIG. 16 is a graph of experimental results showing decreasing reflected power as a ratio of continuous waveform power to pulse peak power increases. The graph shows reflected power (%) versus the ratio of continuous wave power and pulse power for: T (pulse)=80 μs; DC(duty cycle)=50% pulse; and a 100% Cl₂/5 mT baseline. As shown in FIG. 16, the reflected power percentage decreases from about 22% at a ratio of zero percent to about 10% at a ratio of about twenty-three percent.

[0067] FIG. 3A is a circuit diagram of a first embodiment for the VCO 124 in accordance with the present invention. The VCO 124 in FIG. 3A is designed to be compatible with a matching network 122 having variable series 604 and shunt 606 capacitances. The VCO 124 comprises a VCO subcircuit 302 and an amplifier subcircuit 304.

[0068] The VCO subcircuit 302 comprises a modified Colpitts oscillator 302A. The frequency of the oscillator is determined by a parallel resonance of the inductance with a capacitance that includes a VVC diode 302B. “VVC” stands for voltage variable capacitance. The phase error signal from 112 is fed through an op amp 305 to bias the VVC. The output of the modified Colpitts oscillator is fed to the amplifier subcircuit 304. The amplifier subcircuit 304 comprises a “line driver” linear amplifier which outputs the amplified signal along the small signal coaxial cable 110 to the pulsed RF generator 102. Optionally, the output is buffered before it is fed to amplifier 304.

[0069] FIG. 3B is a circuit diagram of a second embodiment for the VCO 124 in accordance with the present invention. The VCO 124 in FIG. 3B is also designed to be compatible with a matching network 122 having a fixed series capacitor 604 and a variable shunt capacitor 606. The VCO 124 comprises a VCO subcircuit 302.

[0070] The VCO subcircuit 302 in FIG. 3B operates somewhat similarly as the VCO subcircuit 302 in FIG. 3A. However, the VCO subcircuit 302 in FIG. 3B includes a second VVC diode 302C being driven by a filtered phase error. A controller circuit may be required between the second VVC diode 302C and the RC filter 306 for the VCO subcircuit 302 to operate properly. Such a controller circuit may comprise a PID control loop or a programmable controller unit.

[0071] FIG. 4 is a schematic diagram of a time-averaging power meter 210 in accordance with an embodiment of the present invention. The time-averaging power meter 210 includes a directional coupler 402, a time-averager for the forward wave 404-1, a time averager for the reflected wave 404-2, a subtractor circuit 406, and a display 408.

[0072] The directional coupler 402 is a bidirectional coupler which generates greatly attenuated versions of the forward (F) and reverse (R) waves from the high power coaxial cable 104 for use by the time-averaging power meter 210. A first (forward) time averager circuit 404-1 receives the attenuated forward wave along a first line 403-1 from the directional coupler 402. Similarly, a second (reverse) time averager circuit 404-2 receives the attenuated reverse wave along a second line 403-2 from the directional coupler 402.

[0073] The first time averager circuit 404-1 applies time averaging to the attenuated forward wave to produce a forward power measure and outputs the forward power measure along a first line 405-1 to the subtractor circuit 406. Similarly, the second time averager circuit 404-2 applies time averaging to the attenuated reverse wave to produce a reverse (or reflected) power measure and outputs the reverse power measure along a second line 405-2 to the subtractor circuit 406. Three embodiments for the time averager circuits 404 are described further below in relation to FIGS. 5A-C.

[0074] The subtractor circuit 406 operates to subtract the reverse power measure from the forward power measure to produce a measure of the power being absorbed by the plasma in the reaction chamber 108. The absorbed power measure may be sent from the subtractor circuit 406 to the power level controller 212. Further, the power level controller may receive the forward and/or reverse power measures themselves and use them to adjust the amplification of the power amplifier 208.

[0075] In addition, the absorbed power measure may be sent from the subtractor circuit 406 to a display 408 for use by an operator monitoring and/or controlling the plasma process in the reaction chamber 108. Further, the display 408 may receive and display the forward and/or reverse power measures themselves. This allows the operator to monitor and/or control the reflected power. Typically, semiconductor manufacturers prefer that the reflected power be no more than 10% of the forward power. Moreover, if the reflected power is too high, the pulsed RF power generator 102 may be detrimentally driven into foldback. The subtractor circuit 406 and display 408 may be implemented using, for example, a Hewlett Packard 438A dual-sensor power meter.

[0076] FIG. 5A is a schematic diagram of a temperature-based time averager 404A in accordance with an embodiment of the present invention. The temperature-based time averager 404A may be used for the forward time averager 404-1 and/or the reflected time averager 404-2 in FIG. 4. The temperature-based time averager 404A comprises a load 502 and a temperature sensor 504.

[0077] The load 502 comprises a load which converts a low-power signal wave into heat. The conversion into heat provides the time averaging functionality. In one embodiment, the load 502 also comprises a 50 ohm termination to an output of the directional coupler 502. The temperature sensor 504 senses the temperature of the load 502 and outputs an electrical signal indicative of that temperature, and hence indicative of a time-average of the low-power signal wave. In one embodiment, the electrical signal output by the temperature sensor 504 comprises a dc voltage level. Temperature sensors 504 suitable for a test laboratory environment include the Hewlett Packard 848XA family of thermocouple based power sensors. Temperature sensors suitable for commercial application include the Linear Technology LT1088 wideband RMS-DC converter.

[0078] FIG. 5B is a schematic diagram of an analog time averager 404B in accordance with an embodiment of the present invention. The analog time averager 404B may be used for the forward time averager 404-1 and/or the reflected time averager 404-2 in FIG. 4. The analog time averager 404B comprises an analog squaring circuit 506 and an analog integrating circuit 508.

[0079] The analog squaring circuit 506 provides the functionality of squaring a time-varying voltage signal V(t). This functionality is useful because the power of a time-varying voltage signal V(t) is proportional to V²(t) divided by the impedance of the transmission line. In this case, the voltage signal output by the analog squaring circuit 506 is proportional to the square of the voltage signal input into it from the directional coupler 402. Hence, the analog squaring circuit 506 produces an analog voltage signal which is proportional to the power to be measured.

[0080] The analog integrating circuit 508 receives the output from the analog squaring circuit 506 and integrates it over time. Thus, the analog integrating circuit 508 time averages the analog power signal.

[0081] FIG. 5C is a schematic diagram of a digital time averager 404C in accordance with an embodiment of the present invention. The digital time averager 404C may be used for the forward time averager 404-1 and/or the reflected time averager 404-2 in FIG. 4. The digital time averager 404C comprises a sampler 510, a digital squaring circuit 512, and a digital integrating circuit 514.

[0082] The sampler 510 receives an analog voltage signal from the directional coupler 402 and samples the analog voltage signal at a finite number of points during each pulse cycle. Preferably, there would be approximately 10 samples per period of the RF wave for good signal reproduction. For example, a 12 megahertz RF wave and a pulse period of 100 microseconds, taking 10 samples per period of the RF wave would require 12,000 samples per pulse period. Such a device may be implemented with current analog-to-digital conversion technology.

[0083] The sampled voltage data is output by the sampler 510 to the digital squaring circuit 512. The digital squaring circuit 512 provides the functionality of squaring the sampled voltage data. This functionality is useful because the power of a time-varying voltage signal V(t) is proportional to V²(t) divided by the impedance of the transmission line. The digital squaring circuit 512 may be implemented using current digital signal processing technology.

[0084] The digital integrating circuit 514 receives the squared voltage data from the digital squaring circuit 512 and provides a time-averaging functionality by averaging the squared data over appropriate time periods.

[0085] FIG. 6 is a schematic diagram of a local matching network 122 in accordance with an embodiment of the present invention. The purpose of the matching network 122 is to adapt the variable impedance of the reactor and plasma discharge to the fixed cable impedance. In unmatched systems, large reactive currents may flow that do not contribute to net power transfer, and standing waves may occur on the transmission line causing unnecessary losses and RF interference. The matching network 122 includes an inductor L 602, a variable series capacitor C₁604, a variable shunt capacitor C₂606, and a shunt capacitance selector circuit 610.

[0086] The variable series capacitor C₁604 has its capacitance value controlled by a series capacitor control signal received from the second servo controller 120. In certain embodiments, the series capacitor 604 may have a fixed capacitance (instead of a variable capacitance).

[0087] The variable shunt capacitor C₂606 comprises a capacitance which may be rapidly switched to make rapid adjustments to the impedance of the matching network 122. One embodiment of the variable shunt capacitor C₂606 comprises a mechanically implemented shunt capacitance. An alternate embodiment of the variable shunt capacitor C₂606 comprises a PIN diode switched linear capacitor bank which is described in further detail below in relation to FIG. 7. In addition, the variable shunt capacitor C₂606 may be modified to operate with a binary coded shunt capacitance selector 610.

[0088] The variable shunt capacitor C₂606 is controlled by shunt capacitor selection signals received along lines 611 from the shunt capacitance selector circuit 610. The shunt capacitance selector circuit 610 receives a shunt capacitor control signal from the first servo controller 118. The logical operation of one embodiment of the shunt capacitor selector 610 is described in further detail below in relation to FIG. 18.

[0089] FIG. 7 is a schematic diagram of a linear capacitor bank 606 in accordance with an embodiment of the present invention. The linear capacitor bank 606 comprises a plurality of PIN diodes 702, each PIN diode 702 in series with a capacitor Co 704. The PIN diodes 702 are used in this embodiment as switches because of their relatively fast switching speeds.

[0090] For example, FIG. 7 shows four PIN diodes 702a-dreceiving control signals along four lines 611a-d, respectively. Of course, the use of four PIN diodes in number is for purposes of illustration and is not to be limiting. Depending on the control signals, zero, one, two, three, or four of the PIN diodes 702 may be switched on, varying the capacitance of the linear capacitor bank 606 accordingly. Generally, the capacitance of the bank 606 varies linearly with the number of PIN diodes 702 that are switched on. In addition, the bank 606 may have a minimum value of shunt capacitance due to a fixed capacitor C_min706.

[0091] In an alternate embodiment, instead of a linear capacitor bank 606 and selector 610, a binary coded (BCD) capacitor bank and selector may be utilized. Using a binary coded capacitor bank requires different diode switch states than using a linear capacitor bank 606. These different switch states are described below in relation to FIG. 17.

[0092] FIG. 17 is a table showing PIN diode switch states for binary coded BCD) and linear capacitance banks. The right side of the table shows the switch states or a five position linear capacitance bank 606 having four switched capacitors Co 704, such as shown in FIG. 7.

[0093] The left side of the table shows the switch states for a five bit BCD capacitance bank. The BCD capacitance bank comprises PIN diodes having the following capacitances: the capacitance of the diode corresponding to the second bit is twice the capacitance of the diode corresponding to the first bit; the capacitance of the diode corresponding to the third bit is twice the capacitance of the diode corresponding to the second bit; the capacitance of the diode corresponding to the fourth bit is twice the capacitance of the diode corresponding to the third bit; and the capacitance of the diode corresponding to the fifth bit is twice the capacitance of the diode corresponding to the fourth bit. By selecting the appropriate switch state, any one of 32 different capacitances may be selected from the BCD capacitance bank.

[0094] FIG. 18 is a graph showing change in shunt capacitance during linear bank switching and during two scenarios of binary coded bank switching. For linear bank switching, the capacitance level transitions directly from 8 to 16 units in the example shown.

[0095] In comparison, the binary coded (binary sequenced) bank switching is not so direct. In the example shown, the bank begins with a capacitance level of 8 units corresponding to the binary code being 01000 (only bit 4 is on). The bank ends with a capacitance level of 16 units corresponding to the binary code being 10000 (only bit 5 is on). There are two scenarios for the transition between the two levels. In a first scenario, bit 4 opens (goes to zero) before bit 5 closes (goes to one). In that case, the actual capacitance value drops undesirably to zero (00000) during the transition. In a second scenario, bit 5 closes (goes to one) before bit 4 opens (goes to zero). In that case, the actual capacitance value rises undesirably to twenty-four (11000) during the transition.

[0096] FIG. 19 is a graph showing a scheme for gating of the RF power during bank switching in accordance with an embodiment of the present invention. The graph shows a switching scheme for a PIN diode switched shunt capacitor bank, using gating of the RF power to avoid reflected power spikes during the switching transient. The gating technique illustrated in FIG. 19 avoids transient mis-match of RF power which results from the undesirable drops and rises in capacitance during transitions of a binary coded capacitance bank. In this gating technique, the RF power is gated away during a transition in capacitance level such that no RF power is applied to the match while the shunt capacitance bank is switching states. This eliminates any reflected power spikes which would have otherwise been produced during the transition of the shunt capacitor states.